TIM5_struct Struct Reference

16-bit timer with synchro module (TIM5) More...

#include <stm8s.h>

Data Fields
__IO uint8_t	ARRH
__IO uint8_t	ARRL
__IO uint8_t	CCER1
__IO uint8_t	CCER2
__IO uint8_t	CCMR1
__IO uint8_t	CCMR2
__IO uint8_t	CCMR3
__IO uint8_t	CCR1H
__IO uint8_t	CCR1L
__IO uint8_t	CCR2H
__IO uint8_t	CCR2L
__IO uint8_t	CCR3H
__IO uint8_t	CCR3L
__IO uint8_t	CNTRH
__IO uint8_t	CNTRL
__IO uint8_t	CR1
__IO uint8_t	CR2
__IO uint8_t	EGR
__IO uint8_t	IER
__IO uint8_t	PSCR
__IO uint8_t	SMCR
__IO uint8_t	SR1
__IO uint8_t	SR2

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Detailed Description

16-bit timer with synchro module (TIM5)

Definition at line 1121 of file stm8s.h.

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Field Documentation

__IO uint8_t TIM5_struct::ARRH

TIM5 Auto-Reload Register High

Definition at line 1138 of file stm8s.h.

__IO uint8_t TIM5_struct::ARRL

TIM5 Auto-Reload Register Low

Definition at line 1139 of file stm8s.h.

__IO uint8_t TIM5_struct::CCER1

TIM5 Capture/Compare Enable Register 1

Definition at line 1133 of file stm8s.h.

__IO uint8_t TIM5_struct::CCER2

TIM5 Capture/Compare Enable Register 2

Definition at line 1134 of file stm8s.h.

__IO uint8_t TIM5_struct::CCMR1

TIM5 Capture/Compare Mode Register 1

Definition at line 1130 of file stm8s.h.

__IO uint8_t TIM5_struct::CCMR2

TIM5 Capture/Compare Mode Register 2

Definition at line 1131 of file stm8s.h.

__IO uint8_t TIM5_struct::CCMR3

TIM5 Capture/Compare Mode Register 3

Definition at line 1132 of file stm8s.h.

__IO uint8_t TIM5_struct::CCR1H

TIM5 Capture/Compare Register 1 High

Definition at line 1140 of file stm8s.h.

__IO uint8_t TIM5_struct::CCR1L

TIM5 Capture/Compare Register 1 Low

Definition at line 1141 of file stm8s.h.

__IO uint8_t TIM5_struct::CCR2H

TIM5 Capture/Compare Register 2 High

Definition at line 1142 of file stm8s.h.

__IO uint8_t TIM5_struct::CCR2L

TIM5 Capture/Compare Register 2 Low

Definition at line 1143 of file stm8s.h.

__IO uint8_t TIM5_struct::CCR3H

TIM5 Capture/Compare Register 3 High

Definition at line 1144 of file stm8s.h.

__IO uint8_t TIM5_struct::CCR3L

TIM5 Capture/Compare Register 3 Low

Definition at line 1145 of file stm8s.h.

__IO uint8_t TIM5_struct::CNTRH

TIM5 Counter High

Definition at line 1135 of file stm8s.h.

__IO uint8_t TIM5_struct::CNTRL

TIM5 Counter Low

Definition at line 1136 of file stm8s.h.

__IO uint8_t TIM5_struct::CR1

TIM5 Control Register 1

Definition at line 1123 of file stm8s.h.

__IO uint8_t TIM5_struct::CR2

TIM5 Control Register 2

Definition at line 1124 of file stm8s.h.

__IO uint8_t TIM5_struct::EGR

TIM5 Event Generation Register

Definition at line 1129 of file stm8s.h.

__IO uint8_t TIM5_struct::IER

TIM5 Interrupt Enable Register

Definition at line 1126 of file stm8s.h.

__IO uint8_t TIM5_struct::PSCR

TIM5 Prescaler Register

Definition at line 1137 of file stm8s.h.

__IO uint8_t TIM5_struct::SMCR

TIM5 Slave Mode Control Register

Definition at line 1125 of file stm8s.h.

__IO uint8_t TIM5_struct::SR1

TIM5 Status Register 1

Definition at line 1127 of file stm8s.h.

__IO uint8_t TIM5_struct::SR2

TIM5 Status Register 2

Definition at line 1128 of file stm8s.h.

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The documentation for this struct was generated from the following file:

• stm8s.h