Clock Controller (CLK)
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#include <stm8s.h>
Detailed Description
Clock Controller (CLK)
Definition at line 508 of file stm8s.h.
Field Documentation
Configurable Clock Output Register
Definition at line 519 of file stm8s.h.
Clock Divider Register
Definition at line 516 of file stm8s.h.
Clock Master Status Register
Definition at line 513 of file stm8s.h.
Clock Security System Register
Definition at line 518 of file stm8s.h.
External Clocks Control Register
Definition at line 511 of file stm8s.h.
HSI Calibration Trimmer Register
Definition at line 522 of file stm8s.h.
Internal Clocks Control Register
Definition at line 510 of file stm8s.h.
Peripheral Clock Gating Register 1
Definition at line 517 of file stm8s.h.
Peripheral Clock Gating Register 2
Definition at line 520 of file stm8s.h.
Reserved byte
Definition at line 512 of file stm8s.h.
Reserved byte
Definition at line 521 of file stm8s.h.
Switch Control Register
Definition at line 515 of file stm8s.h.
SWIM clock control register
Definition at line 523 of file stm8s.h.
Clock Master Switch Register
Definition at line 514 of file stm8s.h.
The documentation for this struct was generated from the following file: