VI_ATTR_PXI_SRC_TRIG_BUS
Resource Classes
PXI BACKPLANE
Attribute Information
| Access Privilege | Data Type | Range | Default |
|---|---|---|---|
|
Read/Write Local |
ViInt16 |
Single-Segment Chassis |
–1 |
Description
VI_ATTR_PXI_SRC_TRIG_BUS specifies the segment to use to qualify trigSrc in viMapTrigger.
 |
Note Some PXI chassis, typically those with more than 8 slots, have multiple trigger buses (also called segments). viMapTrigger is used on the PXI BACKPLANE resource to map a trigger between two trigger buses. One trigger bus, specified by VI_ATTR_PXI_SRC_TRIG_BUS, is the source or "writer" for this trigger line. The other trigger bus, specified by VI_ATTR_PXI_DEST_TRIG_BUS, is a "reader." You can have multiple readers, but only one writer for a given trigger line. For example, if you want to have triggers mapped from trigger bus 1 to trigger bus 2 and then from trigger bus 2 to trigger bus 3, observe that in this case trigger bus 1 is the writer for this line, writing to both trigger bus 2 and trigger bus 3. Therefore, you should perform your viMapTrigger from 1 to 2 and from 1 to 3—mapping from 1 to 2 and then 2 to 3 would not be allowed because it would require 2 also to be a writer (as well as 1). Note also that mapping from one line in the source trigger bus to a different line in the destination trigger bus (trigSrc != trigDest) is dependent on hardware capabilities and a specific software implementation, and may not be supported. Code to map trigger 5 from trigger segment 1 to trigger segment 2 of an 18-slot chassis would look like the following, where backplaneSession is a session to a PXI BACKPLANE resource: viSetAttribute(backplaneSession, VI_ATTR_PXI_SRC_TRIG_BUS, 1); |
*You can determine the number of segments from MAX (in the trigger reservation panel), from the chassis documentation, and by looking at the dividing lines on the physical front panel of the chassis itself.
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