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| address | A string (or other language construct) that uniquely locates and identifies a resource. VISA defines an ASCII-based grammar that associates strings with particular physical devices and VISA resources.
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| address location | Refers to the location of a specific register. |
| address modifier | One of six signals in the VMEbus specifications used by VMEbus masters to indicate the address space and mode (supervisory/nonprivileged, data/program/block) in which a data transfer is to take place. |
| address space | In VXI/VME systems, a set of 2n memory locations differentiated from other such sets in VXI/VMEbus systems by six signal lines known as address modifiers, where n (either 16, 24, or 32) is the number of address lines required to uniquely specify a byte location in a given space. In PXI systems, the address space corresponds to 1 of 6 possible BAR locations (BAR0 through BAR5). In VME, VXI, and PXI, a given device may have addresses in one or more address spaces. |
| address string | A string (or other language construct) that uniquely locates and identifies a resource. VISA defines an ASCII-based grammar that associates strings with particular physical devices and VISA resources. |
| alias | User-defined name for a VISA resource. |
| ANSI | American National Standards Institute |
| API | Application Programming Interface. The direct interface that an end user sees when creating an application. In VISA, the API consists of the sum of all of the operations, attributes, and events of each of the VISA Resource Classes. |
| ASCII | American Standard Code for Information Interchange. |
| asynchronous | An action or event that occurs at an unpredictable time with respect to the execution of a program. |
| attribute | A value within an object or resource that reflects a characteristic of its operational state. |
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| b | Bit |
| B | Byte |
| backplane | In VXI/VME systems, an assembly, typically a PCB, with 96-pin connectors and signal paths that bus the connector pins. A C-size VXIbus system will have two sets of bused connectors called the J1 and J2 backplanes. A D-size VXIbus system will have three sets of bused connectors called the J1, J2, and J3 backplane. |
| Base Address Register | Each PCI or PXI device has six of these, BAR0 through BAR5. At power-on, each BAR requests a given size of memory or I/O space. Each device can request from 0 to 6 regions of PCI memory or I/O space. After the operating system starts, each BAR contains an assigned base address in PCI address space. A value of 0 in a given BAR indicates that the device is not using that BAR. |
| bus error | An error that signals failed access to an address. Bus errors occur with low-level accesses to memory and usually involve hardware with bus mapping capabilities. For example, nonexistent memory, a nonexistent register, or an incorrect device access can cause a bus error. |
| byte order | How bytes are arranged within a word or how words are arranged within a longword. Motorola (Big-Endian) ordering stores the most significant byte (MSB) or word first, followed by the least significant byte (LSB) or word. Intel (Little-Endian) ordering stores the LSB or word first, followed by the MSB or word. |
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| callback | See also handler. A software routine that is invoked when an asynchronous event occurs. In VISA, callbacks can be installed on any session that processes events. |
| CIC | Controller-In-Charge. The device that manages the GPIB by sending interface messages to other devices. |
| commander | A device that has the ability to control another device. This term also can denote the unique device that has sole control over another device (as with the VXI Commander/Servant hierarchy). |
| communication channel | The same as session. A communication path between a software element and a resource. Every communication channel in VISA is unique. |
| configuration registers | A set of registers through which the system can identify a module device type, model, manufacturer, address space, and memory requirements. In order to support automatic system and memory configuration, the PXI and VXIbus specifications require that all PXI and VXIbus devices have a set of such registers. |
| controller | An entity that can control another device(s) or is in the process of performing an operation on another device. |
| CPU | Central processing unit |
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| device | An entity that receives commands from a controller. A device can be an instrument, a computer (acting in a non-controller role), or a peripheral (such as a plotter or printer). |
| DLL | Dynamic Link Library. See also a shared library or shared object. A file containing a collection of functions that can be used by multiple applications. This term is usually used for libraries on Windows platforms. |
| DMA | Direct memory access. High-speed data transfer between a board and memory that is not handled directly by the CPU. Not available on some systems. See programmed I/O. |
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| embedded controller | A computer plugged directly into the VXI backplane. An example is the National Instruments VXIpc-870. |
| event | An asynchronous occurrence that is independent of the normal sequential execution of the process running in a system. |
| external controller | A desktop computer or workstation connected to the VXI system via a MXI interface board. An example is a standard personal computer with a PCI-MXI-2 installed. |
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| Fast Data Channel | See FDC. |
| FDC | Fast Data Channel; a protocol that provides a mechanism for transferring data blocks between a VXIbus Commander and its Servants. |
| FIFO | First In-First Out; a method of data storage in which the first element stored is the first one retrieved. |
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| global attribute | A global attribute is one whose value is the same for all sessions to the specified resource. An example of this is the hardware interface type. |
| GPIB | General Purpose Interface Bus is the common name for the communications interface system defined in ANSI/IEEE Standard 488.1-1987 and ANSI/IEEE Standard 488.2-1992. |
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| handler | See also callback. A software routine that is invoked when an asynchronous event occurs. In VISA, callbacks can be installed on any session that processes events. |
| handshaking | A type of protocol that makes it possible for two devices to synchronize operations. |
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| I/O | input/output |
| IEEE | Institute of Electrical and Electronics Engineers |
| instrument | A device that accepts some form of stimulus to perform a designated task, test, or measurement function. Two common forms of stimuli are message passing and register reads and writes. Other forms include triggering or varying forms of asynchronous control. |
| instrument driver | A set of routines designed to control a specific instrument or family of instruments, and any necessary related files for LabWindows/CVI or LabVIEW. |
| interface | A generic term that applies to the connection between devices and controllers. It includes the communication media and the device/controller hardware necessary for cross-communication. |
| interrupt | A condition that requires attention out of the normal flow of control of a program. |
| IVI | Interchangeable Virtual Instruments |
| IVI Driver | A software module that controls a hardware device and that complies with the IVI Foundation specifications. |
| IVI Foundation, Inc. | Interchangeable Virtual Instruments, Inc., a non-profit Delaware Corporation, composed of end-user test engineers, instrument and software suppliers, and system integrators, chartered to define software standards that promote instrument interchangeability. See www.ivifoundation.org for more details. |
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| local attribute | A local attribute is one whose value is unique to the session. An example of this is the timeout. |
| lock | A state that prohibits sessions other than the session(s) owning the lock from accessing a resource. |
| logical address | An 8-bit number that uniquely identifies the location of each VXIbus device's configuration registers in a system. The A16 register address of a device is C000h + Logical Address * 40h. |
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| mapping | An operation that returns a reference to a specified section of an address space and makes the specified range of addresses accessible to the requester. This function is independent of memory allocation. |
| MAX | Measurement & Automation Explorer. Provides access to all National Instruments DAQ, GPIB, IMAQ, IVI, Motion, VISA, and VXI devices. With MAX, you can configure National Instruments hardware and software, add new channels, interfaces, and virtual instruments, execute system diagnostics, and view the devices and instruments connected to your system. Installs automatically with NI-VISA version 2.5 or later or NI-VXI version 3.0 or later. Available only for Win32-based operating systems. |
| message-based device | In VXI/VME systems, an intelligent device that implements the defined VXIbus registers and communication protocols. These devices are able to use Word Serial Protocol to communicate with one another through communication registers. All GPIB and Serial devices are by definition message-based, as are devices for some other interfaces. Many modern message-based devices support the IEEE 488.2 protocol. |
| multitasking | The ability of a computer to perform two or more functions simultaneously without interference from one another. In operating system terms, it is the ability of the operating system to execute multiple applications/processes by time-sharing the available CPU resources. |
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| NI Spy | A utility that monitors, records, and displays multiple National Instruments APIs, such as NI-488.2 and NI-VISA. Useful for troubleshooting errors in your application and for verifying communication. |
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| operation | An action defined by a resource that can be performed on a resource. In general, this term is synonymous with the connotation of the word method in object-oriented architectures. |
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| process | An operating system element that shares a system's resources. A multi-process system is a computer system that allows multiple programs to execute simultaneously, each in a separate process environment. A single-process system is a computer system that allows only a single program to execute at a given point in time. |
| programmed I/O | Low-speed data transfer between a board and memory in which the CPU moves each data value according to program instructions. See DMA. |
| protocol | Set of rules or conventions governing the exchange of information between computer systems. |
| PXI | PCI eXtensions for Instrumentation. PXI leverages the electrical features defined by the Peripheral Component Interconnect (PCI) specification as well as the CompactPCI form factor, which combines the PCI electrical specification with Eurocard (VME) mechanical packaging and high-performance connectors. This combination allows CompactPCI and PXI systems to have up to seven peripheral slots versus four in a desktop PCI system. |
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| register | An address location that can be read from or written into or both. It may contain a value that is a function of the state of hardware or can be written into to cause hardware to perform a particular action. In other words, an address location that controls and/or monitors hardware. |
| register-based device | In VXI/VME systems, a servant-only device that supports only the four basic VXIbus configuration registers. Register-based devices are typically controlled by message-based devices via device-dependent register reads and writes. All PXI devices are by definition register-based, as are devices for some other interfaces. |
| Resource Class | The definition for how to create a particular resource. In general, this is synonymous with the connotation of the word class in object-oriented architectures. For VISA Instrument Control resource classes, this refers to the definition for how to create a resource which controls a particular capability or set of capabilities of a device. |
| resource or resource instance | In general, this term is synonymous with the connotation of the word object in object-oriented architectures. For VISA, resource more specifically refers to a particular implementation (or instance in object-oriented terms) of a Resource Class. |
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| s | second |
| SCPI | Standard Commands for Programmable Instrumentation; a protocol which defines a standard set of commands to control programmable test and measurement devices in instrumentation systems. |
| servant | A device controlled by a Commander. |
| session | The same as communication channel. A communication path between a software element and a resource. Every communication channel in VISA is unique. |
| shared library or shared object | See also DLL. A file containing a collection of functions that can be used by multiple applications. This term is usually used for libraries on UNIX platforms. |
| shared memory | A block of memory that is accessible to both a client and a server. The memory block operates as a buffer for communication. This is unique to register-based interfaces such as VXI. |
| socket | A bi-directional communication endpoint; an object through which a VISA sockets application sends or receives packets of data across a network. |
| SRQ | IEEE 488 Service Request. This is an asynchronous request from a remote device that requires service. A service request is essentially an interrupt from a remote device. For GPIB, this amounts to asserting the SRQ line on the GPIB. For VXI, this amounts to sending the Request for Service True event (REQT). |
| status byte | A byte of information returned from a remote device that shows the current state and status of the device. If the device follows IEEE 488 conventions, bit 6 of the status byte indicates whether the device is currently requesting service. |
| status/ID | A value returned during an IACK cycle. In VME, usually an 8-bit value which is either a status/data value or a vector/ID value used by the processor to determine the source. In VXI, a 16-bit value used as a data; the lower 8 bits form the VXI logical address of the interrupting device and the upper 8 bits specify the reason for interrupting. |
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| TCP/IP | Transmission Control Protocol/Internet Protocol. The de facto standard for transmitting data over networks, TCP/IP is a multi-layered suite of communication protocols used to connect hosts on LANs, WANs and the Internet. It is very widely supported, even by network operating systems that have their own communication protocols. |
| thread | An operating system element that consists of a flow of control within a process. In some operating systems, a single process can have multiple threads, each of which can access the same data space within the process. However, each thread has its own stack and all threads can execute concurrently with one another (either on multiple processors, or by time-sharing a single processor). |
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| USB | Universal Serial Bus. This common computer peripheral bus allows up to 127 individual USB peripherals per USB root node. |
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| virtual instrument | A name given to the grouping of software modules (in this case, VISA resources with any associated or required hardware) to give the functionality of a traditional stand-alone instrument. Within VISA, a virtual instrument is the logical grouping of any of the VISA resources. |
| VISA | Virtual Instrument Software Architecture. This is the general name given to this product and its associated architecture. The architecture consists of two main VISA components: the VISA resource manager and the VISA resources. |
| VISA Instrument Control Resources | This is the name given to the part of VISA that defines all of the device-specific resource classes. VISA Instrument Control resources encompass all defined device capabilities for direct, low-level instrument control. |
| VISA memory access resources | This is the name given to the part of VISA that defines all of the register or memory-specific resource classes. The VISA MEMACC resources encompass all high and low-level services for interface-level accesses to all memory defined in the system. |
| VISA Resource Manager | This is the name given to the part of VISA that manages resources. This management includes support for finding resources and opening sessions to them. |
| VISA Resource Template | This is the name given to the part of VISA that defines the basic constraints and interface definition for the creation and use of a VISA resource. All VISA resources must derive their interface from the definition of the VISA Resource Template. This includes services for setting and retrieving attributes, receiving events, locking resources, and closing objects. |
| visaconf | VISA configuration utility for Linux and Mac OS X. |
| VISAIC | VISA Interacvtive Control utility. Interactively controls VXI/VME devices without using a conventional programming language, LabVIEW, or Measurement Studio. |
| VME | Versa Module Eurocard or IEEE 1014 |
| VXIbus | VMEbus Extensions for Instrumentation or IEEE 1155 |