DFD FXP MRate Code Generator VI
Owning Palette: Multirate Fixed-Point Tools VIs
Installed With: Digital Filter Design Toolkit
Generates LabVIEW field-programmable gate array (FPGA) code from a fixed-point multirate filter.
 Place on the block diagram | Find on the Functions palette |
 | open project? specifies if this VI opens the project file after generating the code. The default is FALSE, which means that you must open the project file manually after this VI generates the code. | ||||||
 | # channels specifies the number of channels that you want the generated code to process. The default is 1. | ||||||
 | multirate filter specifies the input multirate filter. | ||||||
 | destination folder specifies the path to the folder in which you want to save the generated code. This VI returns an error if you do not specify a valid path to the folder. | ||||||
 | filter name specifies a name for the multirate filter code that this VI generates. This VI also uses this value as the filename of the project file that contains the generated filter code. You can use only letters and digits in the filter name input. This VI ignores other characters. If you specify an invalid name, this VI creates a string that starts with Unknown. | ||||||
 | error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code. Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| confirm? specifies if you want this VI to ask you for confirmation before replacing an existing file. If the value is TRUE, this VI displays a dialog box asking for confirmation to replace the existing file. If the value is FALSE, this VI replaces the existing file automatically. The default is TRUE. | ||||||
 | lvproj path returns the path to the generated project file. | ||||||
 | sampling frequency/FPGA clock returns a ratio. You can multiply this ratio with a specific FPGA clock rate to calculate the maximum input sampling frequency per channel that the generated FPGA code can process at the FPGA clock rate. For example, if the ratio is 0.05 and the FPGA clock rate is 40 MHz, then the maximum input sampling frequency per channel that the generated FPGA code can process is 2 MHz. | ||||||
 | error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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Example
Refer to the Generate LabVIEW FPGA Code for Multirate Filter VI in the labview\examples\Digital Filter Design\Fixed-Point Filters\Multirate directory for an example of using the DFD FXP MRate Code Generator VI.
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