Enabling Sleep Mode on a CompactRIO Chassis or a Single-Board RIO Device (FPGA Interface)

The cRIO-910x Reconfigurable Embedded chassis, the cRIO-9072/9074 Integrated controller and chassis, and the Single-Board RIO (sbRIO) devices have a sleep mode line. When you enable sleep mode, installed and onboard C Series I/O modules in the chassis or device enter a low-power state. Typically, you cannot communicate with modules when they are in sleep mode. If you try to communicate with a module when it is in sleep mode, LabVIEW returns a module communications error from the FPGA I/O functions. Sleep mode does not affect the CompactRIO chassis or controller or the sbRIO device.

Note  The cRIO-9151 R Series Expansion chassis does not have a sleep mode line.

Complete the following steps to enable sleep mode on a cRIO-910x Reconfigurable Embedded chassis or an sbRIO device.

1. Configure the CompactRIO or sbRIO system.
2. Make sure the Sleep I/O item is added to the system.
3. Right-click the FPGA target and select New»VI from the shortcut menu to add a new VI to the system.
4. Place an FPGA I/O Node on the block diagram of the VI.
5. Click the element section of the FPGA I/O Node and select Chassis I/O (or Onboard I/O)»Sleep from the shortcut menu.
6. Right-click the Sleep input of the FPGA I/O Node and select Create»Control from the shortcut menu. When Sleep is TRUE, the system enters sleep mode. When Sleep is FALSE, the system enters active mode. The default state of the system is active mode.

Confirming the State of the Sleep Channel

Complete the following steps to read the state of the Sleep channel.

1. Place another FPGA I/O Node function on the block diagram. This FPGA I/O Node must execute after the FPGA I/O Node you added above.
2. Click the element section of the FPGA I/O Node and select Chassis I/O (or Onboard I/O)»Sleep from the shortcut menu.
3. Right-click the FPGA I/O Node and select Change to Read from the shortcut menu.
4. Right-click the Sleep output of the FPGA I/O Node and select Create»Indicator from the shortcut menu.

When you run the VI, the FPGA I/O Node reads the state of the Sleep channel.