|
STM8S/A Standard Peripherals Drivers
|
stm8s_tim5.h
Go to the documentation of this file.
00001 /** 00002 ****************************************************************************** 00003 * @file stm8s_tim5.h 00004 * @author MCD Application Team 00005 * @version V2.3.0 00006 * @date 16-June-2017 00007 * @brief This file contains all functions prototype and macros for the TIM5 peripheral. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Define to prevent recursive inclusion -------------------------------------*/ 00029 #ifndef __STM8S_TIM5_H 00030 #define __STM8S_TIM5_H 00031 00032 /* Includes ------------------------------------------------------------------*/ 00033 #include "stm8s.h" 00034 00035 /** @addtogroup STM8S_StdPeriph_Driver 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 00041 00042 /** TIM5 Forced Action */ 00043 typedef enum 00044 { 00045 TIM5_FORCEDACTION_ACTIVE =((uint8_t)0x50), 00046 TIM5_FORCEDACTION_INACTIVE =((uint8_t)0x40) 00047 }TIM5_ForcedAction_TypeDef; 00048 00049 #define IS_TIM5_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM5_FORCEDACTION_ACTIVE) || \ 00050 ((ACTION) == TIM5_FORCEDACTION_INACTIVE)) 00051 00052 /** TIM5 Prescaler */ 00053 typedef enum 00054 { 00055 TIM5_PRESCALER_1 =((uint8_t)0x00), 00056 TIM5_PRESCALER_2 =((uint8_t)0x01), 00057 TIM5_PRESCALER_4 =((uint8_t)0x02), 00058 TIM5_PRESCALER_8 =((uint8_t)0x03), 00059 TIM5_PRESCALER_16 =((uint8_t)0x04), 00060 TIM5_PRESCALER_32 =((uint8_t)0x05), 00061 TIM5_PRESCALER_64 =((uint8_t)0x06), 00062 TIM5_PRESCALER_128 =((uint8_t)0x07), 00063 TIM5_PRESCALER_256 =((uint8_t)0x08), 00064 TIM5_PRESCALER_512 =((uint8_t)0x09), 00065 TIM5_PRESCALER_1024 =((uint8_t)0x0A), 00066 TIM5_PRESCALER_2048 =((uint8_t)0x0B), 00067 TIM5_PRESCALER_4096 =((uint8_t)0x0C), 00068 TIM5_PRESCALER_8192 =((uint8_t)0x0D), 00069 TIM5_PRESCALER_16384 =((uint8_t)0x0E), 00070 TIM5_PRESCALER_32768 =((uint8_t)0x0F) 00071 }TIM5_Prescaler_TypeDef; 00072 00073 #define IS_TIM5_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_PRESCALER_1) || \ 00074 ((PRESCALER) == TIM5_PRESCALER_2 ) || \ 00075 ((PRESCALER) == TIM5_PRESCALER_4 ) || \ 00076 ((PRESCALER) == TIM5_PRESCALER_8 ) || \ 00077 ((PRESCALER) == TIM5_PRESCALER_16 ) || \ 00078 ((PRESCALER) == TIM5_PRESCALER_32 ) || \ 00079 ((PRESCALER) == TIM5_PRESCALER_64 ) || \ 00080 ((PRESCALER) == TIM5_PRESCALER_128 ) || \ 00081 ((PRESCALER) == TIM5_PRESCALER_256 ) || \ 00082 ((PRESCALER) == TIM5_PRESCALER_512 ) || \ 00083 ((PRESCALER) == TIM5_PRESCALER_1024 ) || \ 00084 ((PRESCALER) == TIM5_PRESCALER_2048 ) || \ 00085 ((PRESCALER) == TIM5_PRESCALER_4096 ) || \ 00086 ((PRESCALER) == TIM5_PRESCALER_8192 ) || \ 00087 ((PRESCALER) == TIM5_PRESCALER_16384 ) || \ 00088 ((PRESCALER) == TIM5_PRESCALER_32768 )) 00089 00090 /** TIM5 Output Compare and PWM modes */ 00091 typedef enum 00092 { 00093 TIM5_OCMODE_TIMING =((uint8_t)0x00), 00094 TIM5_OCMODE_ACTIVE =((uint8_t)0x10), 00095 TIM5_OCMODE_INACTIVE =((uint8_t)0x20), 00096 TIM5_OCMODE_TOGGLE =((uint8_t)0x30), 00097 TIM5_OCMODE_PWM1 =((uint8_t)0x60), 00098 TIM5_OCMODE_PWM2 =((uint8_t)0x70) 00099 }TIM5_OCMode_TypeDef; 00100 00101 #define IS_TIM5_OC_MODE_OK(MODE) (((MODE) == TIM5_OCMODE_TIMING) || \ 00102 ((MODE) == TIM5_OCMODE_ACTIVE) || \ 00103 ((MODE) == TIM5_OCMODE_INACTIVE) || \ 00104 ((MODE) == TIM5_OCMODE_TOGGLE)|| \ 00105 ((MODE) == TIM5_OCMODE_PWM1) || \ 00106 ((MODE) == TIM5_OCMODE_PWM2)) 00107 00108 #define IS_TIM5_OCM_OK(MODE)(((MODE) == TIM5_OCMODE_TIMING) || \ 00109 ((MODE) == TIM5_OCMODE_ACTIVE) || \ 00110 ((MODE) == TIM5_OCMODE_INACTIVE) || \ 00111 ((MODE) == TIM5_OCMODE_TOGGLE)|| \ 00112 ((MODE) == TIM5_OCMODE_PWM1) || \ 00113 ((MODE) == TIM5_OCMODE_PWM2) || \ 00114 ((MODE) == (uint8_t)TIM5_FORCEDACTION_ACTIVE) || \ 00115 ((MODE) == (uint8_t)TIM5_FORCEDACTION_INACTIVE)) 00116 00117 /** TIM5 One Pulse Mode */ 00118 typedef enum 00119 { 00120 TIM5_OPMODE_SINGLE =((uint8_t)0x01), 00121 TIM5_OPMODE_REPETITIVE =((uint8_t)0x00) 00122 }TIM5_OPMode_TypeDef; 00123 00124 #define IS_TIM5_OPM_MODE_OK(MODE) (((MODE) == TIM5_OPMODE_SINGLE) || \ 00125 ((MODE) == TIM5_OPMODE_REPETITIVE)) 00126 00127 /** TIM5 Channel */ 00128 typedef enum 00129 { 00130 TIM5_CHANNEL_1 =((uint8_t)0x00), 00131 TIM5_CHANNEL_2 =((uint8_t)0x01), 00132 TIM5_CHANNEL_3 =((uint8_t)0x02) 00133 }TIM5_Channel_TypeDef; 00134 00135 #define IS_TIM5_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \ 00136 ((CHANNEL) == TIM5_CHANNEL_2) || \ 00137 ((CHANNEL) == TIM5_CHANNEL_3)) 00138 00139 #define IS_TIM5_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \ 00140 ((CHANNEL) == TIM5_CHANNEL_2)) 00141 00142 /** TIM5 Output Compare Polarity */ 00143 typedef enum 00144 { 00145 TIM5_OCPOLARITY_HIGH =((uint8_t)0x00), 00146 TIM5_OCPOLARITY_LOW =((uint8_t)0x22) 00147 }TIM5_OCPolarity_TypeDef; 00148 00149 #define IS_TIM5_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_OCPOLARITY_HIGH) || \ 00150 ((POLARITY) == TIM5_OCPOLARITY_LOW)) 00151 00152 /** TIM5 Output Compare states */ 00153 typedef enum 00154 { 00155 TIM5_OUTPUTSTATE_DISABLE =((uint8_t)0x00), 00156 TIM5_OUTPUTSTATE_ENABLE =((uint8_t)0x11) 00157 }TIM5_OutputState_TypeDef; 00158 00159 #define IS_TIM5_OUTPUT_STATE_OK(STATE) (((STATE) == TIM5_OUTPUTSTATE_DISABLE) || \ 00160 ((STATE) == TIM5_OUTPUTSTATE_ENABLE)) 00161 00162 /** TIM5 Input Capture Polarity */ 00163 typedef enum 00164 { 00165 TIM5_ICPOLARITY_RISING =((uint8_t)0x00), 00166 TIM5_ICPOLARITY_FALLING =((uint8_t)0x44) 00167 }TIM5_ICPolarity_TypeDef; 00168 00169 #define IS_TIM5_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_ICPOLARITY_RISING) || \ 00170 ((POLARITY) == TIM5_ICPOLARITY_FALLING)) 00171 00172 /** TIM5 Input Capture Selection */ 00173 typedef enum 00174 { 00175 TIM5_ICSELECTION_DIRECTTI =((uint8_t)0x01), 00176 TIM5_ICSELECTION_INDIRECTTI =((uint8_t)0x02), 00177 TIM5_ICSELECTION_TRGI =((uint8_t)0x03) 00178 }TIM5_ICSelection_TypeDef; 00179 00180 #define IS_TIM5_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \ 00181 ((SELECTION) == TIM5_ICSELECTION_INDIRECTTI) || \ 00182 ((SELECTION) == TIM5_ICSELECTION_TRGI)) 00183 00184 #define IS_TIM5_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \ 00185 ((SELECTION) == TIM5_ICSELECTION_TRGI)) 00186 00187 /** TIM5 Input Capture Prescaler */ 00188 typedef enum 00189 { 00190 TIM5_ICPSC_DIV1 =((uint8_t)0x00), 00191 TIM5_ICPSC_DIV2 =((uint8_t)0x04), 00192 TIM5_ICPSC_DIV4 =((uint8_t)0x08), 00193 TIM5_ICPSC_DIV8 =((uint8_t)0x0C) 00194 }TIM5_ICPSC_TypeDef; 00195 00196 #define IS_TIM5_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_ICPSC_DIV1) || \ 00197 ((PRESCALER) == TIM5_ICPSC_DIV2) || \ 00198 ((PRESCALER) == TIM5_ICPSC_DIV4) || \ 00199 ((PRESCALER) == TIM5_ICPSC_DIV8)) 00200 00201 /** TIM5 Input Capture Filer Value */ 00202 #define IS_TIM5_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) 00203 00204 /** TIM5 interrupt sources */ 00205 typedef enum 00206 { 00207 TIM5_IT_UPDATE =((uint8_t)0x01), 00208 TIM5_IT_CC1 =((uint8_t)0x02), 00209 TIM5_IT_CC2 =((uint8_t)0x04), 00210 TIM5_IT_CC3 =((uint8_t)0x08), 00211 TIM5_IT_TRIGGER = ((uint8_t)0x40) 00212 }TIM5_IT_TypeDef; 00213 00214 #define IS_TIM5_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x4F)) 00215 00216 #define IS_TIM5_GET_IT_OK(IT) (((IT) == TIM5_IT_UPDATE) || \ 00217 ((IT) == TIM5_IT_CC1) || \ 00218 ((IT) == TIM5_IT_CC2) || \ 00219 ((IT) == TIM5_IT_CC3) || \ 00220 ((IT) == TIM5_IT_TRIGGER)) 00221 00222 /** TIM5 Prescaler Reload Mode */ 00223 typedef enum 00224 { 00225 TIM5_PSCRELOADMODE_UPDATE =((uint8_t)0x00), 00226 TIM5_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01) 00227 }TIM5_PSCReloadMode_TypeDef; 00228 00229 #define IS_TIM5_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM5_PSCRELOADMODE_UPDATE) || \ 00230 ((RELOAD) == TIM5_PSCRELOADMODE_IMMEDIATE)) 00231 00232 /** TIM5 Event Source */ 00233 typedef enum 00234 { 00235 TIM5_EVENTSOURCE_UPDATE =((uint8_t)0x01), 00236 TIM5_EVENTSOURCE_CC1 =((uint8_t)0x02), 00237 TIM5_EVENTSOURCE_CC2 =((uint8_t)0x04), 00238 TIM5_EVENTSOURCE_CC3 =((uint8_t)0x08), 00239 TIM5_EVENTSOURCE_TRIGGER = ((uint8_t)0x40) 00240 }TIM5_EventSource_TypeDef; 00241 00242 #define IS_TIM5_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) 00243 00244 /** TIM5 Update Source */ 00245 typedef enum 00246 { 00247 TIM5_UPDATESOURCE_GLOBAL =((uint8_t)0x00), 00248 TIM5_UPDATESOURCE_REGULAR =((uint8_t)0x01) 00249 }TIM5_UpdateSource_TypeDef; 00250 00251 00252 #define IS_TIM5_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM5_UPDATESOURCE_GLOBAL) || \ 00253 ((SOURCE) == TIM5_UPDATESOURCE_REGULAR)) 00254 00255 /** 00256 * @brief TIM5 Trigger Output Source 00257 */ 00258 typedef enum 00259 { 00260 TIM5_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/ 00261 TIM5_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/ 00262 TIM5_TRGOSOURCE_UPDATE = ((uint8_t)0x20), /*!< Trigger Output source = Update event*/ 00263 TIM5_TRGOSOURCE_OC1 = ((uint8_t)0x30), /*!< Trigger Output source = output compare channel1 */ 00264 TIM5_TRGOSOURCE_OC1REF = ((uint8_t)0x40), /*!< Trigger Output source = output compare channel 1 reference */ 00265 TIM5_TRGOSOURCE_OC2REF = ((uint8_t)0x50) /*!< Trigger Output source = output compare channel 2 reference */ 00266 }TIM5_TRGOSource_TypeDef; 00267 00268 /** 00269 * @brief Macro TIM5 TRGO source 00270 */ 00271 #define IS_TIM5_TRGO_SOURCE_OK(SOURCE) \ 00272 (((SOURCE) == TIM5_TRGOSOURCE_RESET) || \ 00273 ((SOURCE) == TIM5_TRGOSOURCE_ENABLE) || \ 00274 ((SOURCE) == TIM5_TRGOSOURCE_UPDATE) || \ 00275 ((SOURCE) == TIM5_TRGOSOURCE_OC1) || \ 00276 ((SOURCE) == TIM5_TRGOSOURCE_OC1REF) || \ 00277 ((SOURCE) == TIM5_TRGOSOURCE_OC2REF)) 00278 00279 /** TIM5 Flags */ 00280 typedef enum 00281 { 00282 TIM5_FLAG_UPDATE =((uint16_t)0x0001), 00283 TIM5_FLAG_CC1 =((uint16_t)0x0002), 00284 TIM5_FLAG_CC2 =((uint16_t)0x0004), 00285 TIM5_FLAG_CC3 =((uint16_t)0x0008), 00286 TIM5_FLAG_TRIGGER = ((uint16_t)0x0040), 00287 TIM5_FLAG_CC1OF =((uint16_t)0x0200), 00288 TIM5_FLAG_CC2OF =((uint16_t)0x0400), 00289 TIM5_FLAG_CC3OF =((uint16_t)0x0800) 00290 }TIM5_FLAG_TypeDef; 00291 00292 #define IS_TIM5_GET_FLAG_OK(FLAG) (((FLAG) == TIM5_FLAG_UPDATE) || \ 00293 ((FLAG) == TIM5_FLAG_CC1) || \ 00294 ((FLAG) == TIM5_FLAG_CC2) || \ 00295 ((FLAG) == TIM5_FLAG_CC3) || \ 00296 ((FLAG) == TIM5_FLAG_TRIGGER) || \ 00297 ((FLAG) == TIM5_FLAG_CC1OF) || \ 00298 ((FLAG) == TIM5_FLAG_CC2OF) || \ 00299 ((FLAG) == TIM5_FLAG_CC3OF)) 00300 00301 #define IS_TIM5_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000)) 00302 00303 00304 /** 00305 * @brief TIM5 Slave Mode 00306 */ 00307 typedef enum 00308 { 00309 TIM5_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/ 00310 TIM5_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/ 00311 TIM5_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/ 00312 TIM5_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/ 00313 }TIM5_SlaveMode_TypeDef; 00314 00315 /** 00316 * @brief Macro TIM5 Slave mode 00317 */ 00318 #define IS_TIM5_SLAVE_MODE_OK(MODE) \ 00319 (((MODE) == TIM5_SLAVEMODE_RESET) || \ 00320 ((MODE) == TIM5_SLAVEMODE_GATED) || \ 00321 ((MODE) == TIM5_SLAVEMODE_TRIGGER) || \ 00322 ((MODE) == TIM5_SLAVEMODE_EXTERNAL1)) 00323 00324 /** 00325 * @brief TIM5 Internal Trigger Selection 00326 */ 00327 typedef enum 00328 { 00329 TIM5_TS_TIM6 = ((uint8_t)0x00), /*!< TRIG Input source = TIM6 TRIG Output */ 00330 TIM5_TS_TIM1 = ((uint8_t)0x03) /*!< TRIG Input source = TIM1 TRIG Output */ 00331 }TIM5_TS_TypeDef; 00332 00333 /** 00334 * @brief Macro TIM5 Trigger Selection 00335 */ 00336 #define IS_TIM5_TRIGGER_SELECTION_OK(SELECTION) \ 00337 (((SELECTION) == TIM5_TS_TIM6) || \ 00338 ((SELECTION) == TIM5_TS_TIM1) ) 00339 00340 00341 #define IS_TIM5_TIX_TRIGGER_SELECTION_OK(SELECTION) \ 00342 (((SELECTION) == TIM5_TS_TI1F_ED) || \ 00343 ((SELECTION) == TIM5_TS_TI1FP1) || \ 00344 ((SELECTION) == TIM5_TS_TI2FP2)) 00345 00346 00347 /** 00348 * @brief TIM5 Encoder Mode 00349 */ 00350 typedef enum 00351 { 00352 TIM5_ENCODERMODE_TI1 = ((uint8_t)0x01), /*!< Encoder mode 1*/ 00353 TIM5_ENCODERMODE_TI2 = ((uint8_t)0x02), /*!< Encoder mode 2*/ 00354 TIM5_ENCODERMODE_TI12 = ((uint8_t)0x03) /*!< Encoder mode 3*/ 00355 }TIM5_EncoderMode_TypeDef; 00356 /** 00357 * @brief Macro TIM5 encoder mode 00358 */ 00359 #define IS_TIM5_ENCODER_MODE_OK(MODE) \ 00360 (((MODE) == TIM5_ENCODERMODE_TI1) || \ 00361 ((MODE) == TIM5_ENCODERMODE_TI2) || \ 00362 ((MODE) == TIM5_ENCODERMODE_TI12)) 00363 00364 /** 00365 * @brief TIM5 External Trigger Prescaler 00366 */ 00367 typedef enum 00368 { 00369 TIM5_EXTTRGPSC_OFF = ((uint8_t)0x00), /*!< No External Trigger prescaler */ 00370 TIM5_EXTTRGPSC_DIV2 = ((uint8_t)0x10), /*!< External Trigger prescaler = 2 (ETRP frequency divided by 2) */ 00371 TIM5_EXTTRGPSC_DIV4 = ((uint8_t)0x20), /*!< External Trigger prescaler = 4 (ETRP frequency divided by 4) */ 00372 TIM5_EXTTRGPSC_DIV8 = ((uint8_t)0x30) /*!< External Trigger prescaler = 8 (ETRP frequency divided by 8) */ 00373 }TIM5_ExtTRGPSC_TypeDef; 00374 00375 /** 00376 * @brief Macro TIM5 external trigger prescaler 00377 */ 00378 #define IS_TIM5_EXT_PRESCALER_OK(PRESCALER) \ 00379 (((PRESCALER) == TIM5_EXTTRGPSC_OFF) || \ 00380 ((PRESCALER) == TIM5_EXTTRGPSC_DIV2) || \ 00381 ((PRESCALER) == TIM5_EXTTRGPSC_DIV4) || \ 00382 ((PRESCALER) == TIM5_EXTTRGPSC_DIV8)) 00383 00384 /** 00385 * @brief TIM5 External Trigger Polarity 00386 */ 00387 typedef enum 00388 { 00389 TIM5_EXTTRGPOLARITY_INVERTED = ((uint8_t)0x80), /*!< External Trigger Polarity = inverted */ 00390 TIM5_EXTTRGPOLARITY_NONINVERTED = ((uint8_t)0x00) /*!< External Trigger Polarity = non inverted */ 00391 }TIM5_ExtTRGPolarity_TypeDef; 00392 00393 /** 00394 * @brief Macro TIM5 Trigger Polarity 00395 */ 00396 #define IS_TIM5_EXT_POLARITY_OK(POLARITY) \ 00397 (((POLARITY) == TIM5_EXTTRGPOLARITY_INVERTED) || \ 00398 ((POLARITY) == TIM5_EXTTRGPOLARITY_NONINVERTED)) 00399 00400 /** 00401 * @brief Macro TIM5 External Trigger Filter 00402 */ 00403 #define IS_TIM5_EXT_FILTER_OK(EXTFILTER) ((EXTFILTER) <= 0x0F) 00404 /** 00405 * @} 00406 */ 00407 00408 /* Exported macro ------------------------------------------------------------*/ 00409 00410 /* Exported functions --------------------------------------------------------*/ 00411 00412 /** @addtogroup TIM5_Exported_Functions 00413 * @{ 00414 */ 00415 00416 void TIM5_DeInit(void); 00417 void TIM5_TimeBaseInit(TIM5_Prescaler_TypeDef TIM5_Prescaler, uint16_t TIM5_Period); 00418 void TIM5_OC1Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); 00419 void TIM5_OC2Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); 00420 void TIM5_OC3Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); 00421 void TIM5_ICInit(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter); 00422 void TIM5_PWMIConfig(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter); 00423 void TIM5_Cmd(FunctionalState NewState); 00424 void TIM5_ITConfig(TIM5_IT_TypeDef TIM5_IT, FunctionalState NewState); 00425 void TIM5_InternalClockConfig(void); 00426 void TIM5_UpdateDisableConfig(FunctionalState NewState); 00427 void TIM5_UpdateRequestConfig(TIM5_UpdateSource_TypeDef TIM5_UpdateSource); 00428 void TIM5_SelectOnePulseMode(TIM5_OPMode_TypeDef TIM5_OPMode); 00429 void TIM5_PrescalerConfig(TIM5_Prescaler_TypeDef Prescaler, TIM5_PSCReloadMode_TypeDef TIM5_PSCReloadMode); 00430 void TIM5_SelectOutputTrigger(TIM5_TRGOSource_TypeDef TIM5_TRGOSource); 00431 void TIM5_ForcedOC1Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); 00432 void TIM5_ForcedOC2Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); 00433 void TIM5_ForcedOC3Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); 00434 void TIM5_ARRPreloadConfig(FunctionalState NewState); 00435 void TIM5_CCPreloadControl(FunctionalState NewState); 00436 void TIM5_OC1PreloadConfig(FunctionalState NewState); 00437 void TIM5_OC2PreloadConfig(FunctionalState NewState); 00438 void TIM5_OC3PreloadConfig(FunctionalState NewState); 00439 void TIM5_GenerateEvent(TIM5_EventSource_TypeDef TIM5_EventSource); 00440 void TIM5_OC1PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); 00441 void TIM5_OC2PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); 00442 void TIM5_OC3PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); 00443 void TIM5_CCxCmd(TIM5_Channel_TypeDef TIM5_Channel, FunctionalState NewState); 00444 void TIM5_SelectOCxM(TIM5_Channel_TypeDef TIM5_Channel, TIM5_OCMode_TypeDef TIM5_OCMode); 00445 void TIM5_SetCounter(uint16_t Counter); 00446 void TIM5_SetAutoreload(uint16_t Autoreload); 00447 void TIM5_SetCompare1(uint16_t Compare1); 00448 void TIM5_SetCompare2(uint16_t Compare2); 00449 void TIM5_SetCompare3(uint16_t Compare3); 00450 void TIM5_SetIC1Prescaler(TIM5_ICPSC_TypeDef TIM5_IC1Prescaler); 00451 void TIM5_SetIC2Prescaler(TIM5_ICPSC_TypeDef TIM5_IC2Prescaler); 00452 void TIM5_SetIC3Prescaler(TIM5_ICPSC_TypeDef TIM5_IC3Prescaler); 00453 uint16_t TIM5_GetCapture1(void); 00454 uint16_t TIM5_GetCapture2(void); 00455 uint16_t TIM5_GetCapture3(void); 00456 uint16_t TIM5_GetCounter(void); 00457 TIM5_Prescaler_TypeDef TIM5_GetPrescaler(void); 00458 FlagStatus TIM5_GetFlagStatus(TIM5_FLAG_TypeDef TIM5_FLAG); 00459 void TIM5_ClearFlag(TIM5_FLAG_TypeDef TIM5_FLAG); 00460 ITStatus TIM5_GetITStatus(TIM5_IT_TypeDef TIM5_IT); 00461 void TIM5_ClearITPendingBit(TIM5_IT_TypeDef TIM5_IT); 00462 void TIM5_SelectInputTrigger(TIM5_TS_TypeDef TIM5_InputTriggerSource); 00463 void TIM5_SelectSlaveMode(TIM5_SlaveMode_TypeDef TIM5_SlaveMode); 00464 void TIM5_EncoderInterfaceConfig(TIM5_EncoderMode_TypeDef TIM5_EncoderMode, TIM5_ICPolarity_TypeDef TIM5_IC1Polarity,TIM5_ICPolarity_TypeDef TIM5_IC2Polarity); 00465 00466 00467 /** 00468 * @} 00469 */ 00470 00471 #endif /* __STM8S_TIM5_H */ 00472 00473 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/