Frequency Tuning Times

Many factors contribute to NI RF signal generator frequency tuning times. One factor is the amount of time required for the NI 5610 upconverter phase-locked loop (PLL) to lock to a new frequency. Because the NI RF signal generator is an AWG-based vector signal generator, tuning times must also account for the time to configure the AWG module. This configuration time may include recalculating and writing a new waveform to the AWG module onboard memory.

If a new waveform is not written to the AWG module, the AWG module frequency settling time is 0 ms. Writing a new waveform is not required when the NI RF signal generator is tuned in steps of 1 MHz (when using signal bandwidths greater than 10 MHz) or steps of 5 MHz (when using signal bandwidths less than or equal to 10 MHz).

Upconverter Module Frequency Tuning Time

When the frequency is changed in a PLL system, the signal loses its lock on the initial frequency and achieves a lock on the new final frequency. The signal takes time to settle to within the frequency tolerance of the final frequency. Furthermore, the tolerance may be set to a ratio of the step frequency size. For example, in GSM, the signal must settle to less than 2 ppm of the frequency step size in about 860 ms. Tuning speed is defined as the time required by the signal to lose its lock on one specific frequency and jump to another specific frequency within a specified frequency tolerance.

The upconverter module front panel ACTIVE LED indicates hardware PLL lock status. The ACTIVE LED indicator turns green when five consecutive pairs of comparison clock cycles are within 15 ns of each other, so it is possible that the signal has not yet settled to within the specified tolerance when the hardware lock ACTIVE LED indicator is lit. To provide a clearer understanding of the hardware lock times, a table of upconverter module PLL lock times for different tuning step sizes is provided in the following table.

The upconverter module tunes in steps of 1 MHz (when using signal bandwidths greater than 10 MHz), or steps of 5 MHz (when using signal bandwidths less than or equal to 10 MHz). Upconverter-only (for example, CW generation mode) tuning times are specified in the preceding table.

Note  The frequency tuning step size is equal to 5 MHz when the PLL bandwidth is set to LOW using the Signal Bandwidth (Hz) property or the NIRFSG_ATTR_SIGNAL_BANDWIDTH attribute.