STM8S/A Standard Peripherals Drivers: stm8s_uart1.c Source File

STM8S/A

stm8s_uart1.c
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00001 /**
00002   ********************************************************************************
00003   * @file    stm8s_uart1.c
00004   * @author  MCD Application Team
00005   * @version V2.3.0
00006   * @date    16-June-2017
00007   * @brief   This file contains all the functions for the UART1 peripheral.
00008    ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
00012   *
00013   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00014   * You may not use this file except in compliance with the License.
00015   * You may obtain a copy of the License at:
00016   *
00017   *        http://www.st.com/software_license_agreement_liberty_v2
00018   *
00019   * Unless required by applicable law or agreed to in writing, software 
00020   * distributed under the License is distributed on an "AS IS" BASIS, 
00021   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00022   * See the License for the specific language governing permissions and
00023   * limitations under the License.
00024   *
00025   ******************************************************************************
00026   */
00027 
00028 /* Includes ------------------------------------------------------------------*/
00029 #include "stm8s_uart1.h"
00030 
00031 /** @addtogroup STM8S_StdPeriph_Driver
00032   * @{
00033   */
00034 
00035 /* Private typedef -----------------------------------------------------------*/
00036 /* Private define ------------------------------------------------------------*/
00037 /* Private macro -------------------------------------------------------------*/
00038 /* Private variables ---------------------------------------------------------*/
00039 /* Private function prototypes -----------------------------------------------*/
00040 /* Private functions ---------------------------------------------------------*/
00041 /* Public functions ----------------------------------------------------------*/
00042 
00043 /**
00044   * @addtogroup UART1_Public_Functions
00045   * @{
00046   */
00047 
00048 /**
00049   * @brief  Deinitializes the UART peripheral.
00050   * @param  None
00051   * @retval None
00052         */
00053 void UART1_DeInit(void)
00054 {
00055   /* Clear the Idle Line Detected bit in the status register by a read
00056   to the UART1_SR register followed by a Read to the UART1_DR register */
00057   (void)UART1->SR;
00058   (void)UART1->DR;
00059   
00060   UART1->BRR2 = UART1_BRR2_RESET_VALUE;  /* Set UART1_BRR2 to reset value 0x00 */
00061   UART1->BRR1 = UART1_BRR1_RESET_VALUE;  /* Set UART1_BRR1 to reset value 0x00 */
00062   
00063   UART1->CR1 = UART1_CR1_RESET_VALUE;  /* Set UART1_CR1 to reset value 0x00 */
00064   UART1->CR2 = UART1_CR2_RESET_VALUE;  /* Set UART1_CR2 to reset value 0x00 */
00065   UART1->CR3 = UART1_CR3_RESET_VALUE;  /* Set UART1_CR3 to reset value 0x00 */
00066   UART1->CR4 = UART1_CR4_RESET_VALUE;  /* Set UART1_CR4 to reset value 0x00 */
00067   UART1->CR5 = UART1_CR5_RESET_VALUE;  /* Set UART1_CR5 to reset value 0x00 */
00068   
00069   UART1->GTR = UART1_GTR_RESET_VALUE;
00070   UART1->PSCR = UART1_PSCR_RESET_VALUE;
00071 }
00072 
00073 /**
00074   * @brief  Initializes the UART1 according to the specified parameters.
00075   * @note   Configure in Push Pull or Open Drain mode the Tx pin by setting the
00076   *         correct I/O Port register according the product package and line
00077   *         configuration
00078   * @param  BaudRate: The baudrate.
00079   * @param  WordLength : This parameter can be any of the 
00080   *         @ref UART1_WordLength_TypeDef enumeration.
00081   * @param  StopBits: This parameter can be any of the 
00082   *         @ref UART1_StopBits_TypeDef enumeration.
00083   * @param  Parity: This parameter can be any of the 
00084   *         @ref UART1_Parity_TypeDef enumeration.
00085   * @param  SyncMode: This parameter can be any of the 
00086   *         @ref UART1_SyncMode_TypeDef values.
00087   * @param  Mode: This parameter can be any of the @ref UART1_Mode_TypeDef values
00088   * @retval None
00089   */
00090 void UART1_Init(uint32_t BaudRate, UART1_WordLength_TypeDef WordLength, 
00091                 UART1_StopBits_TypeDef StopBits, UART1_Parity_TypeDef Parity, 
00092                 UART1_SyncMode_TypeDef SyncMode, UART1_Mode_TypeDef Mode)
00093 {
00094   uint32_t BaudRate_Mantissa = 0, BaudRate_Mantissa100 = 0;
00095   
00096   /* Check the parameters */
00097   assert_param(IS_UART1_BAUDRATE_OK(BaudRate));
00098   assert_param(IS_UART1_WORDLENGTH_OK(WordLength));
00099   assert_param(IS_UART1_STOPBITS_OK(StopBits));
00100   assert_param(IS_UART1_PARITY_OK(Parity));
00101   assert_param(IS_UART1_MODE_OK((uint8_t)Mode));
00102   assert_param(IS_UART1_SYNCMODE_OK((uint8_t)SyncMode));
00103   
00104   /* Clear the word length bit */
00105   UART1->CR1 &= (uint8_t)(~UART1_CR1_M);  
00106   
00107   /* Set the word length bit according to UART1_WordLength value */
00108   UART1->CR1 |= (uint8_t)WordLength;
00109   
00110   /* Clear the STOP bits */
00111   UART1->CR3 &= (uint8_t)(~UART1_CR3_STOP);  
00112   /* Set the STOP bits number according to UART1_StopBits value  */
00113   UART1->CR3 |= (uint8_t)StopBits;  
00114   
00115   /* Clear the Parity Control bit */
00116   UART1->CR1 &= (uint8_t)(~(UART1_CR1_PCEN | UART1_CR1_PS  ));  
00117   /* Set the Parity Control bit to UART1_Parity value */
00118   UART1->CR1 |= (uint8_t)Parity;  
00119   
00120   /* Clear the LSB mantissa of UART1DIV  */
00121   UART1->BRR1 &= (uint8_t)(~UART1_BRR1_DIVM);  
00122   /* Clear the MSB mantissa of UART1DIV  */
00123   UART1->BRR2 &= (uint8_t)(~UART1_BRR2_DIVM);  
00124   /* Clear the Fraction bits of UART1DIV */
00125   UART1->BRR2 &= (uint8_t)(~UART1_BRR2_DIVF);  
00126   
00127   /* Set the UART1 BaudRates in BRR1 and BRR2 registers according to UART1_BaudRate value */
00128   BaudRate_Mantissa    = ((uint32_t)CLK_GetClockFreq() / (BaudRate << 4));
00129   BaudRate_Mantissa100 = (((uint32_t)CLK_GetClockFreq() * 100) / (BaudRate << 4));
00130   /* Set the fraction of UART1DIV  */
00131   UART1->BRR2 |= (uint8_t)((uint8_t)(((BaudRate_Mantissa100 - (BaudRate_Mantissa * 100)) << 4) / 100) & (uint8_t)0x0F); 
00132   /* Set the MSB mantissa of UART1DIV  */
00133   UART1->BRR2 |= (uint8_t)((BaudRate_Mantissa >> 4) & (uint8_t)0xF0); 
00134   /* Set the LSB mantissa of UART1DIV  */
00135   UART1->BRR1 |= (uint8_t)BaudRate_Mantissa;           
00136   
00137   /* Disable the Transmitter and Receiver before setting the LBCL, CPOL and CPHA bits */
00138   UART1->CR2 &= (uint8_t)~(UART1_CR2_TEN | UART1_CR2_REN); 
00139   /* Clear the Clock Polarity, lock Phase, Last Bit Clock pulse */
00140   UART1->CR3 &= (uint8_t)~(UART1_CR3_CPOL | UART1_CR3_CPHA | UART1_CR3_LBCL); 
00141   /* Set the Clock Polarity, lock Phase, Last Bit Clock pulse */
00142   UART1->CR3 |= (uint8_t)((uint8_t)SyncMode & (uint8_t)(UART1_CR3_CPOL | 
00143                                                         UART1_CR3_CPHA | UART1_CR3_LBCL));  
00144   
00145   if ((uint8_t)(Mode & UART1_MODE_TX_ENABLE))
00146   {
00147     /* Set the Transmitter Enable bit */
00148     UART1->CR2 |= (uint8_t)UART1_CR2_TEN;  
00149   }
00150   else
00151   {
00152     /* Clear the Transmitter Disable bit */
00153     UART1->CR2 &= (uint8_t)(~UART1_CR2_TEN);  
00154   }
00155   if ((uint8_t)(Mode & UART1_MODE_RX_ENABLE))
00156   {
00157     /* Set the Receiver Enable bit */
00158     UART1->CR2 |= (uint8_t)UART1_CR2_REN;  
00159   }
00160   else
00161   {
00162     /* Clear the Receiver Disable bit */
00163     UART1->CR2 &= (uint8_t)(~UART1_CR2_REN);  
00164   }
00165   /* Set the Clock Enable bit, lock Polarity, lock Phase and Last Bit Clock 
00166   pulse bits according to UART1_Mode value */
00167   if ((uint8_t)(SyncMode & UART1_SYNCMODE_CLOCK_DISABLE))
00168   {
00169     /* Clear the Clock Enable bit */
00170     UART1->CR3 &= (uint8_t)(~UART1_CR3_CKEN); 
00171   }
00172   else
00173   {
00174     UART1->CR3 |= (uint8_t)((uint8_t)SyncMode & UART1_CR3_CKEN);
00175   }
00176 }
00177 
00178 /**
00179   * @brief  Enable the UART1 peripheral.
00180   * @param  NewState : The new state of the UART Communication.
00181   *         This parameter can be any of the @ref FunctionalState enumeration.
00182   * @retval None
00183   */
00184 void UART1_Cmd(FunctionalState NewState)
00185 {
00186   if (NewState != DISABLE)
00187   {
00188     /* UART1 Enable */
00189     UART1->CR1 &= (uint8_t)(~UART1_CR1_UARTD); 
00190   }
00191   else
00192   {
00193     /* UART Disable */
00194     UART1->CR1 |= UART1_CR1_UARTD;  
00195   }
00196 }
00197 
00198 /**
00199   * @brief  Enables or disables the specified USART interrupts.
00200   * @param  UART1_IT specifies the USART interrupt sources to be enabled or disabled.
00201   *         This parameter can be one of the following values:
00202   *         - UART1_IT_TXE:  Transmit Data Register empty interrupt
00203   *         - UART1_IT_TC:   Transmission complete interrupt
00204   *         - UART1_IT_RXNE_OR: Receive Data register not empty and Overrun interrupt
00205   *         - UART1_IT_IDLE: Idle line detection interrupt
00206   *         - USRT1_IT_ERR:  Error interrupt
00207   * @param  NewState new state of the specified USART interrupts.
00208   *         This parameter can be: ENABLE or DISABLE.
00209   * @retval None
00210   */
00211 void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState)
00212 {
00213   uint8_t uartreg = 0, itpos = 0x00;
00214   
00215   /* Check the parameters */
00216   assert_param(IS_UART1_CONFIG_IT_OK(UART1_IT));
00217   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
00218   
00219   /* Get the UART1 register index */
00220   uartreg = (uint8_t)((uint16_t)UART1_IT >> 0x08);
00221   /* Get the UART1 IT index */
00222   itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART1_IT & (uint8_t)0x0F));
00223   
00224   if (NewState != DISABLE)
00225   {
00226     /**< Enable the Interrupt bits according to UART1_IT mask */
00227     if (uartreg == 0x01)
00228     {
00229       UART1->CR1 |= itpos;
00230     }
00231     else if (uartreg == 0x02)
00232     {
00233       UART1->CR2 |= itpos;
00234     }
00235     else
00236     {
00237       UART1->CR4 |= itpos;
00238     }
00239   }
00240   else
00241   {
00242     /**< Disable the interrupt bits according to UART1_IT mask */
00243     if (uartreg == 0x01)
00244     {
00245       UART1->CR1 &= (uint8_t)(~itpos);
00246     }
00247     else if (uartreg == 0x02)
00248     {
00249       UART1->CR2 &= (uint8_t)(~itpos);
00250     }
00251     else
00252     {
00253       UART1->CR4 &= (uint8_t)(~itpos);
00254     }
00255   }
00256   
00257 }
00258 
00259 /**
00260   * @brief  Enables or disables the UART�s Half Duplex communication.
00261   * @param  NewState new state of the UART Communication.
00262   *         This parameter can be: ENABLE or DISABLE.
00263   * @retval None
00264   */
00265 void UART1_HalfDuplexCmd(FunctionalState NewState)
00266 {
00267   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
00268   
00269   if (NewState != DISABLE)
00270   {
00271     UART1->CR5 |= UART1_CR5_HDSEL;  /**< UART1 Half Duplex Enable  */
00272   }
00273   else
00274   {
00275     UART1->CR5 &= (uint8_t)~UART1_CR5_HDSEL; /**< UART1 Half Duplex Disable */
00276   }
00277 }
00278 
00279 /**
00280   * @brief  Configures the UART�s IrDA interface.
00281   * @param  UART1_IrDAMode specifies the IrDA mode.
00282   *         This parameter can be any of the @ref UART1_IrDAMode_TypeDef values.
00283   * @retval None
00284   */
00285 void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode)
00286 {
00287   assert_param(IS_UART1_IRDAMODE_OK(UART1_IrDAMode));
00288   
00289   if (UART1_IrDAMode != UART1_IRDAMODE_NORMAL)
00290   {
00291     UART1->CR5 |= UART1_CR5_IRLP;
00292   }
00293   else
00294   {
00295     UART1->CR5 &= ((uint8_t)~UART1_CR5_IRLP);
00296   }
00297 }
00298 
00299 /**
00300   * @brief  Enables or disables the UART�s IrDA interface.
00301   * @param  NewState new state of the IrDA mode.
00302   *         This parameter can be: ENABLE or DISABLE.
00303   * @retval None
00304   */
00305 void UART1_IrDACmd(FunctionalState NewState)
00306 {
00307   /* Check parameters */
00308   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
00309   
00310   if (NewState != DISABLE)
00311   {
00312     /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
00313     UART1->CR5 |= UART1_CR5_IREN;
00314   }
00315   else
00316   {
00317     /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
00318     UART1->CR5 &= ((uint8_t)~UART1_CR5_IREN);
00319   }
00320 }
00321 
00322 /**
00323   * @brief  Sets the UART1 LIN Break detection length.
00324   * @param  UART1_LINBreakDetectionLength specifies the LIN break detection length.
00325   *         This parameter can be any of the
00326   *         @ref UART1_LINBreakDetectionLength_TypeDef values.
00327   * @retval None
00328   */
00329 void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_LINBreakDetectionLength)
00330 {
00331   assert_param(IS_UART1_LINBREAKDETECTIONLENGTH_OK(UART1_LINBreakDetectionLength));
00332   
00333   if (UART1_LINBreakDetectionLength != UART1_LINBREAKDETECTIONLENGTH_10BITS)
00334   {
00335     UART1->CR4 |= UART1_CR4_LBDL;
00336   }
00337   else
00338   {
00339     UART1->CR4 &= ((uint8_t)~UART1_CR4_LBDL);
00340   }
00341 }
00342 
00343 /**
00344   * @brief  Enables or disables the UART1�s LIN mode.
00345   * @param  NewState is new state of the UART1 LIN mode.
00346   *         This parameter can be: ENABLE or DISABLE.
00347   * @retval None
00348   */
00349 void UART1_LINCmd(FunctionalState NewState)
00350 {
00351   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
00352   
00353   if (NewState != DISABLE)
00354   {
00355     /* Enable the LIN mode by setting the LINE bit in the CR2 register */
00356     UART1->CR3 |= UART1_CR3_LINEN;
00357   }
00358   else
00359   {
00360     /* Disable the LIN mode by clearing the LINE bit in the CR2 register */
00361     UART1->CR3 &= ((uint8_t)~UART1_CR3_LINEN);
00362   }
00363 }
00364 
00365 /**
00366   * @brief  Enables or disables the UART1 Smart Card mode.
00367   * @param  NewState: new state of the Smart Card mode.
00368   * This parameter can be: ENABLE or DISABLE.
00369   * @retval None
00370   */
00371 void UART1_SmartCardCmd(FunctionalState NewState)
00372 {
00373   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
00374   
00375   if (NewState != DISABLE)
00376   {
00377     /* Enable the SC mode by setting the SCEN bit in the CR5 register */
00378     UART1->CR5 |= UART1_CR5_SCEN;
00379   }
00380   else
00381   {
00382     /* Disable the SC mode by clearing the SCEN bit in the CR5 register */
00383     UART1->CR5 &= ((uint8_t)(~UART1_CR5_SCEN));
00384   }
00385 }
00386 
00387 /**
00388   * @brief  Enables or disables NACK transmission.
00389   * @note   This function is valid only for UART1 because is related to SmartCard mode.
00390   * @param  NewState: new state of the Smart Card mode.
00391   *         This parameter can be: ENABLE or DISABLE.
00392   * @retval None
00393   */
00394 void UART1_SmartCardNACKCmd(FunctionalState NewState)
00395 {
00396   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
00397   
00398   if (NewState != DISABLE)
00399   {
00400     /* Enable the NACK transmission by setting the NACK bit in the CR5 register */
00401     UART1->CR5 |= UART1_CR5_NACK;
00402   }
00403   else
00404   {
00405     /* Disable the NACK transmission by clearing the NACK bit in the CR5 register */
00406     UART1->CR5 &= ((uint8_t)~(UART1_CR5_NACK));
00407   }
00408 }
00409 
00410 /**
00411   * @brief  Selects the UART1 WakeUp method.
00412   * @param  UART1_WakeUp: specifies the UART1 wakeup method.
00413   *         This parameter can be any of the @ref UART1_WakeUp_TypeDef values.
00414   * @retval None
00415   */
00416 void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp)
00417 {
00418   assert_param(IS_UART1_WAKEUP_OK(UART1_WakeUp));
00419   
00420   UART1->CR1 &= ((uint8_t)~UART1_CR1_WAKE);
00421   UART1->CR1 |= (uint8_t)UART1_WakeUp;
00422 }
00423 
00424 /**
00425   * @brief  Determines if the UART1 is in mute mode or not.
00426   * @param  NewState: new state of the UART1 mode.
00427   *         This parameter can be: ENABLE or DISABLE.
00428   * @retval None
00429   */
00430 void UART1_ReceiverWakeUpCmd(FunctionalState NewState)
00431 {
00432   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
00433   
00434   if (NewState != DISABLE)
00435   {
00436     /* Enable the mute mode UART1 by setting the RWU bit in the CR2 register */
00437     UART1->CR2 |= UART1_CR2_RWU;
00438   }
00439   else
00440   {
00441     /* Disable the mute mode UART1 by clearing the RWU bit in the CR1 register */
00442     UART1->CR2 &= ((uint8_t)~UART1_CR2_RWU);
00443   }
00444 }
00445 
00446 /**
00447   * @brief  Returns the most recent received data by the UART1 peripheral.
00448   * @param  None
00449   * @retval The received data.
00450   */
00451 uint8_t UART1_ReceiveData8(void)
00452 {
00453   return ((uint8_t)UART1->DR);
00454 }
00455 
00456 /**
00457   * @brief  Returns the most recent received data by the UART1 peripheral.
00458   * @param  None
00459   * @retval The received data.
00460   */
00461 uint16_t UART1_ReceiveData9(void)
00462 {
00463   uint16_t temp = 0;
00464   
00465   temp = (uint16_t)(((uint16_t)( (uint16_t)UART1->CR1 & (uint16_t)UART1_CR1_R8)) << 1);
00466   return (uint16_t)( (((uint16_t) UART1->DR) | temp ) & ((uint16_t)0x01FF));
00467 }
00468 
00469 /**
00470   * @brief  Transmits 8 bit data through the UART1 peripheral.
00471   * @param  Data: The data to transmit.
00472   * @retval None
00473   */
00474 void UART1_SendData8(uint8_t Data)
00475 {
00476   /* Transmit Data */
00477   UART1->DR = Data;
00478 }
00479 
00480 /**
00481   * @brief  Transmits 9 bit data through the UART peripheral.
00482   * @param  Data : The data to transmit.
00483   *         This parameter should be lower than 0x1FF.
00484   * @retval None
00485   */
00486 void UART1_SendData9(uint16_t Data)
00487 {
00488   /**< Clear the transmit data bit 8 [8]  */
00489   UART1->CR1 &= ((uint8_t)~UART1_CR1_T8);
00490   /**< Write the transmit data bit [8]  */
00491   UART1->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & UART1_CR1_T8);
00492   /**< Write the transmit data bit [0:7] */
00493   UART1->DR   = (uint8_t)(Data);
00494 }
00495 
00496 /**
00497   * @brief  Transmits break characters.
00498   * @param  None
00499   * @retval None
00500   */
00501 void UART1_SendBreak(void)
00502 {
00503   UART1->CR2 |= UART1_CR2_SBK;
00504 }
00505 
00506 /**
00507   * @brief  Sets the address of the UART1 node.
00508   * @param  UART1_Address: Indicates the address of the UART1 node.
00509   * @retval None
00510   */
00511 void UART1_SetAddress(uint8_t UART1_Address)
00512 {
00513   /*assert_param for UART1_Address*/
00514   assert_param(IS_UART1_ADDRESS_OK(UART1_Address));
00515   
00516   /* Clear the UART1 address */
00517   UART1->CR4 &= ((uint8_t)~UART1_CR4_ADD);
00518   /* Set the UART1 address node */
00519   UART1->CR4 |= UART1_Address;
00520 }
00521 
00522 /**
00523   * @brief  Sets the specified UART guard time.
00524   * @note   SmartCard Mode should be Enabled
00525   * @param  UART1_GuardTime: specifies the guard time.
00526   * @retval None
00527   */
00528 void UART1_SetGuardTime(uint8_t UART1_GuardTime)
00529 {
00530   /* Set the UART1 guard time */
00531   UART1->GTR = UART1_GuardTime;
00532 }
00533 
00534 /**
00535   * @brief  Sets the system clock prescaler.
00536   * @note   IrDA Low Power mode or smartcard mode should be enabled
00537   * @note   This function is related to SmartCard and IrDa mode.
00538   * @param  UART1_Prescaler: specifies the prescaler clock.
00539   *         This parameter can be one of the following values:
00540   *         @par IrDA Low Power Mode
00541   *         The clock source is divided by the value given in the register (8 bits)
00542   *         - 0000 0000 Reserved
00543   *         - 0000 0001 divides the clock source by 1
00544   *         - 0000 0010 divides the clock source by 2
00545   *         - ...
00546   *        @par Smart Card Mode
00547   *        The clock source is divided by the value given in the register
00548   *        (5 significant bits) multiplied by 2
00549   *         - 0 0000 Reserved
00550   *         - 0 0001 divides the clock source by 2
00551   *         - 0 0010 divides the clock source by 4
00552   *         - 0 0011 divides the clock source by 6
00553   *         - ...
00554   * @retval None
00555   */
00556 void UART1_SetPrescaler(uint8_t UART1_Prescaler)
00557 {
00558   /* Load the UART1 prescaler value*/
00559   UART1->PSCR = UART1_Prescaler;
00560 }
00561 
00562 /**
00563   * @brief  Checks whether the specified UART1 flag is set or not.
00564   * @param  UART1_FLAG specifies the flag to check.
00565   *         This parameter can be any of the @ref UART1_Flag_TypeDef enumeration.
00566   * @retval FlagStatus (SET or RESET)
00567   */
00568 FlagStatus UART1_GetFlagStatus(UART1_Flag_TypeDef UART1_FLAG)
00569 {
00570   FlagStatus status = RESET;
00571   
00572   /* Check parameters */
00573   assert_param(IS_UART1_FLAG_OK(UART1_FLAG));
00574   
00575   
00576   /* Check the status of the specified UART1 flag*/
00577   if (UART1_FLAG == UART1_FLAG_LBDF)
00578   {
00579     if ((UART1->CR4 & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
00580     {
00581       /* UART1_FLAG is set*/
00582       status = SET;
00583     }
00584     else
00585     {
00586       /* UART1_FLAG is reset*/
00587       status = RESET;
00588     }
00589   }
00590   else if (UART1_FLAG == UART1_FLAG_SBK)
00591   {
00592     if ((UART1->CR2 & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
00593     {
00594       /* UART1_FLAG is set*/
00595       status = SET;
00596     }
00597     else
00598     {
00599       /* UART1_FLAG is reset*/
00600       status = RESET;
00601     }
00602   }
00603   else
00604   {
00605     if ((UART1->SR & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
00606     {
00607       /* UART1_FLAG is set*/
00608       status = SET;
00609     }
00610     else
00611     {
00612       /* UART1_FLAG is reset*/
00613       status = RESET;
00614     }
00615   }
00616   /* Return the UART1_FLAG status*/
00617   return status;
00618 }
00619 
00620 /**
00621   * @brief  Clears the UART1 flags.
00622   * @param  UART1_FLAG specifies the flag to clear
00623   *         This parameter can be any combination of the following values:
00624   *         - UART1_FLAG_LBDF: LIN Break detection flag.
00625   *         - UART1_FLAG_RXNE: Receive data register not empty flag.
00626   * @note
00627   *         - PE (Parity error), FE (Framing error), NE (Noise error), 
00628   *         OR (OverRun error) and IDLE (Idle line detected) flags are 
00629   *         cleared by software sequence: a read operation to UART1_SR register
00630   *         (UART1_GetFlagStatus())followed by a read operation to UART1_DR 
00631   *         register(UART1_ReceiveData8() or UART1_ReceiveData9()).
00632   *           
00633   *         - RXNE flag can be also cleared by a read to the UART1_DR register
00634   *         (UART1_ReceiveData8()or UART1_ReceiveData9()).
00635   *           
00636   *         - TC flag can be also cleared by software sequence: a read operation
00637   *         to UART1_SR register (UART1_GetFlagStatus()) followed by a write 
00638   *         operation to UART1_DR register (UART1_SendData8() or UART1_SendData9()).
00639   *           
00640   *         - TXE flag is cleared only by a write to the UART1_DR register 
00641   *         (UART1_SendData8() or UART1_SendData9()).
00642   *           
00643   *         - SBK flag is cleared during the stop bit of break.
00644   * @retval None
00645   */
00646 void UART1_ClearFlag(UART1_Flag_TypeDef UART1_FLAG)
00647 {
00648   assert_param(IS_UART1_CLEAR_FLAG_OK(UART1_FLAG));
00649   
00650   /* Clear the Receive Register Not Empty flag */
00651   if (UART1_FLAG == UART1_FLAG_RXNE)
00652   {
00653     UART1->SR = (uint8_t)~(UART1_SR_RXNE);
00654   }
00655   /* Clear the LIN Break Detection flag */
00656   else
00657   {
00658     UART1->CR4 &= (uint8_t)~(UART1_CR4_LBDF);
00659   }
00660 }
00661 
00662 /**
00663   * @brief  Checks whether the specified UART1 interrupt has occurred or not.
00664   * @param  UART1_IT: Specifies the UART1 interrupt pending bit to check.
00665   *         This parameter can be one of the following values:
00666   *         - UART1_IT_LBDF:  LIN Break detection interrupt
00667   *         - UART1_IT_TXE:  Transmit Data Register empty interrupt
00668   *         - UART1_IT_TC:   Transmission complete interrupt
00669   *         - UART1_IT_RXNE: Receive Data register not empty interrupt
00670   *         - UART1_IT_IDLE: Idle line detection interrupt
00671   *         - UART1_IT_OR:  OverRun Error interrupt
00672   *         - UART1_IT_PE:   Parity Error interrupt
00673   * @retval The new state of UART1_IT (SET or RESET).
00674   */
00675 ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT)
00676 {
00677   ITStatus pendingbitstatus = RESET;
00678   uint8_t itpos = 0;
00679   uint8_t itmask1 = 0;
00680   uint8_t itmask2 = 0;
00681   uint8_t enablestatus = 0;
00682   
00683   /* Check parameters */
00684   assert_param(IS_UART1_GET_IT_OK(UART1_IT));
00685   
00686   /* Get the UART1 IT index */
00687   itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART1_IT & (uint8_t)0x0F));
00688   /* Get the UART1 IT index */
00689   itmask1 = (uint8_t)((uint8_t)UART1_IT >> (uint8_t)4);
00690   /* Set the IT mask*/
00691   itmask2 = (uint8_t)((uint8_t)1 << itmask1);
00692   
00693   
00694   /* Check the status of the specified UART1 pending bit*/
00695   if (UART1_IT == UART1_IT_PE)
00696   {
00697     /* Get the UART1_IT enable bit status*/
00698     enablestatus = (uint8_t)((uint8_t)UART1->CR1 & itmask2);
00699     /* Check the status of the specified UART1 interrupt*/
00700     
00701     if (((UART1->SR & itpos) != (uint8_t)0x00) && enablestatus)
00702     {
00703       /* Interrupt occurred*/
00704       pendingbitstatus = SET;
00705     }
00706     else
00707     {
00708       /* Interrupt not occurred*/
00709       pendingbitstatus = RESET;
00710     }
00711   }
00712   
00713   else if (UART1_IT == UART1_IT_LBDF)
00714   {
00715     /* Get the UART1_IT enable bit status*/
00716     enablestatus = (uint8_t)((uint8_t)UART1->CR4 & itmask2);
00717     /* Check the status of the specified UART1 interrupt*/
00718     if (((UART1->CR4 & itpos) != (uint8_t)0x00) && enablestatus)
00719     {
00720       /* Interrupt occurred*/
00721       pendingbitstatus = SET;
00722     }
00723     else
00724     {
00725       /* Interrupt not occurred*/
00726       pendingbitstatus = RESET;
00727     }
00728   }
00729   else
00730   {
00731     /* Get the UART1_IT enable bit status*/
00732     enablestatus = (uint8_t)((uint8_t)UART1->CR2 & itmask2);
00733     /* Check the status of the specified UART1 interrupt*/
00734     if (((UART1->SR & itpos) != (uint8_t)0x00) && enablestatus)
00735     {
00736       /* Interrupt occurred*/
00737       pendingbitstatus = SET;
00738     }
00739     else
00740     {
00741       /* Interrupt not occurred*/
00742       pendingbitstatus = RESET;
00743     }
00744   }
00745   
00746   /* Return the UART1_IT status*/
00747   return  pendingbitstatus;
00748 }
00749 
00750 /**
00751   * @brief  Clears the UART1 pending flags.
00752   * @param  UART1_IT specifies the pending bit to clear
00753   *         This parameter can be one of the following values:
00754   *         - UART1_IT_LBDF:  LIN Break detection interrupt
00755   *         - UART1_IT_RXNE: Receive Data register not empty interrupt.
00756   * @note
00757   *         - PE (Parity error), FE (Framing error), NE (Noise error), 
00758   *           OR (OverRun error) and IDLE (Idle line detected) pending bits are 
00759   *           cleared by software sequence: a read operation to UART1_SR register
00760   *           (UART1_GetITStatus()) followed by a read operation to UART1_DR register
00761   *           (UART1_ReceiveData8() or UART1_ReceiveData9()).
00762   *   
00763   *         - RXNE pending bit can be also cleared by a read to the UART1_DR register
00764   *           (UART1_ReceiveData8() or UART1_ReceiveData9()).
00765   * 
00766   *         - TC (Transmit complete) pending bit can be cleared by software 
00767   *           sequence: a read operation to UART1_SR register (UART1_GetITStatus())
00768   *           followed by a write operation to UART1_DR register (UART1_SendData8()
00769   *           or UART1_SendData9()).
00770   *             
00771   *         - TXE pending bit is cleared only by a write to the UART1_DR register
00772   *           (UART1_SendData8() or UART1_SendData9()).
00773   * @retval None
00774   */
00775 void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT)
00776 {
00777   assert_param(IS_UART1_CLEAR_IT_OK(UART1_IT));
00778   
00779   /* Clear the Receive Register Not Empty pending bit */
00780   if (UART1_IT == UART1_IT_RXNE)
00781   {
00782     UART1->SR = (uint8_t)~(UART1_SR_RXNE);
00783   }
00784   /* Clear the LIN Break Detection pending bit */
00785   else
00786   {
00787     UART1->CR4 &= (uint8_t)~(UART1_CR4_LBDF);
00788   }
00789 }
00790 
00791 /**
00792   * @}
00793   */
00794   
00795 /**
00796   * @}
00797   */
00798   
00799 
00800 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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