STM8S/A Standard Peripherals Drivers
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stm8s_tim3.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8s_tim3.h 00004 * @author MCD Application Team 00005 * @version V2.3.0 00006 * @date 16-June-2017 00007 * @brief This file contains all functions prototype and macros for the TIM3 peripheral. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Define to prevent recursive inclusion -------------------------------------*/ 00029 #ifndef __STM8S_TIM3_H 00030 #define __STM8S_TIM3_H 00031 00032 /* Includes ------------------------------------------------------------------*/ 00033 #include "stm8s.h" 00034 00035 /** @addtogroup STM8S_StdPeriph_Driver 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 00041 /** @addtogroup TIM3_Exported_Types 00042 * @{ 00043 */ 00044 00045 /** TIM3 Forced Action */ 00046 typedef enum 00047 { 00048 TIM3_FORCEDACTION_ACTIVE = ((uint8_t)0x50), 00049 TIM3_FORCEDACTION_INACTIVE = ((uint8_t)0x40) 00050 } TIM3_ForcedAction_TypeDef; 00051 00052 #define IS_TIM3_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM3_FORCEDACTION_ACTIVE) || \ 00053 ((ACTION) == TIM3_FORCEDACTION_INACTIVE)) 00054 00055 /** TIM3 Prescaler */ 00056 typedef enum 00057 { 00058 TIM3_PRESCALER_1 = ((uint8_t)0x00), 00059 TIM3_PRESCALER_2 = ((uint8_t)0x01), 00060 TIM3_PRESCALER_4 = ((uint8_t)0x02), 00061 TIM3_PRESCALER_8 = ((uint8_t)0x03), 00062 TIM3_PRESCALER_16 = ((uint8_t)0x04), 00063 TIM3_PRESCALER_32 = ((uint8_t)0x05), 00064 TIM3_PRESCALER_64 = ((uint8_t)0x06), 00065 TIM3_PRESCALER_128 = ((uint8_t)0x07), 00066 TIM3_PRESCALER_256 = ((uint8_t)0x08), 00067 TIM3_PRESCALER_512 = ((uint8_t)0x09), 00068 TIM3_PRESCALER_1024 = ((uint8_t)0x0A), 00069 TIM3_PRESCALER_2048 = ((uint8_t)0x0B), 00070 TIM3_PRESCALER_4096 = ((uint8_t)0x0C), 00071 TIM3_PRESCALER_8192 = ((uint8_t)0x0D), 00072 TIM3_PRESCALER_16384 = ((uint8_t)0x0E), 00073 TIM3_PRESCALER_32768 = ((uint8_t)0x0F) 00074 } TIM3_Prescaler_TypeDef; 00075 00076 #define IS_TIM3_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_PRESCALER_1 ) || \ 00077 ((PRESCALER) == TIM3_PRESCALER_2 ) || \ 00078 ((PRESCALER) == TIM3_PRESCALER_4 ) || \ 00079 ((PRESCALER) == TIM3_PRESCALER_8 ) || \ 00080 ((PRESCALER) == TIM3_PRESCALER_16 ) || \ 00081 ((PRESCALER) == TIM3_PRESCALER_32 ) || \ 00082 ((PRESCALER) == TIM3_PRESCALER_64 ) || \ 00083 ((PRESCALER) == TIM3_PRESCALER_128 ) || \ 00084 ((PRESCALER) == TIM3_PRESCALER_256 ) || \ 00085 ((PRESCALER) == TIM3_PRESCALER_512 ) || \ 00086 ((PRESCALER) == TIM3_PRESCALER_1024 ) || \ 00087 ((PRESCALER) == TIM3_PRESCALER_2048 ) || \ 00088 ((PRESCALER) == TIM3_PRESCALER_4096 ) || \ 00089 ((PRESCALER) == TIM3_PRESCALER_8192 ) || \ 00090 ((PRESCALER) == TIM3_PRESCALER_16384 ) || \ 00091 ((PRESCALER) == TIM3_PRESCALER_32768 )) 00092 00093 /** TIM3 Output Compare and PWM modes */ 00094 typedef enum 00095 { 00096 TIM3_OCMODE_TIMING = ((uint8_t)0x00), 00097 TIM3_OCMODE_ACTIVE = ((uint8_t)0x10), 00098 TIM3_OCMODE_INACTIVE = ((uint8_t)0x20), 00099 TIM3_OCMODE_TOGGLE = ((uint8_t)0x30), 00100 TIM3_OCMODE_PWM1 = ((uint8_t)0x60), 00101 TIM3_OCMODE_PWM2 = ((uint8_t)0x70) 00102 } TIM3_OCMode_TypeDef; 00103 00104 #define IS_TIM3_OC_MODE_OK(MODE) (((MODE) == TIM3_OCMODE_TIMING) || \ 00105 ((MODE) == TIM3_OCMODE_ACTIVE) || \ 00106 ((MODE) == TIM3_OCMODE_INACTIVE) || \ 00107 ((MODE) == TIM3_OCMODE_TOGGLE)|| \ 00108 ((MODE) == TIM3_OCMODE_PWM1) || \ 00109 ((MODE) == TIM3_OCMODE_PWM2)) 00110 00111 #define IS_TIM3_OCM_OK(MODE)(((MODE) == TIM3_OCMODE_TIMING) || \ 00112 ((MODE) == TIM3_OCMODE_ACTIVE) || \ 00113 ((MODE) == TIM3_OCMODE_INACTIVE) || \ 00114 ((MODE) == TIM3_OCMODE_TOGGLE)|| \ 00115 ((MODE) == TIM3_OCMODE_PWM1) || \ 00116 ((MODE) == TIM3_OCMODE_PWM2) || \ 00117 ((MODE) == (uint8_t)TIM3_FORCEDACTION_ACTIVE) || \ 00118 ((MODE) == (uint8_t)TIM3_FORCEDACTION_INACTIVE)) 00119 00120 /** TIM3 One Pulse Mode */ 00121 typedef enum 00122 { 00123 TIM3_OPMODE_SINGLE = ((uint8_t)0x01), 00124 TIM3_OPMODE_REPETITIVE = ((uint8_t)0x00) 00125 } TIM3_OPMode_TypeDef; 00126 00127 #define IS_TIM3_OPM_MODE_OK(MODE) (((MODE) == TIM3_OPMODE_SINGLE) || \ 00128 ((MODE) == TIM3_OPMODE_REPETITIVE)) 00129 00130 /** TIM3 Channel */ 00131 00132 typedef enum 00133 { 00134 TIM3_CHANNEL_1 = ((uint8_t)0x00), 00135 TIM3_CHANNEL_2 = ((uint8_t)0x01) 00136 } TIM3_Channel_TypeDef; 00137 00138 #define IS_TIM3_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \ 00139 ((CHANNEL) == TIM3_CHANNEL_2)) 00140 00141 #define IS_TIM3_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \ 00142 ((CHANNEL) == TIM3_CHANNEL_2)) 00143 00144 /** TIM3 Output Compare Polarity */ 00145 typedef enum 00146 { 00147 TIM3_OCPOLARITY_HIGH = ((uint8_t)0x00), 00148 TIM3_OCPOLARITY_LOW = ((uint8_t)0x22) 00149 } TIM3_OCPolarity_TypeDef; 00150 00151 #define IS_TIM3_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_OCPOLARITY_HIGH) || \ 00152 ((POLARITY) == TIM3_OCPOLARITY_LOW)) 00153 00154 /** TIM3 Output Compare states */ 00155 typedef enum 00156 { 00157 TIM3_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), 00158 TIM3_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) 00159 } TIM3_OutputState_TypeDef; 00160 00161 #define IS_TIM3_OUTPUT_STATE_OK(STATE) (((STATE) == TIM3_OUTPUTSTATE_DISABLE) || \ 00162 ((STATE) == TIM3_OUTPUTSTATE_ENABLE)) 00163 00164 /** TIM3 Input Capture Polarity */ 00165 typedef enum 00166 { 00167 TIM3_ICPOLARITY_RISING = ((uint8_t)0x00), 00168 TIM3_ICPOLARITY_FALLING = ((uint8_t)0x44) 00169 } TIM3_ICPolarity_TypeDef; 00170 00171 #define IS_TIM3_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_ICPOLARITY_RISING) || \ 00172 ((POLARITY) == TIM3_ICPOLARITY_FALLING)) 00173 00174 /** TIM3 Input Capture Selection */ 00175 typedef enum 00176 { 00177 TIM3_ICSELECTION_DIRECTTI = ((uint8_t)0x01), 00178 TIM3_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), 00179 TIM3_ICSELECTION_TRGI = ((uint8_t)0x03) 00180 } TIM3_ICSelection_TypeDef; 00181 00182 #define IS_TIM3_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM3_ICSELECTION_DIRECTTI) || \ 00183 ((SELECTION) == TIM3_ICSELECTION_INDIRECTTI) || \ 00184 ((SELECTION) == TIM3_ICSELECTION_TRGI)) 00185 00186 /** TIM3 Input Capture Prescaler */ 00187 typedef enum 00188 { 00189 TIM3_ICPSC_DIV1 = ((uint8_t)0x00), 00190 TIM3_ICPSC_DIV2 = ((uint8_t)0x04), 00191 TIM3_ICPSC_DIV4 = ((uint8_t)0x08), 00192 TIM3_ICPSC_DIV8 = ((uint8_t)0x0C) 00193 } TIM3_ICPSC_TypeDef; 00194 00195 #define IS_TIM3_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_ICPSC_DIV1) || \ 00196 ((PRESCALER) == TIM3_ICPSC_DIV2) || \ 00197 ((PRESCALER) == TIM3_ICPSC_DIV4) || \ 00198 ((PRESCALER) == TIM3_ICPSC_DIV8)) 00199 00200 /** TIM3 Input Capture Filer Value */ 00201 #define IS_TIM3_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) 00202 00203 /** TIM3 interrupt sources */ 00204 typedef enum 00205 { 00206 TIM3_IT_UPDATE = ((uint8_t)0x01), 00207 TIM3_IT_CC1 = ((uint8_t)0x02), 00208 TIM3_IT_CC2 = ((uint8_t)0x04) 00209 } TIM3_IT_TypeDef; 00210 00211 #define IS_TIM3_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x07)) 00212 00213 #define IS_TIM3_GET_IT_OK(IT) (((IT) == TIM3_IT_UPDATE) || \ 00214 ((IT) == TIM3_IT_CC1) || \ 00215 ((IT) == TIM3_IT_CC2)) 00216 00217 /** TIM3 Prescaler Reload Mode */ 00218 typedef enum 00219 { 00220 TIM3_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), 00221 TIM3_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) 00222 } TIM3_PSCReloadMode_TypeDef; 00223 00224 #define IS_TIM3_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM3_PSCRELOADMODE_UPDATE) || \ 00225 ((RELOAD) == TIM3_PSCRELOADMODE_IMMEDIATE)) 00226 00227 /** TIM3 Event Source */ 00228 typedef enum 00229 { 00230 TIM3_EVENTSOURCE_UPDATE = ((uint8_t)0x01), 00231 TIM3_EVENTSOURCE_CC1 = ((uint8_t)0x02), 00232 TIM3_EVENTSOURCE_CC2 = ((uint8_t)0x04) 00233 } TIM3_EventSource_TypeDef; 00234 00235 #define IS_TIM3_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) 00236 00237 /** TIM3 Update Source */ 00238 typedef enum 00239 { 00240 TIM3_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), 00241 TIM3_UPDATESOURCE_REGULAR = ((uint8_t)0x01) 00242 } TIM3_UpdateSource_TypeDef; 00243 00244 #define IS_TIM3_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM3_UPDATESOURCE_GLOBAL) || \ 00245 ((SOURCE) == TIM3_UPDATESOURCE_REGULAR)) 00246 00247 /** TIM3 Flags */ 00248 typedef enum 00249 { 00250 TIM3_FLAG_UPDATE = ((uint16_t)0x0001), 00251 TIM3_FLAG_CC1 = ((uint16_t)0x0002), 00252 TIM3_FLAG_CC2 = ((uint16_t)0x0004), 00253 TIM3_FLAG_CC1OF = ((uint16_t)0x0200), 00254 TIM3_FLAG_CC2OF = ((uint16_t)0x0400) 00255 } TIM3_FLAG_TypeDef; 00256 00257 #define IS_TIM3_GET_FLAG_OK(FLAG) (((FLAG) == TIM3_FLAG_UPDATE) || \ 00258 ((FLAG) == TIM3_FLAG_CC1) || \ 00259 ((FLAG) == TIM3_FLAG_CC2) || \ 00260 ((FLAG) == TIM3_FLAG_CC1OF) || \ 00261 ((FLAG) == TIM3_FLAG_CC2OF) ) 00262 00263 #define IS_TIM3_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF9F8) == 0x0000) && ((uint16_t)(FLAG)!= 0x0000)) 00264 00265 /** 00266 * @} 00267 */ 00268 00269 /* Exported macro ------------------------------------------------------------*/ 00270 00271 /* Exported functions --------------------------------------------------------*/ 00272 00273 /** @addtogroup TIM3_Exported_Functions 00274 * @{ 00275 */ 00276 00277 void TIM3_DeInit(void); 00278 void TIM3_TimeBaseInit(TIM3_Prescaler_TypeDef TIM3_Prescaler, uint16_t TIM3_Period); 00279 void TIM3_OC1Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 00280 void TIM3_OC2Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 00281 void TIM3_ICInit(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter); 00282 void TIM3_PWMIConfig(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter); 00283 void TIM3_Cmd(FunctionalState NewState); 00284 void TIM3_ITConfig(TIM3_IT_TypeDef TIM3_IT, FunctionalState NewState); 00285 void TIM3_InternalClockConfig(void); 00286 void TIM3_UpdateDisableConfig(FunctionalState NewState); 00287 void TIM3_UpdateRequestConfig(TIM3_UpdateSource_TypeDef TIM3_UpdateSource); 00288 void TIM3_SelectOnePulseMode(TIM3_OPMode_TypeDef TIM3_OPMode); 00289 void TIM3_PrescalerConfig(TIM3_Prescaler_TypeDef Prescaler, TIM3_PSCReloadMode_TypeDef TIM3_PSCReloadMode); 00290 void TIM3_ForcedOC1Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); 00291 void TIM3_ForcedOC2Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); 00292 void TIM3_ARRPreloadConfig(FunctionalState NewState); 00293 void TIM3_CCPreloadControl(FunctionalState NewState); 00294 void TIM3_OC1PreloadConfig(FunctionalState NewState); 00295 void TIM3_OC2PreloadConfig(FunctionalState NewState); 00296 void TIM3_GenerateEvent(TIM3_EventSource_TypeDef TIM3_EventSource); 00297 void TIM3_OC1PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 00298 void TIM3_OC2PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 00299 void TIM3_CCxCmd(TIM3_Channel_TypeDef TIM3_Channel, FunctionalState NewState); 00300 void TIM3_SelectOCxM(TIM3_Channel_TypeDef TIM3_Channel, TIM3_OCMode_TypeDef TIM3_OCMode); 00301 void TIM3_SetCounter(uint16_t Counter); 00302 void TIM3_SetAutoreload(uint16_t Autoreload); 00303 void TIM3_SetCompare1(uint16_t Compare1); 00304 void TIM3_SetCompare2(uint16_t Compare2); 00305 void TIM3_SetIC1Prescaler(TIM3_ICPSC_TypeDef TIM3_IC1Prescaler); 00306 void TIM3_SetIC2Prescaler(TIM3_ICPSC_TypeDef TIM3_IC2Prescaler); 00307 uint16_t TIM3_GetCapture1(void); 00308 uint16_t TIM3_GetCapture2(void); 00309 uint16_t TIM3_GetCounter(void); 00310 TIM3_Prescaler_TypeDef TIM3_GetPrescaler(void); 00311 FlagStatus TIM3_GetFlagStatus(TIM3_FLAG_TypeDef TIM3_FLAG); 00312 void TIM3_ClearFlag(TIM3_FLAG_TypeDef TIM3_FLAG); 00313 ITStatus TIM3_GetITStatus(TIM3_IT_TypeDef TIM3_IT); 00314 void TIM3_ClearITPendingBit(TIM3_IT_TypeDef TIM3_IT); 00315 00316 /** 00317 * @} 00318 */ 00319 00320 #endif /* __STM8S_TIM3_H */ 00321 00322 /** 00323 * @} 00324 */ 00325 00326 00327 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/