STM8S/A Standard Peripherals Drivers: stm8s_tim1.h Source File

STM8S/A

stm8s_tim1.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm8s_tim1.h
00004   * @author  MCD Application Team
00005   * @version V2.3.0
00006   * @date    16-June-2017
00007   * @brief   This file contains all functions prototype and macros for the TIM1 peripheral.
00008    ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
00012   *
00013   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00014   * You may not use this file except in compliance with the License.
00015   * You may obtain a copy of the License at:
00016   *
00017   *        http://www.st.com/software_license_agreement_liberty_v2
00018   *
00019   * Unless required by applicable law or agreed to in writing, software 
00020   * distributed under the License is distributed on an "AS IS" BASIS, 
00021   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00022   * See the License for the specific language governing permissions and
00023   * limitations under the License.
00024   *
00025   ******************************************************************************
00026   */
00027 
00028 /* Define to prevent recursive inclusion -------------------------------------*/
00029 #ifndef __STM8S_TIM1_H
00030 #define __STM8S_TIM1_H
00031 
00032 /* Includes ------------------------------------------------------------------*/
00033 #include "stm8s.h"
00034 
00035 /** @addtogroup STM8S_StdPeriph_Driver
00036   * @{
00037   */
00038   
00039 /** @addtogroup TIM1_Exported_Types
00040  * @{
00041  */
00042 
00043 /** TIM1 Output Compare and PWM modes */
00044 
00045 typedef enum
00046 {
00047   TIM1_OCMODE_TIMING     = ((uint8_t)0x00),
00048   TIM1_OCMODE_ACTIVE     = ((uint8_t)0x10),
00049   TIM1_OCMODE_INACTIVE   = ((uint8_t)0x20),
00050   TIM1_OCMODE_TOGGLE     = ((uint8_t)0x30),
00051   TIM1_OCMODE_PWM1       = ((uint8_t)0x60),
00052   TIM1_OCMODE_PWM2       = ((uint8_t)0x70)
00053 }TIM1_OCMode_TypeDef;
00054 
00055 #define IS_TIM1_OC_MODE_OK(MODE) (((MODE) ==  TIM1_OCMODE_TIMING) || \
00056                                   ((MODE) == TIM1_OCMODE_ACTIVE) || \
00057                                   ((MODE) == TIM1_OCMODE_INACTIVE) || \
00058                                   ((MODE) == TIM1_OCMODE_TOGGLE)|| \
00059                                   ((MODE) == TIM1_OCMODE_PWM1) || \
00060                                   ((MODE) == TIM1_OCMODE_PWM2))
00061 
00062 #define IS_TIM1_OCM_OK(MODE)(((MODE) ==  TIM1_OCMODE_TIMING) || \
00063                              ((MODE) == TIM1_OCMODE_ACTIVE) || \
00064                              ((MODE) == TIM1_OCMODE_INACTIVE) || \
00065                              ((MODE) == TIM1_OCMODE_TOGGLE)|| \
00066                              ((MODE) == TIM1_OCMODE_PWM1) || \
00067                              ((MODE) == TIM1_OCMODE_PWM2) || \
00068                              ((MODE) == (uint8_t)TIM1_FORCEDACTION_ACTIVE) || \
00069                              ((MODE) == (uint8_t)TIM1_FORCEDACTION_INACTIVE))
00070 
00071 /** TIM1 One Pulse Mode */
00072 typedef enum
00073 {
00074   TIM1_OPMODE_SINGLE                 = ((uint8_t)0x01),
00075   TIM1_OPMODE_REPETITIVE             = ((uint8_t)0x00)
00076 }TIM1_OPMode_TypeDef;
00077 
00078 #define IS_TIM1_OPM_MODE_OK(MODE) (((MODE) == TIM1_OPMODE_SINGLE) || \
00079                                    ((MODE) == TIM1_OPMODE_REPETITIVE))
00080 
00081 /** TIM1 Channel */
00082 
00083 typedef enum
00084 {
00085   TIM1_CHANNEL_1                     = ((uint8_t)0x00),
00086   TIM1_CHANNEL_2                     = ((uint8_t)0x01),
00087   TIM1_CHANNEL_3                     = ((uint8_t)0x02),
00088   TIM1_CHANNEL_4                     = ((uint8_t)0x03)
00089 }TIM1_Channel_TypeDef;
00090 
00091 
00092 #define IS_TIM1_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \
00093                                      ((CHANNEL) == TIM1_CHANNEL_2) || \
00094                                      ((CHANNEL) == TIM1_CHANNEL_3) || \
00095                                      ((CHANNEL) == TIM1_CHANNEL_4))
00096 
00097 #define IS_TIM1_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \
00098     ((CHANNEL) == TIM1_CHANNEL_2))
00099 
00100 #define IS_TIM1_COMPLEMENTARY_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \
00101     ((CHANNEL) == TIM1_CHANNEL_2) || \
00102     ((CHANNEL) == TIM1_CHANNEL_3))
00103 
00104 
00105 /** TIM1 Counter Mode */
00106 typedef enum
00107 {
00108   TIM1_COUNTERMODE_UP                = ((uint8_t)0x00),
00109   TIM1_COUNTERMODE_DOWN              = ((uint8_t)0x10),
00110   TIM1_COUNTERMODE_CENTERALIGNED1    = ((uint8_t)0x20),
00111   TIM1_COUNTERMODE_CENTERALIGNED2    = ((uint8_t)0x40),
00112   TIM1_COUNTERMODE_CENTERALIGNED3    = ((uint8_t)0x60)
00113 }TIM1_CounterMode_TypeDef;
00114 
00115 #define IS_TIM1_COUNTER_MODE_OK(MODE) (((MODE) == TIM1_COUNTERMODE_UP) || \
00116                                        ((MODE) == TIM1_COUNTERMODE_DOWN) || \
00117                                        ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED1) || \
00118                                        ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED2) || \
00119                                        ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED3))
00120 
00121 /** TIM1 Output Compare Polarity */
00122 typedef enum
00123 {
00124   TIM1_OCPOLARITY_HIGH               = ((uint8_t)0x00),
00125   TIM1_OCPOLARITY_LOW                = ((uint8_t)0x22)
00126 }TIM1_OCPolarity_TypeDef;
00127 
00128 #define IS_TIM1_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_OCPOLARITY_HIGH) || \
00129     ((POLARITY) == TIM1_OCPOLARITY_LOW))
00130 
00131 /** TIM1 Output Compare N Polarity */
00132 typedef enum
00133 {
00134   TIM1_OCNPOLARITY_HIGH              = ((uint8_t)0x00),
00135   TIM1_OCNPOLARITY_LOW               = ((uint8_t)0x88)
00136 }TIM1_OCNPolarity_TypeDef;
00137 
00138 #define IS_TIM1_OCN_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_OCNPOLARITY_HIGH) || \
00139     ((POLARITY) == TIM1_OCNPOLARITY_LOW))
00140 
00141 /** TIM1 Output Compare states */
00142 typedef enum
00143 {
00144   TIM1_OUTPUTSTATE_DISABLE           = ((uint8_t)0x00),
00145   TIM1_OUTPUTSTATE_ENABLE            = ((uint8_t)0x11)
00146 }TIM1_OutputState_TypeDef;
00147 
00148 #define IS_TIM1_OUTPUT_STATE_OK(STATE) (((STATE) == TIM1_OUTPUTSTATE_DISABLE) || \
00149                                         ((STATE) == TIM1_OUTPUTSTATE_ENABLE))
00150 
00151 /** TIM1 Output Compare N States */
00152 typedef enum
00153 {
00154   TIM1_OUTPUTNSTATE_DISABLE = ((uint8_t)0x00),
00155   TIM1_OUTPUTNSTATE_ENABLE  = ((uint8_t)0x44)
00156 } TIM1_OutputNState_TypeDef;
00157 
00158 #define IS_TIM1_OUTPUTN_STATE_OK(STATE) (((STATE) == TIM1_OUTPUTNSTATE_DISABLE) ||\
00159     ((STATE) == TIM1_OUTPUTNSTATE_ENABLE))
00160 
00161 /** TIM1 Break Input enable/disable */
00162 typedef enum
00163 {
00164   TIM1_BREAK_ENABLE                  = ((uint8_t)0x10),
00165   TIM1_BREAK_DISABLE                 = ((uint8_t)0x00)
00166 }TIM1_BreakState_TypeDef;
00167 #define IS_TIM1_BREAK_STATE_OK(STATE) (((STATE) == TIM1_BREAK_ENABLE) || \
00168                                        ((STATE) == TIM1_BREAK_DISABLE))
00169 
00170 /** TIM1 Break Polarity */
00171 typedef enum
00172 {
00173   TIM1_BREAKPOLARITY_LOW             = ((uint8_t)0x00),
00174   TIM1_BREAKPOLARITY_HIGH            = ((uint8_t)0x20)
00175 }TIM1_BreakPolarity_TypeDef;
00176 #define IS_TIM1_BREAK_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_BREAKPOLARITY_LOW) || \
00177     ((POLARITY) == TIM1_BREAKPOLARITY_HIGH))
00178 
00179 /** TIM1 AOE Bit Set/Reset */
00180 typedef enum
00181 {
00182   TIM1_AUTOMATICOUTPUT_ENABLE        = ((uint8_t)0x40),
00183   TIM1_AUTOMATICOUTPUT_DISABLE       = ((uint8_t)0x00)
00184 }TIM1_AutomaticOutput_TypeDef;
00185 
00186 #define IS_TIM1_AUTOMATIC_OUTPUT_STATE_OK(STATE) (((STATE) == TIM1_AUTOMATICOUTPUT_ENABLE) || \
00187     ((STATE) == TIM1_AUTOMATICOUTPUT_DISABLE))
00188 
00189 /** TIM1 Lock levels */
00190 typedef enum
00191 {
00192   TIM1_LOCKLEVEL_OFF                 = ((uint8_t)0x00),
00193   TIM1_LOCKLEVEL_1                   = ((uint8_t)0x01),
00194   TIM1_LOCKLEVEL_2                   = ((uint8_t)0x02),
00195   TIM1_LOCKLEVEL_3                   = ((uint8_t)0x03)
00196 }TIM1_LockLevel_TypeDef;
00197 
00198 #define IS_TIM1_LOCK_LEVEL_OK(LEVEL) (((LEVEL) == TIM1_LOCKLEVEL_OFF) || \
00199                                       ((LEVEL) == TIM1_LOCKLEVEL_1) || \
00200                                       ((LEVEL) == TIM1_LOCKLEVEL_2) || \
00201                                       ((LEVEL) == TIM1_LOCKLEVEL_3))
00202 
00203 /** TIM1 OSSI: Off-State Selection for Idle mode states */
00204 typedef enum
00205 {
00206   TIM1_OSSISTATE_ENABLE              = ((uint8_t)0x04),
00207   TIM1_OSSISTATE_DISABLE             = ((uint8_t)0x00)
00208 }TIM1_OSSIState_TypeDef;
00209 
00210 #define IS_TIM1_OSSI_STATE_OK(STATE) (((STATE) == TIM1_OSSISTATE_ENABLE) || \
00211                                       ((STATE) == TIM1_OSSISTATE_DISABLE))
00212 
00213 /** TIM1 Output Compare Idle State */
00214 typedef enum
00215 {
00216   TIM1_OCIDLESTATE_SET               = ((uint8_t)0x55),
00217   TIM1_OCIDLESTATE_RESET             = ((uint8_t)0x00)
00218 }TIM1_OCIdleState_TypeDef;
00219 
00220 #define IS_TIM1_OCIDLE_STATE_OK(STATE) (((STATE) == TIM1_OCIDLESTATE_SET) || \
00221                                         ((STATE) == TIM1_OCIDLESTATE_RESET))
00222 
00223 /** TIM1 Output Compare N Idle State */
00224 typedef enum
00225 {
00226   TIM1_OCNIDLESTATE_SET             = ((uint8_t)0x2A),
00227   TIM1_OCNIDLESTATE_RESET           = ((uint8_t)0x00)
00228 }TIM1_OCNIdleState_TypeDef;
00229 
00230 #define IS_TIM1_OCNIDLE_STATE_OK(STATE) (((STATE) == TIM1_OCNIDLESTATE_SET) || \
00231     ((STATE) == TIM1_OCNIDLESTATE_RESET))
00232 
00233 /** TIM1 Input Capture Polarity */
00234 typedef enum
00235 {
00236   TIM1_ICPOLARITY_RISING            = ((uint8_t)0x00),
00237   TIM1_ICPOLARITY_FALLING           = ((uint8_t)0x01)
00238 }TIM1_ICPolarity_TypeDef;
00239 
00240 #define IS_TIM1_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_ICPOLARITY_RISING) || \
00241     ((POLARITY) == TIM1_ICPOLARITY_FALLING))
00242 
00243 /** TIM1 Input Capture Selection */
00244 typedef enum
00245 {
00246   TIM1_ICSELECTION_DIRECTTI          = ((uint8_t)0x01),
00247   TIM1_ICSELECTION_INDIRECTTI        = ((uint8_t)0x02),
00248   TIM1_ICSELECTION_TRGI              = ((uint8_t)0x03)
00249 }TIM1_ICSelection_TypeDef;
00250 
00251 #define IS_TIM1_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_ICSELECTION_DIRECTTI) || \
00252     ((SELECTION) == TIM1_ICSELECTION_INDIRECTTI) || \
00253     ((SELECTION) == TIM1_ICSELECTION_TRGI))
00254 
00255 /** TIM1 Input Capture Prescaler */
00256 typedef enum
00257 {
00258   TIM1_ICPSC_DIV1                    = ((uint8_t)0x00),
00259   TIM1_ICPSC_DIV2                    = ((uint8_t)0x04),
00260   TIM1_ICPSC_DIV4                    = ((uint8_t)0x08),
00261   TIM1_ICPSC_DIV8                    = ((uint8_t)0x0C)
00262 }TIM1_ICPSC_TypeDef;
00263 
00264 #define IS_TIM1_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM1_ICPSC_DIV1) || \
00265     ((PRESCALER) == TIM1_ICPSC_DIV2) || \
00266     ((PRESCALER) == TIM1_ICPSC_DIV4) || \
00267     ((PRESCALER) == TIM1_ICPSC_DIV8))
00268 
00269 /** TIM1 Input Capture Filer Value */
00270 
00271 #define IS_TIM1_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F)
00272 
00273 /** TIM1 External Trigger Filer Value */
00274 #define IS_TIM1_EXT_TRG_FILTER_OK(FILTER) ((FILTER) <= 0x0F)
00275 
00276 /** TIM1 interrupt sources */
00277 typedef enum
00278 {
00279   TIM1_IT_UPDATE                     = ((uint8_t)0x01),
00280   TIM1_IT_CC1                        = ((uint8_t)0x02),
00281   TIM1_IT_CC2                        = ((uint8_t)0x04),
00282   TIM1_IT_CC3                        = ((uint8_t)0x08),
00283   TIM1_IT_CC4                        = ((uint8_t)0x10),
00284   TIM1_IT_COM                        = ((uint8_t)0x20),
00285   TIM1_IT_TRIGGER                    = ((uint8_t)0x40),
00286   TIM1_IT_BREAK                      = ((uint8_t)0x80)
00287 }TIM1_IT_TypeDef;
00288 
00289 #define IS_TIM1_IT_OK(IT) ((IT) != 0x00)
00290 
00291 #define IS_TIM1_GET_IT_OK(IT) (((IT) == TIM1_IT_UPDATE) || \
00292                                ((IT) == TIM1_IT_CC1) || \
00293                                ((IT) == TIM1_IT_CC2) || \
00294                                ((IT) == TIM1_IT_CC3) || \
00295                                ((IT) == TIM1_IT_CC4) || \
00296                                ((IT) == TIM1_IT_COM) || \
00297                                ((IT) == TIM1_IT_TRIGGER) || \
00298                                ((IT) == TIM1_IT_BREAK))
00299 
00300 
00301 /** TIM1 External Trigger Prescaler */
00302 typedef enum
00303 {
00304   TIM1_EXTTRGPSC_OFF                 = ((uint8_t)0x00),
00305   TIM1_EXTTRGPSC_DIV2                = ((uint8_t)0x10),
00306   TIM1_EXTTRGPSC_DIV4                = ((uint8_t)0x20),
00307   TIM1_EXTTRGPSC_DIV8                = ((uint8_t)0x30)
00308 }TIM1_ExtTRGPSC_TypeDef;
00309 
00310 #define IS_TIM1_EXT_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM1_EXTTRGPSC_OFF) || \
00311     ((PRESCALER) == TIM1_EXTTRGPSC_DIV2) || \
00312     ((PRESCALER) == TIM1_EXTTRGPSC_DIV4) || \
00313     ((PRESCALER) == TIM1_EXTTRGPSC_DIV8))
00314 
00315 /** TIM1 Internal Trigger Selection */
00316 typedef enum
00317 {
00318   TIM1_TS_TIM6                       = ((uint8_t)0x00),  /*!< TRIG Input source =  TIM6 TRIG Output  */
00319   TIM1_TS_TIM5                       = ((uint8_t)0x30),  /*!< TRIG Input source =  TIM5 TRIG Output  */
00320   TIM1_TS_TI1F_ED                    = ((uint8_t)0x40),
00321   TIM1_TS_TI1FP1                     = ((uint8_t)0x50),
00322   TIM1_TS_TI2FP2                     = ((uint8_t)0x60),
00323   TIM1_TS_ETRF                       = ((uint8_t)0x70)
00324 }TIM1_TS_TypeDef;
00325 
00326 #define IS_TIM1_TRIGGER_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_TS_TI1F_ED) || \
00327     ((SELECTION) == TIM1_TS_TI1FP1) || \
00328     ((SELECTION) == TIM1_TS_TI2FP2) || \
00329     ((SELECTION) == TIM1_TS_ETRF) || \
00330     ((SELECTION) == TIM1_TS_TIM5) || \
00331     ((SELECTION) == TIM1_TS_TIM6))
00332 
00333 
00334 #define IS_TIM1_TIX_TRIGGER_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_TS_TI1F_ED) || \
00335     ((SELECTION) == TIM1_TS_TI1FP1) || \
00336     ((SELECTION) == TIM1_TS_TI2FP2))
00337 
00338 /** TIM1 TIx External Clock Source */
00339 typedef enum
00340 {
00341   TIM1_TIXEXTERNALCLK1SOURCE_TI1ED   = ((uint8_t)0x40),
00342   TIM1_TIXEXTERNALCLK1SOURCE_TI1     = ((uint8_t)0x50),
00343   TIM1_TIXEXTERNALCLK1SOURCE_TI2     = ((uint8_t)0x60)
00344 }TIM1_TIxExternalCLK1Source_TypeDef;
00345 
00346 #define IS_TIM1_TIXCLK_SOURCE_OK(SOURCE)  (((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI1ED) || \
00347     ((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI2) || \
00348     ((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI1))
00349 
00350 /** TIM1 External Trigger Polarity */
00351 typedef enum
00352 {
00353   TIM1_EXTTRGPOLARITY_INVERTED       = ((uint8_t)0x80),
00354   TIM1_EXTTRGPOLARITY_NONINVERTED    = ((uint8_t)0x00)
00355 }TIM1_ExtTRGPolarity_TypeDef;
00356 
00357 #define IS_TIM1_EXT_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_EXTTRGPOLARITY_INVERTED) || \
00358     ((POLARITY) == TIM1_EXTTRGPOLARITY_NONINVERTED))
00359 
00360 /** TIM1 Prescaler Reload Mode */
00361 typedef enum
00362 {
00363   TIM1_PSCRELOADMODE_UPDATE          = ((uint8_t)0x00),
00364   TIM1_PSCRELOADMODE_IMMEDIATE       = ((uint8_t)0x01)
00365 }TIM1_PSCReloadMode_TypeDef;
00366 
00367 #define IS_TIM1_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM1_PSCRELOADMODE_UPDATE) || \
00368     ((RELOAD) == TIM1_PSCRELOADMODE_IMMEDIATE))
00369 
00370 /** TIM1 Encoder Mode */
00371 typedef enum
00372 {
00373   TIM1_ENCODERMODE_TI1               = ((uint8_t)0x01),
00374   TIM1_ENCODERMODE_TI2               = ((uint8_t)0x02),
00375   TIM1_ENCODERMODE_TI12              = ((uint8_t)0x03)
00376 }TIM1_EncoderMode_TypeDef;
00377 
00378 #define IS_TIM1_ENCODER_MODE_OK(MODE) (((MODE) == TIM1_ENCODERMODE_TI1) || \
00379                                        ((MODE) == TIM1_ENCODERMODE_TI2) || \
00380                                        ((MODE) == TIM1_ENCODERMODE_TI12))
00381 
00382 /** TIM1 Event Source */
00383 typedef enum
00384 {
00385   TIM1_EVENTSOURCE_UPDATE            = ((uint8_t)0x01),
00386   TIM1_EVENTSOURCE_CC1               = ((uint8_t)0x02),
00387   TIM1_EVENTSOURCE_CC2               = ((uint8_t)0x04),
00388   TIM1_EVENTSOURCE_CC3               = ((uint8_t)0x08),
00389   TIM1_EVENTSOURCE_CC4               = ((uint8_t)0x10),
00390   TIM1_EVENTSOURCE_COM               = ((uint8_t)0x20),
00391   TIM1_EVENTSOURCE_TRIGGER           = ((uint8_t)0x40),
00392   TIM1_EVENTSOURCE_BREAK             = ((uint8_t)0x80)
00393 }TIM1_EventSource_TypeDef;
00394 
00395 #define IS_TIM1_EVENT_SOURCE_OK(SOURCE) ((SOURCE) != 0x00)
00396 
00397 /** TIM1 Update Source */
00398 typedef enum
00399 {
00400   TIM1_UPDATESOURCE_GLOBAL           = ((uint8_t)0x00),
00401   TIM1_UPDATESOURCE_REGULAR          = ((uint8_t)0x01)
00402 }TIM1_UpdateSource_TypeDef;
00403 
00404 #define IS_TIM1_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_UPDATESOURCE_GLOBAL) || \
00405     ((SOURCE) == TIM1_UPDATESOURCE_REGULAR))
00406 
00407 /** TIM1 Trigger Output Source */
00408 typedef enum
00409 {
00410   TIM1_TRGOSOURCE_RESET              = ((uint8_t)0x00),
00411   TIM1_TRGOSOURCE_ENABLE             = ((uint8_t)0x10),
00412   TIM1_TRGOSOURCE_UPDATE             = ((uint8_t)0x20),
00413   TIM1_TRGOSource_OC1                = ((uint8_t)0x30),
00414   TIM1_TRGOSOURCE_OC1REF             = ((uint8_t)0x40),
00415   TIM1_TRGOSOURCE_OC2REF             = ((uint8_t)0x50),
00416   TIM1_TRGOSOURCE_OC3REF             = ((uint8_t)0x60)
00417 }TIM1_TRGOSource_TypeDef;
00418 
00419 #define IS_TIM1_TRGO_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_TRGOSOURCE_RESET) || \
00420                                         ((SOURCE) == TIM1_TRGOSOURCE_ENABLE) || \
00421                                         ((SOURCE) == TIM1_TRGOSOURCE_UPDATE) || \
00422                                         ((SOURCE) == TIM1_TRGOSource_OC1)  || \
00423                                         ((SOURCE) == TIM1_TRGOSOURCE_OC1REF) || \
00424                                         ((SOURCE) == TIM1_TRGOSOURCE_OC2REF) || \
00425                                         ((SOURCE) == TIM1_TRGOSOURCE_OC3REF))
00426 
00427 /** TIM1 Slave Mode */
00428 typedef enum
00429 {
00430   TIM1_SLAVEMODE_RESET               = ((uint8_t)0x04),
00431   TIM1_SLAVEMODE_GATED               = ((uint8_t)0x05),
00432   TIM1_SLAVEMODE_TRIGGER             = ((uint8_t)0x06),
00433   TIM1_SLAVEMODE_EXTERNAL1           = ((uint8_t)0x07)
00434 }TIM1_SlaveMode_TypeDef;
00435 
00436 #define IS_TIM1_SLAVE_MODE_OK(MODE) (((MODE) == TIM1_SLAVEMODE_RESET) || \
00437                                      ((MODE) == TIM1_SLAVEMODE_GATED) || \
00438                                      ((MODE) == TIM1_SLAVEMODE_TRIGGER) || \
00439                                      ((MODE) == TIM1_SLAVEMODE_EXTERNAL1))
00440 
00441 /** TIM1 Flags */
00442 typedef enum
00443 {
00444   TIM1_FLAG_UPDATE                   = ((uint16_t)0x0001),
00445   TIM1_FLAG_CC1                      = ((uint16_t)0x0002),
00446   TIM1_FLAG_CC2                      = ((uint16_t)0x0004),
00447   TIM1_FLAG_CC3                      = ((uint16_t)0x0008),
00448   TIM1_FLAG_CC4                      = ((uint16_t)0x0010),
00449   TIM1_FLAG_COM                      = ((uint16_t)0x0020),
00450   TIM1_FLAG_TRIGGER                  = ((uint16_t)0x0040),
00451   TIM1_FLAG_BREAK                    = ((uint16_t)0x0080),
00452   TIM1_FLAG_CC1OF                    = ((uint16_t)0x0200),
00453   TIM1_FLAG_CC2OF                    = ((uint16_t)0x0400),
00454   TIM1_FLAG_CC3OF                    = ((uint16_t)0x0800),
00455   TIM1_FLAG_CC4OF                    = ((uint16_t)0x1000)
00456 }TIM1_FLAG_TypeDef;
00457 
00458 #define IS_TIM1_GET_FLAG_OK(FLAG) (((FLAG) == TIM1_FLAG_UPDATE) || \
00459                                    ((FLAG) == TIM1_FLAG_CC1) || \
00460                                    ((FLAG) == TIM1_FLAG_CC2) || \
00461                                    ((FLAG) == TIM1_FLAG_CC3) || \
00462                                    ((FLAG) == TIM1_FLAG_CC4) || \
00463                                    ((FLAG) == TIM1_FLAG_COM) || \
00464                                    ((FLAG) == TIM1_FLAG_TRIGGER) || \
00465                                    ((FLAG) == TIM1_FLAG_BREAK) || \
00466                                    ((FLAG) == TIM1_FLAG_CC1OF) || \
00467                                    ((FLAG) == TIM1_FLAG_CC2OF) || \
00468                                    ((FLAG) == TIM1_FLAG_CC3OF) || \
00469                                    ((FLAG) == TIM1_FLAG_CC4OF))
00470 
00471 #define IS_TIM1_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & (uint16_t)0xE100) == 0x0000) && ((FLAG) != 0x0000))
00472 
00473 /** TIM1 Forced Action */
00474 typedef enum
00475 {
00476   TIM1_FORCEDACTION_ACTIVE           = ((uint8_t)0x50),
00477   TIM1_FORCEDACTION_INACTIVE         = ((uint8_t)0x40)
00478 }TIM1_ForcedAction_TypeDef;
00479 
00480 #define IS_TIM1_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM1_FORCEDACTION_ACTIVE) || \
00481     ((ACTION) == TIM1_FORCEDACTION_INACTIVE))
00482 /**
00483   * @}
00484   */
00485 
00486 /* Exported macro ------------------------------------------------------------*/
00487 
00488 /* Exported functions --------------------------------------------------------*/
00489 
00490 /** @addtogroup TIM1_Exported_Functions
00491   * @{
00492   */
00493 
00494 void TIM1_DeInit(void);
00495 void TIM1_TimeBaseInit(uint16_t TIM1_Prescaler, 
00496                        TIM1_CounterMode_TypeDef TIM1_CounterMode,
00497                        uint16_t TIM1_Period, uint8_t TIM1_RepetitionCounter);
00498 void TIM1_OC1Init(TIM1_OCMode_TypeDef TIM1_OCMode, 
00499                   TIM1_OutputState_TypeDef TIM1_OutputState, 
00500                   TIM1_OutputNState_TypeDef TIM1_OutputNState, 
00501                   uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, 
00502                   TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, 
00503                   TIM1_OCIdleState_TypeDef TIM1_OCIdleState, 
00504                   TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState);
00505 void TIM1_OC2Init(TIM1_OCMode_TypeDef TIM1_OCMode, 
00506                   TIM1_OutputState_TypeDef TIM1_OutputState, 
00507                   TIM1_OutputNState_TypeDef TIM1_OutputNState, 
00508                   uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, 
00509                   TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, 
00510                   TIM1_OCIdleState_TypeDef TIM1_OCIdleState, 
00511                   TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState);
00512 void TIM1_OC3Init(TIM1_OCMode_TypeDef TIM1_OCMode, 
00513                   TIM1_OutputState_TypeDef TIM1_OutputState, 
00514                   TIM1_OutputNState_TypeDef TIM1_OutputNState, 
00515                   uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, 
00516                   TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, 
00517                   TIM1_OCIdleState_TypeDef TIM1_OCIdleState, 
00518                   TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState);
00519 void TIM1_OC4Init(TIM1_OCMode_TypeDef TIM1_OCMode, 
00520                   TIM1_OutputState_TypeDef TIM1_OutputState, uint16_t TIM1_Pulse,
00521                   TIM1_OCPolarity_TypeDef TIM1_OCPolarity, 
00522                   TIM1_OCIdleState_TypeDef TIM1_OCIdleState);
00523 void TIM1_BDTRConfig(TIM1_OSSIState_TypeDef TIM1_OSSIState, 
00524                      TIM1_LockLevel_TypeDef TIM1_LockLevel, uint8_t TIM1_DeadTime,
00525                      TIM1_BreakState_TypeDef TIM1_Break, 
00526                      TIM1_BreakPolarity_TypeDef TIM1_BreakPolarity, 
00527                      TIM1_AutomaticOutput_TypeDef TIM1_AutomaticOutput);
00528 void TIM1_ICInit(TIM1_Channel_TypeDef TIM1_Channel, 
00529                  TIM1_ICPolarity_TypeDef TIM1_ICPolarity, 
00530                  TIM1_ICSelection_TypeDef TIM1_ICSelection, 
00531                  TIM1_ICPSC_TypeDef TIM1_ICPrescaler, uint8_t TIM1_ICFilter);
00532 void TIM1_PWMIConfig(TIM1_Channel_TypeDef TIM1_Channel, 
00533                      TIM1_ICPolarity_TypeDef TIM1_ICPolarity, 
00534                      TIM1_ICSelection_TypeDef TIM1_ICSelection, 
00535                      TIM1_ICPSC_TypeDef TIM1_ICPrescaler, uint8_t TIM1_ICFilter);
00536 void TIM1_Cmd(FunctionalState NewState);
00537 void TIM1_CtrlPWMOutputs(FunctionalState NewState);
00538 void TIM1_ITConfig(TIM1_IT_TypeDef TIM1_IT, FunctionalState NewState);
00539 void TIM1_InternalClockConfig(void);
00540 void TIM1_ETRClockMode1Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, 
00541                               TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, 
00542                               uint8_t ExtTRGFilter);
00543 void TIM1_ETRClockMode2Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, 
00544                               TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, 
00545                               uint8_t ExtTRGFilter);
00546 void TIM1_ETRConfig(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, 
00547                     TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, 
00548                     uint8_t ExtTRGFilter);
00549 void TIM1_TIxExternalClockConfig(TIM1_TIxExternalCLK1Source_TypeDef TIM1_TIxExternalCLKSource, 
00550                                  TIM1_ICPolarity_TypeDef TIM1_ICPolarity, 
00551                                  uint8_t ICFilter);
00552 void TIM1_SelectInputTrigger(TIM1_TS_TypeDef TIM1_InputTriggerSource);
00553 void TIM1_UpdateDisableConfig(FunctionalState NewState);
00554 void TIM1_UpdateRequestConfig(TIM1_UpdateSource_TypeDef TIM1_UpdateSource);
00555 void TIM1_SelectHallSensor(FunctionalState NewState);
00556 void TIM1_SelectOnePulseMode(TIM1_OPMode_TypeDef TIM1_OPMode);
00557 void TIM1_SelectOutputTrigger(TIM1_TRGOSource_TypeDef TIM1_TRGOSource);
00558 void TIM1_SelectSlaveMode(TIM1_SlaveMode_TypeDef TIM1_SlaveMode);
00559 void TIM1_SelectMasterSlaveMode(FunctionalState NewState);
00560 void TIM1_EncoderInterfaceConfig(TIM1_EncoderMode_TypeDef TIM1_EncoderMode, 
00561                                  TIM1_ICPolarity_TypeDef TIM1_IC1Polarity, 
00562                                  TIM1_ICPolarity_TypeDef TIM1_IC2Polarity);
00563 void TIM1_PrescalerConfig(uint16_t Prescaler, TIM1_PSCReloadMode_TypeDef TIM1_PSCReloadMode);
00564 void TIM1_CounterModeConfig(TIM1_CounterMode_TypeDef TIM1_CounterMode);
00565 void TIM1_ForcedOC1Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction);
00566 void TIM1_ForcedOC2Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction);
00567 void TIM1_ForcedOC3Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction);
00568 void TIM1_ForcedOC4Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction);
00569 void TIM1_ARRPreloadConfig(FunctionalState NewState);
00570 void TIM1_SelectCOM(FunctionalState NewState);
00571 void TIM1_CCPreloadControl(FunctionalState NewState);
00572 void TIM1_OC1PreloadConfig(FunctionalState NewState);
00573 void TIM1_OC2PreloadConfig(FunctionalState NewState);
00574 void TIM1_OC3PreloadConfig(FunctionalState NewState);
00575 void TIM1_OC4PreloadConfig(FunctionalState NewState);
00576 void TIM1_OC1FastConfig(FunctionalState NewState);
00577 void TIM1_OC2FastConfig(FunctionalState NewState);
00578 void TIM1_OC3FastConfig(FunctionalState NewState);
00579 void TIM1_OC4FastConfig(FunctionalState NewState);
00580 void TIM1_GenerateEvent(TIM1_EventSource_TypeDef TIM1_EventSource);
00581 void TIM1_OC1PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity);
00582 void TIM1_OC1NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity);
00583 void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity);
00584 void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity);
00585 void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity);
00586 void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity);
00587 void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity);
00588 void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState);
00589 void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState);
00590 void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1_OCMode);
00591 void TIM1_SetCounter(uint16_t Counter);
00592 void TIM1_SetAutoreload(uint16_t Autoreload);
00593 void TIM1_SetCompare1(uint16_t Compare1);
00594 void TIM1_SetCompare2(uint16_t Compare2);
00595 void TIM1_SetCompare3(uint16_t Compare3);
00596 void TIM1_SetCompare4(uint16_t Compare4);
00597 void TIM1_SetIC1Prescaler(TIM1_ICPSC_TypeDef TIM1_IC1Prescaler);
00598 void TIM1_SetIC2Prescaler(TIM1_ICPSC_TypeDef TIM1_IC2Prescaler);
00599 void TIM1_SetIC3Prescaler(TIM1_ICPSC_TypeDef TIM1_IC3Prescaler);
00600 void TIM1_SetIC4Prescaler(TIM1_ICPSC_TypeDef TIM1_IC4Prescaler);
00601 uint16_t TIM1_GetCapture1(void);
00602 uint16_t TIM1_GetCapture2(void);
00603 uint16_t TIM1_GetCapture3(void);
00604 uint16_t TIM1_GetCapture4(void);
00605 uint16_t TIM1_GetCounter(void);
00606 uint16_t TIM1_GetPrescaler(void);
00607 FlagStatus TIM1_GetFlagStatus(TIM1_FLAG_TypeDef TIM1_FLAG);
00608 void TIM1_ClearFlag(TIM1_FLAG_TypeDef TIM1_FLAG);
00609 ITStatus TIM1_GetITStatus(TIM1_IT_TypeDef TIM1_IT);
00610 void TIM1_ClearITPendingBit(TIM1_IT_TypeDef TIM1_IT);
00611 
00612 /**
00613   * @}
00614   */
00615 
00616 #endif /* __STM8S_TIM1_H */
00617 
00618 /**
00619   * @}
00620   */
00621 
00622 
00623 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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