STM8S/A Standard Peripherals Drivers: stm8s_clk.h Source File

STM8S/A

stm8s_clk.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm8s_clk.h
00004   * @author  MCD Application Team
00005   * @version V2.3.0
00006   * @date    16-June-2017
00007   * @brief   This file contains all functions prototype and macros for the CLK peripheral.
00008    ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
00012   *
00013   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00014   * You may not use this file except in compliance with the License.
00015   * You may obtain a copy of the License at:
00016   *
00017   *        http://www.st.com/software_license_agreement_liberty_v2
00018   *
00019   * Unless required by applicable law or agreed to in writing, software 
00020   * distributed under the License is distributed on an "AS IS" BASIS, 
00021   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00022   * See the License for the specific language governing permissions and
00023   * limitations under the License.
00024   *
00025   ******************************************************************************
00026   */
00027 
00028 
00029 /* Define to prevent recursive inclusion -------------------------------------*/
00030 #ifndef __STM8S_CLK_H
00031 #define __STM8S_CLK_H
00032 
00033 /* Includes ------------------------------------------------------------------*/
00034 /* Contains the description of all STM8 hardware registers */
00035 #include "stm8s.h"
00036 
00037 /* Exported types ------------------------------------------------------------*/
00038 /** @addtogroup CLK_Exported_Types
00039   * @{
00040   */
00041 
00042 /**
00043    * @brief  Switch Mode Auto, Manual.
00044    */
00045 typedef enum {
00046   CLK_SWITCHMODE_MANUAL = (uint8_t)0x00, /*!< Enable the manual clock switching mode */
00047   CLK_SWITCHMODE_AUTO   = (uint8_t)0x01  /*!< Enable the automatic clock switching mode */
00048 } CLK_SwitchMode_TypeDef;
00049 
00050 /**
00051    * @brief  Current Clock State.
00052    */
00053 typedef enum {
00054   CLK_CURRENTCLOCKSTATE_DISABLE = (uint8_t)0x00, /*!< Current clock disable */
00055   CLK_CURRENTCLOCKSTATE_ENABLE  = (uint8_t)0x01  /*!< Current clock enable */
00056 } CLK_CurrentClockState_TypeDef;
00057 
00058 /**
00059    * @brief   Clock security system configuration.
00060    */
00061 typedef enum {
00062   CLK_CSSCONFIG_ENABLEWITHIT = (uint8_t)0x05, /*!< Enable CSS with detection interrupt */
00063   CLK_CSSCONFIG_ENABLE    = (uint8_t)0x01, /*!< Enable CSS without detection interrupt */
00064   CLK_CSSCONFIG_DISABLE      = (uint8_t)0x00  /*!< Leave CSS desactivated (to be used in CLK_Init() function) */
00065 } CLK_CSSConfig_TypeDef;
00066 
00067 /**
00068    * @brief   CLK Clock Source.
00069    */
00070 typedef enum {
00071   CLK_SOURCE_HSI    = (uint8_t)0xE1, /*!< Clock Source HSI. */
00072   CLK_SOURCE_LSI    = (uint8_t)0xD2, /*!< Clock Source LSI. */
00073   CLK_SOURCE_HSE    = (uint8_t)0xB4 /*!< Clock Source HSE. */
00074 } CLK_Source_TypeDef;
00075 
00076 /**
00077    * @brief   CLK HSI Calibration Value.
00078    */
00079 typedef enum {
00080   CLK_HSITRIMVALUE_0   = (uint8_t)0x00, /*!< HSI Calibration Value 0 */
00081   CLK_HSITRIMVALUE_1   = (uint8_t)0x01, /*!< HSI Calibration Value 1 */
00082   CLK_HSITRIMVALUE_2   = (uint8_t)0x02, /*!< HSI Calibration Value 2 */
00083   CLK_HSITRIMVALUE_3   = (uint8_t)0x03, /*!< HSI Calibration Value 3 */
00084   CLK_HSITRIMVALUE_4   = (uint8_t)0x04, /*!< HSI Calibration Value 4 */
00085   CLK_HSITRIMVALUE_5   = (uint8_t)0x05, /*!< HSI Calibration Value 5 */
00086   CLK_HSITRIMVALUE_6   = (uint8_t)0x06, /*!< HSI Calibration Value 6 */
00087   CLK_HSITRIMVALUE_7   = (uint8_t)0x07  /*!< HSI Calibration Value 7 */
00088 } CLK_HSITrimValue_TypeDef;
00089 
00090 /**
00091    * @brief    CLK  Clock Output
00092    */
00093 typedef enum {
00094   CLK_OUTPUT_HSI      = (uint8_t)0x00, /*!< Clock Output HSI */
00095   CLK_OUTPUT_LSI      = (uint8_t)0x02, /*!< Clock Output LSI */
00096   CLK_OUTPUT_HSE      = (uint8_t)0x04, /*!< Clock Output HSE */
00097   CLK_OUTPUT_CPU      = (uint8_t)0x08, /*!< Clock Output CPU */
00098   CLK_OUTPUT_CPUDIV2  = (uint8_t)0x0A, /*!< Clock Output CPU/2 */
00099   CLK_OUTPUT_CPUDIV4  = (uint8_t)0x0C, /*!< Clock Output CPU/4 */
00100   CLK_OUTPUT_CPUDIV8  = (uint8_t)0x0E, /*!< Clock Output CPU/8 */
00101   CLK_OUTPUT_CPUDIV16 = (uint8_t)0x10, /*!< Clock Output CPU/16 */
00102   CLK_OUTPUT_CPUDIV32 = (uint8_t)0x12, /*!< Clock Output CPU/32 */
00103   CLK_OUTPUT_CPUDIV64 = (uint8_t)0x14, /*!< Clock Output CPU/64 */
00104   CLK_OUTPUT_HSIRC    = (uint8_t)0x16, /*!< Clock Output HSI RC */
00105   CLK_OUTPUT_MASTER   = (uint8_t)0x18, /*!< Clock Output Master */
00106   CLK_OUTPUT_OTHERS   = (uint8_t)0x1A  /*!< Clock Output OTHER */
00107 } CLK_Output_TypeDef;
00108 
00109 /**
00110    * @brief    CLK Enable peripheral
00111    */
00112 /* Elements values convention: 0xXY
00113     X = choice between the peripheral registers
00114         X = 0 : PCKENR1
00115         X = 1 : PCKENR2
00116     Y = Peripheral position in the register
00117 */
00118 typedef enum {
00119   CLK_PERIPHERAL_I2C     = (uint8_t)0x00, /*!< Peripheral Clock Enable 1, I2C */
00120   CLK_PERIPHERAL_SPI     = (uint8_t)0x01, /*!< Peripheral Clock Enable 1, SPI */
00121 #if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax)
00122   CLK_PERIPHERAL_UART1   = (uint8_t)0x02, /*!< Peripheral Clock Enable 1, UART1 */
00123 #else
00124   CLK_PERIPHERAL_UART1   = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART1 */
00125 #endif
00126   CLK_PERIPHERAL_UART2   = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART2 */
00127   CLK_PERIPHERAL_UART3   = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART3 */
00128   CLK_PERIPHERAL_TIMER6  = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer6 */
00129   CLK_PERIPHERAL_TIMER4  = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer4 */
00130   CLK_PERIPHERAL_TIMER5  = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer5 */
00131   CLK_PERIPHERAL_TIMER2  = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer2 */
00132   CLK_PERIPHERAL_TIMER3  = (uint8_t)0x06, /*!< Peripheral Clock Enable 1, Timer3 */
00133   CLK_PERIPHERAL_TIMER1  = (uint8_t)0x07, /*!< Peripheral Clock Enable 1, Timer1 */
00134   CLK_PERIPHERAL_AWU     = (uint8_t)0x12, /*!< Peripheral Clock Enable 2, AWU */
00135   CLK_PERIPHERAL_ADC     = (uint8_t)0x13, /*!< Peripheral Clock Enable 2, ADC */
00136   CLK_PERIPHERAL_CAN     = (uint8_t)0x17 /*!< Peripheral Clock Enable 2, CAN */
00137 } CLK_Peripheral_TypeDef;
00138 
00139 /**
00140    * @brief   CLK Flags.
00141    */
00142 /* Elements values convention: 0xXZZ
00143     X = choice between the flags registers
00144         X = 1 : ICKR
00145         X = 2 : ECKR
00146         X = 3 : SWCR
00147     X = 4 : CSSR
00148  X = 5 : CCOR
00149    ZZ = flag mask in the register (same as map file)
00150 */
00151 typedef enum {
00152   CLK_FLAG_LSIRDY  = (uint16_t)0x0110, /*!< Low speed internal oscillator ready Flag */
00153   CLK_FLAG_HSIRDY  = (uint16_t)0x0102, /*!< High speed internal oscillator ready Flag */
00154   CLK_FLAG_HSERDY  = (uint16_t)0x0202, /*!< High speed external oscillator ready Flag */
00155   CLK_FLAG_SWIF    = (uint16_t)0x0308, /*!< Clock switch interrupt Flag */
00156   CLK_FLAG_SWBSY   = (uint16_t)0x0301, /*!< Switch busy Flag */
00157   CLK_FLAG_CSSD    = (uint16_t)0x0408, /*!< Clock security system detection Flag */
00158   CLK_FLAG_AUX     = (uint16_t)0x0402, /*!< Auxiliary oscillator connected to master clock */
00159   CLK_FLAG_CCOBSY  = (uint16_t)0x0504, /*!< Configurable clock output busy */
00160   CLK_FLAG_CCORDY  = (uint16_t)0x0502 /*!< Configurable clock output ready */
00161 }CLK_Flag_TypeDef;
00162 
00163 /**
00164    * @brief  CLK interrupt configuration and Flags cleared by software.
00165    */
00166 typedef enum {
00167   CLK_IT_CSSD = (uint8_t)0x0C, /*!< Clock security system detection Flag */
00168   CLK_IT_SWIF = (uint8_t)0x1C /*!< Clock switch interrupt Flag */
00169 }CLK_IT_TypeDef;
00170 
00171 /**
00172    * @brief   CLK Clock Divisor.
00173    */
00174 
00175 /* Warning:
00176    0xxxxxx = HSI divider
00177    1xxxxxx = CPU divider
00178    Other bits correspond to the divider's bits mapping
00179 */
00180 typedef enum {
00181   CLK_PRESCALER_HSIDIV1   = (uint8_t)0x00, /*!< High speed internal clock prescaler: 1 */
00182   CLK_PRESCALER_HSIDIV2   = (uint8_t)0x08, /*!< High speed internal clock prescaler: 2 */
00183   CLK_PRESCALER_HSIDIV4   = (uint8_t)0x10, /*!< High speed internal clock prescaler: 4 */
00184   CLK_PRESCALER_HSIDIV8   = (uint8_t)0x18, /*!< High speed internal clock prescaler: 8 */
00185   CLK_PRESCALER_CPUDIV1   = (uint8_t)0x80, /*!< CPU clock division factors 1 */
00186   CLK_PRESCALER_CPUDIV2   = (uint8_t)0x81, /*!< CPU clock division factors 2 */
00187   CLK_PRESCALER_CPUDIV4   = (uint8_t)0x82, /*!< CPU clock division factors 4 */
00188   CLK_PRESCALER_CPUDIV8   = (uint8_t)0x83, /*!< CPU clock division factors 8 */
00189   CLK_PRESCALER_CPUDIV16  = (uint8_t)0x84, /*!< CPU clock division factors 16 */
00190   CLK_PRESCALER_CPUDIV32  = (uint8_t)0x85, /*!< CPU clock division factors 32 */
00191   CLK_PRESCALER_CPUDIV64  = (uint8_t)0x86, /*!< CPU clock division factors 64 */
00192   CLK_PRESCALER_CPUDIV128 = (uint8_t)0x87  /*!< CPU clock division factors 128 */
00193 } CLK_Prescaler_TypeDef;
00194 
00195 /**
00196    * @brief   SWIM Clock divider.
00197    */
00198 typedef enum {
00199   CLK_SWIMDIVIDER_2 = (uint8_t)0x00, /*!< SWIM clock is divided by 2 */
00200   CLK_SWIMDIVIDER_OTHER = (uint8_t)0x01 /*!< SWIM clock is not divided by 2 */
00201 }CLK_SWIMDivider_TypeDef;
00202 
00203 /**
00204   * @}
00205   */
00206 
00207 /* Exported constants --------------------------------------------------------*/
00208 
00209 /** @addtogroup CLK_Exported_Constants
00210   * @{
00211   */
00212 #define CLK_TIMEOUT ((uint16_t)0xFFFF) /*!< Max Timeout for the clock switch operation. */
00213 /**
00214   * @}
00215   */
00216 
00217 /* Private macros ------------------------------------------------------------*/
00218 /** @addtogroup CLK_Private_Macros
00219   * @{
00220   */
00221 
00222 /**
00223   * @brief  Macros used by the assert function in order to check the different functions parameters.
00224   */
00225 
00226 /**
00227   * @brief  Macros used by the assert function in order to check the clock switching modes.
00228   */
00229 #define IS_CLK_SWITCHMODE_OK(MODE) (((MODE) == CLK_SWITCHMODE_MANUAL) || ((MODE) == CLK_SWITCHMODE_AUTO))
00230 
00231 /**
00232   * @brief  Macros used by the assert function in order to check the current clock state.
00233   */
00234 #define IS_CLK_CURRENTCLOCKSTATE_OK(STATE) (((STATE) == CLK_CURRENTCLOCKSTATE_DISABLE) ||\
00235                                             ((STATE) == CLK_CURRENTCLOCKSTATE_ENABLE))
00236 
00237 /**
00238   * @brief  Macros used by the assert function in order to check the CSS configuration.
00239   */
00240 #define IS_CLK_CSSCONFIG_OK(CSSVALUE) (((CSSVALUE) == CLK_CSSCONFIG_ENABLEWITHIT) ||\
00241                                        ((CSSVALUE) == CLK_CSSCONFIG_ENABLE) ||\
00242                                        ((CSSVALUE) == CLK_CSSCONFIG_DISABLE))
00243 
00244 /**
00245   * @brief  Macros used by the assert function in order to check the different clock sources.
00246   */
00247 #define IS_CLK_SOURCE_OK(SOURCE) (((SOURCE) == CLK_SOURCE_HSI) ||\
00248                                   ((SOURCE) == CLK_SOURCE_LSI) ||\
00249                                   ((SOURCE) == CLK_SOURCE_HSE))
00250 
00251 /**
00252   * @brief  Macros used by the assert function in order to check the different HSI trimming values.
00253   */
00254 #define IS_CLK_HSITRIMVALUE_OK(TRIMVALUE) (((TRIMVALUE) == CLK_HSITRIMVALUE_0) ||\
00255     ((TRIMVALUE) == CLK_HSITRIMVALUE_1) ||\
00256     ((TRIMVALUE) == CLK_HSITRIMVALUE_2) ||\
00257     ((TRIMVALUE) == CLK_HSITRIMVALUE_3) ||\
00258     ((TRIMVALUE) == CLK_HSITRIMVALUE_4) ||\
00259     ((TRIMVALUE) == CLK_HSITRIMVALUE_5) ||\
00260     ((TRIMVALUE) == CLK_HSITRIMVALUE_6) ||\
00261     ((TRIMVALUE) == CLK_HSITRIMVALUE_7))
00262 
00263 /**
00264   * @brief  Macros used by the assert function in order to check the different clocks to output.
00265   */
00266 #define IS_CLK_OUTPUT_OK(OUTPUT) (((OUTPUT) == CLK_OUTPUT_HSI) ||\
00267                                   ((OUTPUT) == CLK_OUTPUT_HSE) ||\
00268                                   ((OUTPUT) == CLK_OUTPUT_LSI) ||\
00269                                   ((OUTPUT) == CLK_OUTPUT_CPU) ||\
00270                                   ((OUTPUT) == CLK_OUTPUT_CPUDIV2) ||\
00271                                   ((OUTPUT) == CLK_OUTPUT_CPUDIV4) ||\
00272                                   ((OUTPUT) == CLK_OUTPUT_CPUDIV8) ||\
00273                                   ((OUTPUT) == CLK_OUTPUT_CPUDIV16) ||\
00274                                   ((OUTPUT) == CLK_OUTPUT_CPUDIV32) ||\
00275                                   ((OUTPUT) == CLK_OUTPUT_CPUDIV64) ||\
00276                                   ((OUTPUT) == CLK_OUTPUT_HSIRC) ||\
00277                                   ((OUTPUT) == CLK_OUTPUT_MASTER) ||\
00278                                   ((OUTPUT) == CLK_OUTPUT_OTHERS))
00279 
00280 /**
00281   * @brief  Macros used by the assert function in order to check the different peripheral's clock.
00282   */
00283 #define IS_CLK_PERIPHERAL_OK(PERIPHERAL) (((PERIPHERAL) == CLK_PERIPHERAL_I2C) ||\
00284     ((PERIPHERAL) == CLK_PERIPHERAL_SPI) ||\
00285     ((PERIPHERAL) == CLK_PERIPHERAL_UART3) ||\
00286     ((PERIPHERAL) == CLK_PERIPHERAL_UART2) ||\
00287     ((PERIPHERAL) == CLK_PERIPHERAL_UART1) ||\
00288     ((PERIPHERAL) == CLK_PERIPHERAL_TIMER4) ||\
00289     ((PERIPHERAL) == CLK_PERIPHERAL_TIMER2) ||\
00290     ((PERIPHERAL) == CLK_PERIPHERAL_TIMER5) ||\
00291     ((PERIPHERAL) == CLK_PERIPHERAL_TIMER6) ||\
00292     ((PERIPHERAL) == CLK_PERIPHERAL_TIMER3) ||\
00293     ((PERIPHERAL) == CLK_PERIPHERAL_TIMER1) ||\
00294     ((PERIPHERAL) == CLK_PERIPHERAL_CAN) ||\
00295     ((PERIPHERAL) == CLK_PERIPHERAL_ADC) ||\
00296     ((PERIPHERAL) == CLK_PERIPHERAL_AWU))
00297 
00298 /**
00299   * @brief  Macros used by the assert function in order to check the different clock flags.
00300   */
00301 #define IS_CLK_FLAG_OK(FLAG) (((FLAG) == CLK_FLAG_LSIRDY) ||\
00302                               ((FLAG) == CLK_FLAG_HSIRDY) ||\
00303                               ((FLAG) == CLK_FLAG_HSERDY) ||\
00304                               ((FLAG) == CLK_FLAG_SWIF) ||\
00305                               ((FLAG) == CLK_FLAG_SWBSY) ||\
00306                               ((FLAG) == CLK_FLAG_CSSD) ||\
00307                               ((FLAG) == CLK_FLAG_AUX) ||\
00308                               ((FLAG) == CLK_FLAG_CCOBSY) ||\
00309                               ((FLAG) == CLK_FLAG_CCORDY))
00310 
00311 /**
00312   * @brief  Macros used by the assert function in order to check the different clock IT pending bits.
00313   */
00314 #define IS_CLK_IT_OK(IT) (((IT) == CLK_IT_CSSD) || ((IT) == CLK_IT_SWIF))
00315 
00316 /**
00317   * @brief  Macros used by the assert function in order to check the different HSI prescaler values.
00318   */
00319 #define IS_CLK_HSIPRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\
00320     ((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\
00321     ((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\
00322     ((PRESCALER) == CLK_PRESCALER_HSIDIV8))
00323 
00324 /**
00325   * @brief  Macros used by the assert function in order to check the different clock  prescaler values.
00326   */
00327 #define IS_CLK_PRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\
00328                                         ((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\
00329                                         ((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\
00330                                         ((PRESCALER) == CLK_PRESCALER_HSIDIV8) ||\
00331                                         ((PRESCALER) == CLK_PRESCALER_CPUDIV1) ||\
00332                                         ((PRESCALER) == CLK_PRESCALER_CPUDIV2) ||\
00333                                         ((PRESCALER) == CLK_PRESCALER_CPUDIV4) ||\
00334                                         ((PRESCALER) == CLK_PRESCALER_CPUDIV8) ||\
00335                                         ((PRESCALER) == CLK_PRESCALER_CPUDIV16) ||\
00336                                         ((PRESCALER) == CLK_PRESCALER_CPUDIV32) ||\
00337                                         ((PRESCALER) == CLK_PRESCALER_CPUDIV64) ||\
00338                                         ((PRESCALER) == CLK_PRESCALER_CPUDIV128))
00339 
00340 /**
00341   * @brief  Macros used by the assert function in order to check the different SWIM dividers values.
00342   */
00343 #define IS_CLK_SWIMDIVIDER_OK(SWIMDIVIDER) (((SWIMDIVIDER) == CLK_SWIMDIVIDER_2) || ((SWIMDIVIDER) == CLK_SWIMDIVIDER_OTHER))
00344 
00345 /**
00346   * @}
00347   */
00348 
00349 /** @addtogroup CLK_Exported_functions
00350   * @{
00351   */
00352 void CLK_DeInit(void);
00353 void CLK_HSECmd(FunctionalState NewState);
00354 void CLK_HSICmd(FunctionalState NewState);
00355 void CLK_LSICmd(FunctionalState NewState);
00356 void CLK_CCOCmd(FunctionalState NewState);
00357 void CLK_ClockSwitchCmd(FunctionalState NewState);
00358 void CLK_FastHaltWakeUpCmd(FunctionalState NewState);
00359 void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState);
00360 void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState);
00361 ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState);
00362 void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler);
00363 void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO);
00364 void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState);
00365 void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef CLK_Prescaler);
00366 void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider);
00367 void CLK_ClockSecuritySystemEnable(void);
00368 void CLK_SYSCLKEmergencyClear(void);
00369 void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue);
00370 uint32_t CLK_GetClockFreq(void);
00371 CLK_Source_TypeDef CLK_GetSYSCLKSource(void);
00372 FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG);
00373 ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT);
00374 void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT);
00375 
00376 /**
00377   * @}
00378   */
00379 #endif /* __STM8S_CLK_H */
00380 
00381 
00382 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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