REI

VAX11

 

REI - RETURN FROM EXCEPTION OR INTERRUPT

 

Purpose

exit from an exception or interrupt service routine

Format

opcode

Operation

tmp1ß(SP)+;

tmp2ß(SP)+;

if { tmp2 <current_mode> LSSU <current_mode> } or

{ tmp2<IS> EQLU 1 and PSL<IS> EQLU 0} or

{ tmp2<IS> EQLU 1 and tmp2<current_mode> NEQU 0 } or

{ tmp2<IS> EQLU 1 and tmp2<IPI> EQLU 0} or

{ tmp2<IPL> GRTU 0 and tmp2<current_mode> NEQU 0 } or

{ tmp2 <prev_mode> LSSU <current_mode> } or

{ tmp2<IPL> GRTU PSL<IPL> } or

{ tmp2<PSL_MBZ> NEQU 0} then

{reserved operand fault};

if { tmp2<CM> EQLU 1} and { tmp2<FPD, IS, DV, FU, IV> NEQU 0 } or { tmp2<current_mode> NEQU 3}} then

{reserved operand fault};

{ disallow interrupts};

if PSL<IS> EQLU 1 then ISPßSP

else PSL<current_mode>_SPßSP;

if  PSL<TP> EQLU 1 then tmp<TP>ß1

PCßtmp1;

PSLßtmp2;

Condition codes

N ß save PSL<3>;

Z ß save PSL<2>;

V ß save PSL<1>;

C ß save PSL<0>;

Exceptions

reserved operand

Opcodes

02        REI                  Return from Exception or Interrupt

Description

A longword is popped from the current stack and held in a temporary PC. A second longword is popped from the current stack and held in a temporary PSL. Validity of the popped PSL is checked. The current stack pointer is saved and a new stack pointer is selected according to the new PSL current mode and IS fields. The level of the highest privilege AST is checked against the current access mode to see whether a pending AST can be delivered. Execution resumes with the instruction being executed at the time of the exception or interrupt. Any instruction look ahead in the processor is reinitialized.

Notes

1. The exception or interrupt service routine is responsible for restoring any registers saved and removing any parameters from the stack.

 

2. As usual for faults, any access violation or translation not valid conditions on the stack pops restore the stack pointer and fault.

 

3. The non-interrupt stack pointers may be fetched and stored by hardware either in internal registers or in their allocated slots in the Process Control Block. Only LDPCTX and SVPCTX always fetch and store in the Process Control Block. MFPR and MTPR always fetch and store the pointers whether in registers or the Process Control Block.