BLB BRANCH ON LOW BIT
|
Purpose |
test bit |
|
Format |
opcode src.rl, displ.bb |
|
Operation |
teststate = if {BLBS} then 1 else 0; if src<0> EQL teststate then PC ß PC + SEXT (displ); |
|
Condition codes |
N ß N; Z ß Z; V ß V; C ß C; |
|
Exceptions |
none |
|
Opcodes |
E8 BLBS Branch on Low Bit Set E9 BLBC Branch on Low Bit Clear |
|
Description |
The low bit (bit 0) of the source operand is tested and if it is equal to the test state indicated by the instruction, the sign-extended branch displacement is added to PC and PC os replaced by the result. |
|
Notes |
The source operand is taken with longword context although only one bit is tested. |
Example 1
The example checks the first bit of r1 and jump to prn_true, as it contains 1.
.text
main: .word 0
movb $1, r1
blbs r1, prn_true
prn_false:
pushal lbl_false
pushal format
calls $2, .printf
halt
prn_true:
pushal lbl_true
pushal format
calls $2, .printf
halt
.data
lbl_true: .asciz "True"
lbl_false: .asciz "False"
format: .asciz "%s\n"