ADAWI

Purpose

maintain operating system resource usage counts

Format

opcode add.rw, sum.mw

Operation

tmp ß add;

{set interlock};

sum ß sum + tmp;

{released interlock};

Condition codes

N ß sum LSS 0;

Z ß sum EQL 0;

V ß {integer overflow};

C ß {carry from most significant bit};

Exceptions

reserved operand fault

integer overflow

Opcodes

58        ADAWI           Add Aligned Word Interlocked

Description

The addend operand is added to the sum operand and the sum operand is replaced by the result. The operation is interlocked against ADAWI operations by other processors or devices in the system. The destination must be aligned on a word boundary i.e., bit zero of the sum operand address must be zero. If it is not, a reserved operand fault is taken.

Notes

1. Integer overflow occurs if the input operands to the add have the same sign and the result has the opposite sign. On overflow, the sum operand is replaced by the low order bits of the true result.

2. If the addend and the sum operand overlap, the result and the condition codes are UNPREDICTABLE.