Hardware-Timed Simultaneously Updated I/O Using the Timed Loop (LabVIEW Only)

NI-DAQmx Key Concepts

Hardware-Timed Simultaneously Updated I/O Using the Timed Loop (LabVIEW Only)

Requirement

I/O needs to be hardware-timed. All output values need to simultaneously update at the arrival of the sample clock edge. The application uses the Timed Loop.

Solution

Use the DAQmx Create Timing Source function/VI to create a timing source that drives a Timed Loop that contains the I/O operations and the control algorithm.

Advantages

Using a timing source allows you to specify an I/O signal (for example, the sample clock signal) to trigger the execution of Timed Loop iterations.
Timing sources such as the Control Loop From Task provide strict lateness checking and allow other threads to execute while several analog channels are being multiplexed and sampled.
The Timed Loop provides feedback as to whether the iterations complete in time.
Multi-rate applications, using distinct I/O hardware subsystems, are possible by extending this approach to multiple Timed Loops.

Restrictions

Minor increase in overhead when compared to a regular LabVIEW While Loop
Requires additional code to handle warm-up iterations

Sample Application

An example of this kind of application is an analog control loop that reads samples from a specific number of analog input channels, processes the data using a control algorithm (such as PID), and writes the new control values to the analog output channels.

You can create such an application with the Control Loop From Task timing source. The Control Loop From Task timing source uses the sample clock signal from the analog input task, which allows strict lateness-checking of all tasks associated with that sample clock.

The Control Loop From Task timing source also allows you to specify a delay between the time the sample clock event is handled and the time the Timed Loop starts executing. This delay, or sleep time, keeps the Analog Input Read function/VI inside the Timed Loop from using 100% of the CPU time available while waiting for the analog input samples to be multiplexed and digitized.

Timing Diagram

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