Hardware-Timed Counter Tasks

NI-DAQmx Key Concepts

Hardware-Timed Counter Tasks

Requirement

Use hardware-timed counter input operations to drive a control loop.

Solution

Use the Wait For Next Sample Clock function/VI to synchronize the counter operations with the counter's sample clock.

Advantages

  • Counter tasks allow for flexible timing and event detection operations that can drive the software processing of the control loop. In other words, the control loop can have a dynamic clock rate.
  • NI-DAQmx returns an error if the Wait For Next Sample Clock function/VI does not start before the next sample clock edge arrives.

Restrictions

Read, process, and write operations are confined to the time available between the moment the device starts acquiring data and the moment the next sample clock edge arrives.

Sample Application

An example of this kind of application is a control loop that uses a counter input task, such as count edges, while controlling digital lines based on some predefined control logic. This sample application performs communication through the use of real-time FIFOs. In LabWindows/CVI, you can use a thread-safe queue instead of real-time FIFOs.

Timing Diagram

Sample Application 2

Another example application is a control loop that monitors discrete inputs and uses the values to update a counter output task, using pulse frequency mode to generate pulse-width modulation control signals. This example application performs communication through the use of real-time FIFOs. In LabWindows/CVI, you can use a thread-safe queue instead of real-time FIFOs.

Timing Diagram

Related Topic

LabVIEW example for Hardware-Timed Counter Tasks