This file provides firmware functions to manage the following functionalities of the Digital-to-Analog Converter (DAC) peripheral:

• DAC channels configuration: trigger, output buffer, data format
• DMA management
• Interrupts and flags management.

Author:

MCD Application Team

Version:

V1.5.0

Date:

13-May-2011

  *    
  *          ===================================================================
  *                             DAC Peripheral features
  *          ===================================================================
  *          The device integrates two 12-bit Digital Analog Converters that can 
  *          be used independently or simultaneously (dual mode):
  *            1- DAC channel1 with DAC_OUT1 (PF0) as output
  *            1- DAC channel2 with DAC_OUT2 (PF1) as output
  *
  *          Digital to Analog conversion can be non-triggered using DAC_Trigger_None
  *          and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register using 
  *          DAC_SetChannel1Data()/DAC_SetChannel2Data.
  *   
  *         Digital to Analog conversion can be triggered by:
  *             1- External event: PE4 using DAC_Trigger_Ext.
  *                This pin (PE4) must be configured in input mode.
  *
  *             2- Timers TRGO: TIM4, TIM5 
  *                (DAC_Trigger_T4_TRGO, DAC_Trigger_T5_TRGO)
  *                The timer TRGO event should be selected using TIMx_SelectOutputTrigger()
  *
  *             3- Software using DAC_Trigger_Software
  *
  *          Each DAC channel integrates an output buffer that can be used to 
  *          reduce the output impedance, and to drive external loads directly
  *          without having to add an external operational amplifier.
  *          
  *          Refer to the device datasheet for more details about output impedance
  *          value with and without output buffer.
  *
  *          Both DAC channels can be used to generate
  *             1- Noise wave using DAC_Wave_Noise
  *             2- Triangle wave using DAC_Wave_Triangle
  *        
  *
  *          The DAC data format can be:
  *             1- 8-bit right alignment using DAC_Align_8b_R
  *             2- 12-bit left alignment using DAC_Align_12b_L
  *             3- 12-bit right alignment using DAC_Align_12b_R
  *
  *          The analog output voltage on each DAC channel pin is determined
  *          by the following equation: DAC_OUTx = VREF+ * DOR / 4095
  *             with  DOR is the Data Output Register
  *                   VEF+ is the input voltage reference (refer to the device datasheet)
  *          e.g. To set DAC_OUT1 to 0.7V, use
  *            DAC_SetChannel1Data(DAC_Align_12b_R, 868);
  *          Assuming that VREF+ = 3.3, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
  *
  *          A DMA1 request can be generated when an external trigger (but not
  *          a software trigger) occurs if DMA1 requests are enabled using
  *          DAC_DMACmd()
  *          DMA1 requests are mapped as following:
  *             1- DAC channel1 is mapped on DMA1 channel3 which must be already 
  *                configured
  *             2- DAC channel2 is mapped on DMA1 channel1 which must be already 
  *                configured
  *
  *          ===================================================================      
  *                              How to use this driver 
  *          ===================================================================          
  *            - DAC clock must be enabled to get write access to DAC registers using
  *              CLK_PeripheralClockConfig(CLK_Peripheral_DAC, ENABLE)
  *            - Configure DAC_OUTx (DAC_OUT1: PF0, DAC_OUT2: PF1) in analog mode.
  *            - Configure the DAC channel using DAC_Init()
  *            - Enable the DAC channel using DAC_Cmd()
  * 
  *  

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© COPYRIGHT 2011 STMicroelectronics

Definition in file stm8l15x_dac.c.