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                    Ultra Low Power mode configuration functions
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 - The internal voltage reference consumption is not negligible, in particular 
   in Halt and Active Halt modes. To reduce power consumption, use the PWR_UltraLowPowerCmd()
   function (ULP bit (Ultra low power) in the PWR_CSR2 register) to disable the 
   internal voltage reference. However, in this case, when exiting from the 
   Halt/Active Halt modes, the functions managed through the internal voltage reference 
   are not reliable during the internal voltage reference startup time (up to 3 ms).
   To reduce the wakeup time, the device can exit from Halt/Active Halt modes without 
   waiting for the internal voltage reference startup time. This is performed 
   by using the PWR_FastWakeUpCmd() function (setting the FWU bit (Fast
   wakeup) in the PWR_CSR2 register) before entering Halt/Active Halt mode.