|
STM8L15x Standard Peripherals Drivers
|
Defines | |
| #define | DMA_CCR_ARM ((uint8_t)0x10) |
| #define | DMA_CCR_CE ((uint8_t)0x01) |
| #define | DMA_CCR_DTD ((uint8_t)0x08) |
| #define | DMA_CCR_HTIE ((uint8_t)0x04) |
| #define | DMA_CCR_IDM ((uint8_t)0x20) |
| #define | DMA_CCR_MEM ((uint8_t)0x40) |
| #define | DMA_CCR_TCIE ((uint8_t)0x02) |
| #define | DMA_CM0ARH_MA ((uint8_t)0xFF) |
| #define | DMA_CM0ARL_MA ((uint8_t)0xFF) |
| #define | DMA_CM0EAR_MA ((uint8_t)0x01) |
| #define | DMA_CNBTR_NDT ((uint8_t)0xFF) |
| #define | DMA_CPARH_PA ((uint8_t)0xFF) |
| #define | DMA_CPARL_PA ((uint8_t)0xFF) |
| #define | DMA_CSPR_16BM ((uint8_t)0x08) |
| #define | DMA_CSPR_BUSY ((uint8_t)0x80) |
| #define | DMA_CSPR_HTIF ((uint8_t)0x04) |
| #define | DMA_CSPR_PEND ((uint8_t)0x40) |
| #define | DMA_CSPR_PL ((uint8_t)0x30) |
| #define | DMA_CSPR_TCIF ((uint8_t)0x02) |
| #define | DMA_GCSR_GB ((uint8_t)0x02) |
| #define | DMA_GCSR_GE ((uint8_t)0x01) |
| #define | DMA_GCSR_TO ((uint8_t)0xFC) |
| #define | DMA_GIR1_IFC0 ((uint8_t)0x01) |
| #define | DMA_GIR1_IFC1 ((uint8_t)0x02) |
| #define | DMA_GIR1_IFC2 ((uint8_t)0x04) |
| #define | DMA_GIR1_IFC3 ((uint8_t)0x08) |
Define Documentation
| #define DMA_CCR_ARM ((uint8_t)0x10) |
Autorelaod mode Circular buffer mode
Definition at line 2574 of file stm8l15x.h.
| #define DMA_CCR_CE ((uint8_t)0x01) |
Channel enable
Definition at line 2570 of file stm8l15x.h.
Referenced by DMA_Cmd(), DMA_DeInit(), and DMA_Init().
| #define DMA_CCR_DTD ((uint8_t)0x08) |
Data transfer direction
Definition at line 2573 of file stm8l15x.h.
| #define DMA_CCR_HTIE ((uint8_t)0x04) |
Half Transfer interrupt enable
Definition at line 2572 of file stm8l15x.h.
Referenced by DMA_GetITStatus().
| #define DMA_CCR_IDM ((uint8_t)0x20) |
Inc/Dec mode
Definition at line 2575 of file stm8l15x.h.
| #define DMA_CCR_MEM ((uint8_t)0x40) |
Memory Transfer Enable
Definition at line 2576 of file stm8l15x.h.
| #define DMA_CCR_TCIE ((uint8_t)0x02) |
Transfer complete interrupt enable
Definition at line 2571 of file stm8l15x.h.
Referenced by DMA_GetITStatus().
| #define DMA_CM0ARH_MA ((uint8_t)0xFF) |
Memory MSB Address Pointer
Definition at line 2600 of file stm8l15x.h.
| #define DMA_CM0ARL_MA ((uint8_t)0xFF) |
Memory LSB Address Pointer
Definition at line 2601 of file stm8l15x.h.
| #define DMA_CM0EAR_MA ((uint8_t)0x01) |
Definition at line 2599 of file stm8l15x.h.
| #define DMA_CNBTR_NDT ((uint8_t)0xFF) |
Number of data to Transfer
Definition at line 2589 of file stm8l15x.h.
| #define DMA_CPARH_PA ((uint8_t)0xFF) |
Peripheral MSB Address Pointer
Definition at line 2593 of file stm8l15x.h.
| #define DMA_CPARL_PA ((uint8_t)0xFF) |
Peripheral LSB Address Pointer
Definition at line 2595 of file stm8l15x.h.
| #define DMA_CSPR_16BM ((uint8_t)0x08) |
| #define DMA_CSPR_BUSY ((uint8_t)0x80) |
Channel Busy
Definition at line 2585 of file stm8l15x.h.
| #define DMA_CSPR_HTIF ((uint8_t)0x04) |
Half Transaction Interrupt Flag
Definition at line 2581 of file stm8l15x.h.
| #define DMA_CSPR_PEND ((uint8_t)0x40) |
Channel pending
Definition at line 2584 of file stm8l15x.h.
| #define DMA_CSPR_PL ((uint8_t)0x30) |
| #define DMA_CSPR_TCIF ((uint8_t)0x02) |
Transaction Complete Interrupt Flag
Definition at line 2580 of file stm8l15x.h.
| #define DMA_GCSR_GB ((uint8_t)0x02) |
| #define DMA_GCSR_GE ((uint8_t)0x01) |
Global Enable
Definition at line 2558 of file stm8l15x.h.
Referenced by DMA_GlobalCmd(), and DMA_GlobalDeInit().
| #define DMA_GCSR_TO ((uint8_t)0xFC) |
Time Out
Definition at line 2560 of file stm8l15x.h.
| #define DMA_GIR1_IFC0 ((uint8_t)0x01) |
Interrupt Flag Channel 0
Definition at line 2563 of file stm8l15x.h.
| #define DMA_GIR1_IFC1 ((uint8_t)0x02) |
Interrupt Flag Channel 1
Definition at line 2564 of file stm8l15x.h.
| #define DMA_GIR1_IFC2 ((uint8_t)0x04) |
Interrupt Flag Channel 2
Definition at line 2565 of file stm8l15x.h.
| #define DMA_GIR1_IFC3 ((uint8_t)0x08) |
Interrupt Flag Channel 3
Definition at line 2566 of file stm8l15x.h.