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00003 //
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00007 // any modifications thereto. Any use, reproduction, disclosure, or 
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00010 // 
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00012 // NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, OR OTHERWISE WITH RESPECT TO
00013 // THE MATERIALS, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES OF NONINFRINGEMENT,
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00017 // However, NVIDIA Corporation assumes no responsibility for the consequences of use of such
00018 // information or for any infringement of patents or other rights of third parties that may
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00020 // or patent rights of NVIDIA Corporation. Details are subject to change without notice.
00021 // This code supersedes and replaces all information previously supplied.
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00024 // NVIDIA Corporation.
00025 //
00026 // Copyright (c) 2008-2012 NVIDIA Corporation. All rights reserved.
00027 
00028 #ifndef PX_GPU_COPY_DESC_QUEUE_H
00029 #define PX_GPU_COPY_DESC_QUEUE_H
00030 
00036 #include "foundation/PxAssert.h"
00037 #include "pxtask/PxGpuCopyDesc.h"
00038 #include "pxtask/PxGpuDispatcher.h"
00039 #include "pxtask/PxCudaContextManager.h"
00040 
00041 #ifndef PX_DOXYGEN
00042 namespace physx
00043 {
00044 #endif
00045 
00046 namespace pxtask
00047 {
00048 
00049 PX_PUSH_PACK_DEFAULT
00050 
00052 class GpuCopyDescQueue
00053 {
00054 public:
00056     GpuCopyDescQueue(GpuDispatcher& d)
00057         : mDispatcher(d)
00058         , mBuffer(0)
00059         , mStream(0)
00060         , mReserved(0)
00061         , mOccupancy(0)
00062         , mFlushed(0)
00063     {
00064     }
00065 
00067     ~GpuCopyDescQueue()
00068     {
00069         if (mBuffer)
00070         {
00071             mDispatcher.getCudaContextManager()->getMemoryManager()->free(CudaBufferMemorySpace::T_PINNED_HOST, (size_t) mBuffer);
00072         }
00073     }
00074 
00080     void reset(CUstream stream, PxU32 reserveSize)
00081     {
00082         if (reserveSize > mReserved)
00083         {
00084             if (mBuffer)
00085             {
00086                 mDispatcher.getCudaContextManager()->getMemoryManager()->free(
00087                     CudaBufferMemorySpace::T_PINNED_HOST,
00088                     (size_t) mBuffer);
00089                 mReserved = 0;
00090             }
00091             mBuffer = (GpuCopyDesc*) mDispatcher.getCudaContextManager()->getMemoryManager()->alloc(
00092                           CudaBufferMemorySpace::T_PINNED_HOST,
00093                           reserveSize * sizeof(GpuCopyDesc),
00094                           NV_ALLOC_INFO("PxGpuCopyDescQueue", GPU_UTIL));
00095             if (mBuffer)
00096             {
00097                 mReserved = reserveSize;
00098             }
00099         }
00100 
00101         mOccupancy = 0;
00102         mFlushed = 0;
00103         mStream = stream;
00104     }
00105 
00107     void enqueue(GpuCopyDesc& desc)
00108     {
00109         PX_ASSERT(desc.isValid());
00110         if (desc.bytes == 0)
00111         {
00112             return;
00113         }
00114 
00115         if (mOccupancy < mReserved)
00116         {
00117             mBuffer[ mOccupancy++ ] = desc;
00118         }
00119         else
00120         {
00121             mDispatcher.launchCopyKernel(&desc, 1, mStream);
00122         }
00123     }
00124 
00126     void flushEnqueued()
00127     {
00128         if (mOccupancy > mFlushed)
00129         {
00130             mDispatcher.launchCopyKernel(mBuffer + mFlushed, mOccupancy - mFlushed, mStream);
00131             mFlushed = mOccupancy;
00132         }
00133     }
00134 
00135 private:
00136     GpuDispatcher&  mDispatcher;
00137     GpuCopyDesc*    mBuffer;
00138     CUstream        mStream;
00139     PxU32           mReserved;
00140     PxU32           mOccupancy;
00141     PxU32           mFlushed;
00142 
00143     void operator=(const GpuCopyDescQueue&); // prevent a warning...
00144 };
00145 
00146 PX_POP_PACK
00147 
00148 } // end pxtask namespace
00149 
00150 #ifndef PX_DOXYGEN
00151 } // end physx namespace
00152 #endif
00153 
00154 #endif