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STM8L15x Standard Peripherals Drivers
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stm8l15x_i2c.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8l15x_i2c.c 00004 * @author MCD Application Team 00005 * @version V1.5.0 00006 * @date 13-May-2011 00007 * @brief This file provides firmware functions to manage the following 00008 * functionalities of the Inter-integrated circuit (I2C) 00009 * - Initialization and Configuration 00010 * - Data transfers 00011 * - PEC management 00012 * - DMA transfers management 00013 * - Interrupts, events and flags management 00014 * 00015 * @verbatim 00016 * 00017 * =================================================================== 00018 * How to use this driver 00019 * =================================================================== 00020 * 1. Enable peripheral clock using CLK_PeripheralClockConfig(CLK_Peripheral_I2Cx, 00021 * ENABLE) function (Refer to the product datasheet for the available I2C 00022 * peripherals) 00023 * 00024 * 00025 * 2. Program the Mode, duty cycle , Own address, Ack, Speed and Acknowledged 00026 * Address using the I2C_Init() function. 00027 * 00028 * 3. Optionally you can enable/configure the following parameters without 00029 * re-initialization (i.e there is no need to call again I2C_Init() function): 00030 * - Enable the acknowledge feature using I2C_AcknowledgeConfig() function 00031 * - Enable the dual addressing mode using I2C_DualAddressCmd() function 00032 * - Enable the general call using the I2C_GeneralCallCmd() function 00033 * - Enable the clock stretching using I2C_StretchClockCmd() function 00034 * - Enable the fast mode duty cycle using the I2C_FastModeDutyCycleConfig() 00035 * function 00036 * - Enable the PEC Calculation using I2C_CalculatePEC() function 00037 * - For SMBus Mode: 00038 * - Enable the Address Resolution Protocol (ARP) using I2C_ARPCmd() function 00039 * - Configure the SMBusAlert pin using I2C_SMBusAlertConfig() function 00040 * 00041 * 4. Enable the interrupt using the function I2C_ITConfig() if you need 00042 * to use interrupt mode. 00043 * 00044 * 5. When using the DMA mode 00045 * - Configure the DMA using DMA_Init() function 00046 * - Active the needed channel Request using I2C_DMACmd() or 00047 * I2C_DMALastTransferCmd() function 00048 * Note: When using DMA mode, I2C interrupts may be used at the same time to 00049 * control the communication flow (Start/Stop/Ack... events and errors). 00050 * 00051 * 6. Enable the I2C using the I2C_Cmd() function. 00052 * 00053 * 7. Enable the DMA using the DMA_Cmd() function when using DMA mode in the 00054 * transfers. 00055 * 00056 * Note: The external Pull-up resistors must be connected on SDA and SCL. 00057 * 00058 * @endverbatim 00059 * 00060 ****************************************************************************** 00061 * @attention 00062 * 00063 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 00064 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 00065 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 00066 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 00067 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 00068 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 00069 * 00070 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> 00071 ****************************************************************************** 00072 */ 00073 00074 /* Includes ------------------------------------------------------------------*/ 00075 #include "stm8l15x_i2c.h" 00076 #include "stm8l15x_clk.h" 00077 00078 /** @addtogroup STM8L15x_StdPeriph_Driver 00079 * @{ 00080 */ 00081 00082 /** @defgroup I2C 00083 * @brief I2C driver modules 00084 * @{ 00085 */ 00086 00087 /* Private typedef -----------------------------------------------------------*/ 00088 /* Private define ------------------------------------------------------------*/ 00089 /** @defgroup I2C_Private_Define 00090 * @{ 00091 */ 00092 00093 /* I2C register mask */ 00094 #define REGISTER_Mask ((uint16_t)0x3000) 00095 #define REGISTER_SR1_Index ((uint16_t)0x0100) 00096 #define REGISTER_SR2_Index ((uint16_t)0x0200) 00097 /* I2C Interrupt Enable mask */ 00098 #define ITEN_Mask ((uint16_t)0x0700) 00099 /* I2C FLAG mask */ 00100 #define FLAG_Mask ((uint16_t)0x00FF) 00101 /* I2C ADD0 mask */ 00102 #define OAR1_ADD0_Set ((uint8_t)0x01) 00103 #define OAR1_ADD0_Reset ((uint8_t)0xFE) 00104 00105 /** 00106 * @} 00107 */ 00108 00109 /* Private macro -------------------------------------------------------------*/ 00110 /* Private variables ---------------------------------------------------------*/ 00111 /* Private function prototypes -----------------------------------------------*/ 00112 /* Private functions ---------------------------------------------------------*/ 00113 00114 /** @defgroup I2C_Private_Functions 00115 * @{ 00116 */ 00117 00118 /** @defgroup I2C_Group1 Initialization and Configuration functions 00119 * @brief Initialization and Configuration functions 00120 * 00121 @verbatim 00122 =============================================================================== 00123 Initialization and Configuration functions 00124 =============================================================================== 00125 00126 @endverbatim 00127 * @{ 00128 */ 00129 00130 /** 00131 * @brief Deinitializes the I2C peripheral registers to their default reset values. 00132 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00133 * @retval None 00134 */ 00135 void I2C_DeInit(I2C_TypeDef* I2Cx) 00136 { 00137 I2Cx->CR1 = I2C_CR1_RESET_VALUE; 00138 I2Cx->CR2 = I2C_CR2_RESET_VALUE; 00139 I2Cx->FREQR = I2C_FREQR_RESET_VALUE; 00140 I2Cx->OARL = I2C_OARL_RESET_VALUE; 00141 I2Cx->OARH = I2C_OARH_RESET_VALUE; 00142 I2Cx->OAR2 = I2C_OAR2_RESET_VALUE; 00143 I2Cx->ITR = I2C_ITR_RESET_VALUE; 00144 I2Cx->CCRL = I2C_CCRL_RESET_VALUE; 00145 I2Cx->CCRH = I2C_CCRH_RESET_VALUE; 00146 I2Cx->TRISER = I2C_TRISER_RESET_VALUE; 00147 } 00148 00149 /** 00150 * @brief Initializes the I2C according to the specified parameters in standard 00151 * or fast mode. 00152 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00153 * @param OutputClockFrequency: Specifies the output clock frequency in Hz. 00154 * @param OwnAddress: Specifies the own address. 00155 * @param I2C_Mode: Specifies the addressing mode to apply. 00156 * This parameter can be one of the following values: 00157 * @arg I2C_Mode_I2C: I2C mode 00158 * @arg I2C_Mode_SMBusDevice: SMBus Device mode 00159 * @arg I2C_Mode_SMBusHost: SMBus Host mode 00160 * @param I2C_DutyCycle: Specifies the duty cycle to apply in fast mode. 00161 * This parameter can be one of the following values: 00162 * @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2 00163 * @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9 00164 * @note The I2C_DutyCycle parameter doesn't have impact when the OutputClockFrequency 00165 * is lower than 100KHz. 00166 * @param I2C_Ack: Specifies the acknowledge mode to apply. 00167 * This parameter can be one of the following values: 00168 * @arg I2C_Ack_Disable: No acknowledge 00169 * @arg I2C_Ack_Enable: Acknowledge Enabled 00170 * @param I2C_AcknowledgedAddress: Specifies the acknowledge address to apply. 00171 * This parameter can be one of the following values: 00172 * @arg I2C_AcknowledgedAddress_7bit: 7-bit slave address 00173 * @arg I2C_AcknowledgedAddress_10bit: 10-bit slave address 00174 * @note To use the I2C at 400 KHz (in fast mode), the PCLK frequency 00175 * (I2C peripheral input clock) must be a multiple of 10 MHz. 00176 * @retval None 00177 */ 00178 void I2C_Init(I2C_TypeDef* I2Cx, uint32_t OutputClockFrequency, uint16_t OwnAddress, 00179 I2C_Mode_TypeDef I2C_Mode, I2C_DutyCycle_TypeDef I2C_DutyCycle, 00180 I2C_Ack_TypeDef I2C_Ack, I2C_AcknowledgedAddress_TypeDef I2C_AcknowledgedAddress) 00181 { 00182 uint32_t result = 0x0004; 00183 uint16_t tmpval = 0; 00184 uint8_t tmpccrh = 0; 00185 uint8_t input_clock = 0; 00186 00187 /* Check the parameters */ 00188 assert_param(IS_I2C_MODE(I2C_Mode)); 00189 assert_param(IS_I2C_ACK_STATE(I2C_Ack)); 00190 assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_AcknowledgedAddress)); 00191 assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle)); 00192 assert_param(IS_I2C_OWN_ADDRESS(OwnAddress)); 00193 assert_param(IS_I2C_OUTPUT_CLOCK_FREQ(OutputClockFrequency)); 00194 00195 00196 /* Get system clock frequency */ 00197 input_clock = (uint8_t) (CLK_GetClockFreq() / 1000000); 00198 00199 /*------------------------- I2C FREQ Configuration ------------------------*/ 00200 /* Clear frequency bits */ 00201 I2Cx->FREQR &= (uint8_t)(~I2C_FREQR_FREQ); 00202 /* Write new value */ 00203 I2Cx->FREQR |= input_clock; 00204 00205 /*--------------------------- I2C CCR Configuration ------------------------*/ 00206 /* Disable I2C to configure TRISER */ 00207 I2Cx->CR1 &= (uint8_t)(~I2C_CR1_PE); 00208 00209 /* Clear CCRH & CCRL */ 00210 I2Cx->CCRH &= (uint8_t)(~(I2C_CCRH_FS | I2C_CCRH_DUTY | I2C_CCRH_CCR)); 00211 I2Cx->CCRL &= (uint8_t)(~I2C_CCRL_CCR); 00212 00213 /* Detect Fast or Standard mode depending on the Output clock frequency selected */ 00214 if (OutputClockFrequency > I2C_MAX_STANDARD_FREQ) /* FAST MODE */ 00215 { 00216 /* Set F/S bit for fast mode */ 00217 tmpccrh = I2C_CCRH_FS; 00218 00219 if (I2C_DutyCycle == I2C_DutyCycle_2) 00220 { 00221 /* Fast mode speed calculate: Tlow/Thigh = 2 */ 00222 result = (uint32_t) ((input_clock * 1000000) / (OutputClockFrequency * 3)); 00223 } 00224 else /* I2C_DUTYCYCLE_16_9 */ 00225 { 00226 /* Fast mode speed calculate: Tlow/Thigh = 16/9 */ 00227 result = (uint32_t) ((input_clock * 1000000) / (OutputClockFrequency * 25)); 00228 /* Set DUTY bit */ 00229 tmpccrh |= I2C_CCRH_DUTY; 00230 } 00231 00232 /* Verify and correct CCR value if below minimum value */ 00233 if (result < (uint16_t)0x01) 00234 { 00235 /* Set the minimum allowed value */ 00236 result = (uint16_t)0x0001; 00237 } 00238 00239 /* Set Maximum Rise Time: 300ns max in Fast Mode 00240 = [300ns/(1/input_clock.10e6)]+1 00241 = [(input_clock * 3)/10]+1 */ 00242 tmpval = ((input_clock * 3) / 10) + 1; 00243 I2Cx->TRISER = (uint8_t)tmpval; 00244 00245 } 00246 else /* STANDARD MODE */ 00247 { 00248 00249 /* Calculate standard mode speed */ 00250 result = (uint16_t)((input_clock * 1000000) / (OutputClockFrequency << (uint8_t)1)); 00251 00252 /* Verify and correct CCR value if below minimum value */ 00253 if (result < (uint16_t)0x0004) 00254 { 00255 /* Set the minimum allowed value */ 00256 result = (uint16_t)0x0004; 00257 } 00258 00259 /* Set Maximum Rise Time: 1000ns max in Standard Mode 00260 = [1000ns/(1/input_clock.10e6)]+1 00261 = input_clock+1 */ 00262 I2Cx->TRISER = (uint8_t)((uint8_t)input_clock + (uint8_t)1); 00263 00264 } 00265 00266 /* Write CCR with new calculated value */ 00267 I2Cx->CCRL = (uint8_t)result; 00268 I2Cx->CCRH = (uint8_t)((uint8_t)((uint8_t)((uint8_t)result >> 8) & I2C_CCRH_CCR) | tmpccrh); 00269 00270 /* Enable I2C and Configure its mode*/ 00271 I2Cx->CR1 |= (uint8_t)(I2C_CR1_PE | I2C_Mode); 00272 00273 /* Configure I2C acknowledgement */ 00274 I2Cx->CR2 |= (uint8_t)I2C_Ack; 00275 00276 /*--------------------------- I2C OAR Configuration ------------------------*/ 00277 I2Cx->OARL = (uint8_t)(OwnAddress); 00278 I2Cx->OARH = (uint8_t)((uint8_t)(I2C_AcknowledgedAddress | I2C_OARH_ADDCONF ) | \ 00279 (uint8_t)((uint16_t)( (uint16_t)OwnAddress & (uint16_t)0x0300) >> 7)); 00280 } 00281 00282 /** 00283 * @brief Enables or disables the I2C peripheral. 00284 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00285 * @param NewState: Indicate the new I2C peripheral state. 00286 * This parameter can be: ENABLE or DISABLE. 00287 * @retval None 00288 */ 00289 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00290 { 00291 00292 /* Check function parameters */ 00293 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00294 00295 if (NewState != DISABLE) 00296 { 00297 /* Enable I2C peripheral */ 00298 I2Cx->CR1 |= I2C_CR1_PE; 00299 } 00300 else /* NewState == DISABLE */ 00301 { 00302 /* Disable I2C peripheral */ 00303 I2Cx->CR1 &= (uint8_t)(~I2C_CR1_PE); 00304 } 00305 } 00306 00307 /** 00308 * @brief Enables or disables the I2C General Call feature. 00309 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00310 * @param NewState: State of the General Call feature. 00311 * This parameter can be: ENABLE or DISABLE. 00312 * @retval None 00313 */ 00314 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00315 { 00316 00317 /* Check function parameters */ 00318 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00319 00320 if (NewState != DISABLE) 00321 { 00322 /* Enable General Call */ 00323 I2Cx->CR1 |= I2C_CR1_ENGC; 00324 } 00325 else /* NewState == DISABLE */ 00326 { 00327 /* Disable General Call */ 00328 I2Cx->CR1 &= (uint8_t)(~I2C_CR1_ENGC); 00329 } 00330 } 00331 00332 /** 00333 * @brief Generates I2C communication START condition. 00334 * @note CCR must be programmed, i.e. I2C_Init function must have been called 00335 * with a valid I2C_ClockSpeed 00336 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00337 * @param NewState: Enable or disable the start condition. 00338 * This parameter can be: ENABLE or DISABLE. 00339 * @retval None 00340 */ 00341 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState) 00342 { 00343 00344 /* Check function parameters */ 00345 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00346 00347 if (NewState != DISABLE) 00348 { 00349 /* Generate a START condition */ 00350 I2Cx->CR2 |= I2C_CR2_START; 00351 } 00352 else /* NewState == DISABLE */ 00353 { 00354 /* Disable the START condition generation */ 00355 I2Cx->CR2 &= (uint8_t)(~I2C_CR2_START); 00356 } 00357 } 00358 00359 /** 00360 * @brief Generates I2C communication STOP condition. 00361 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00362 * @param NewState: Enable or disable the stop condition. 00363 * This parameter can be: ENABLE or DISABLE. 00364 * @retval None 00365 */ 00366 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState) 00367 { 00368 00369 /* Check function parameters */ 00370 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00371 00372 if (NewState != DISABLE) 00373 { 00374 /* Generate a STOP condition */ 00375 I2Cx->CR2 |= I2C_CR2_STOP; 00376 } 00377 else /* NewState == DISABLE */ 00378 { 00379 /* Disable the STOP condition generation */ 00380 I2Cx->CR2 &= (uint8_t)(~I2C_CR2_STOP); 00381 } 00382 } 00383 00384 /** 00385 * @brief Enables or disables I2C software reset. 00386 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00387 * @param NewState: Specifies the new state of the I2C software reset. 00388 * This parameter can be: ENABLE or DISABLE. 00389 * @retval None 00390 */ 00391 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00392 { 00393 /* Check function parameters */ 00394 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00395 00396 if (NewState != DISABLE) 00397 { 00398 /* Peripheral under reset */ 00399 I2Cx->CR2 |= I2C_CR2_SWRST; 00400 } 00401 else /* NewState == DISABLE */ 00402 { 00403 /* Peripheral not under reset */ 00404 I2Cx->CR2 &= (uint8_t)(~I2C_CR2_SWRST); 00405 } 00406 } 00407 00408 /** 00409 * @brief Enables or disables the I2C clock stretching. 00410 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00411 * @param NewState: Specifies the new state of the I2C Clock stretching. 00412 * This parameter can be: ENABLE or DISABLE. 00413 * @retval None 00414 */ 00415 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00416 { 00417 /* Check function parameters */ 00418 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00419 00420 if (NewState != DISABLE) 00421 { 00422 /* Clock Stretching Enable */ 00423 I2Cx->CR1 &= (uint8_t)(~I2C_CR1_NOSTRETCH); 00424 00425 } 00426 else /* NewState == DISABLE */ 00427 { 00428 /* Clock Stretching Disable (Slave mode) */ 00429 I2Cx->CR1 |= I2C_CR1_NOSTRETCH; 00430 } 00431 } 00432 00433 /** 00434 * @brief Enables or disables the I2C ARP. 00435 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00436 * @param NewState: Specifies the new state of the I2C ARP 00437 * This parameter can be: ENABLE or DISABLE. 00438 * @retval None 00439 */ 00440 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00441 { 00442 /* Check function parameters */ 00443 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00444 00445 if (NewState != DISABLE) 00446 { 00447 /* ARP Enable */ 00448 I2Cx->CR1 |= I2C_CR1_ARP; 00449 00450 } 00451 else /* NewState == DISABLE */ 00452 { 00453 /* ARP Disable */ 00454 I2Cx->CR1 &= (uint8_t)(~I2C_CR1_ARP); 00455 } 00456 } 00457 00458 /** 00459 * @brief Enable or Disable the I2C acknowledge feature. 00460 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00461 * @param NewState: Specifies the new state of the I2C acknowledge. 00462 * This parameter can be: ENABLE or DISABLE. 00463 * @retval None 00464 */ 00465 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState) 00466 { 00467 /* Check function parameters */ 00468 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00469 00470 if (NewState != DISABLE) 00471 { 00472 /* Enable the acknowledgement */ 00473 I2Cx->CR2 |= I2C_CR2_ACK; 00474 } 00475 else 00476 { 00477 /* Disable the acknowledgement */ 00478 I2Cx->CR2 &= (uint8_t)(~I2C_CR2_ACK); 00479 } 00480 } 00481 00482 /** 00483 * @brief Configures the specified I2C own address2. 00484 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00485 * @param Address: specifies the 7bit I2C own address2. 00486 * @retval None. 00487 */ 00488 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address) 00489 { 00490 uint8_t tmpreg = 0; 00491 00492 /* Get the old register value */ 00493 tmpreg = I2Cx->OAR2; 00494 00495 /* Reset I2Cx Own address2 bit [7:1] */ 00496 tmpreg &= (uint8_t)(~I2C_OAR2_ADD2); 00497 00498 /* Set I2Cx Own address2 */ 00499 tmpreg |= (uint8_t) ((uint8_t)Address & (uint8_t)0xFE); 00500 00501 /* Store the new register value */ 00502 I2Cx->OAR2 = tmpreg; 00503 } 00504 00505 /** 00506 * @brief Enables or disables the specified I2C dual addressing mode. 00507 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00508 * @param NewState: new state of the I2C dual addressing mode. 00509 * This parameter can be: ENABLE or DISABLE. 00510 * @retval None 00511 */ 00512 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00513 { 00514 /* Check the parameters */ 00515 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00516 00517 if (NewState != DISABLE) 00518 { 00519 /* Enable dual addressing mode */ 00520 I2Cx->OAR2 |= I2C_OAR2_ENDUAL; 00521 } 00522 else 00523 { 00524 /* Disable dual addressing mode */ 00525 I2Cx->OAR2 &= (uint8_t)(~I2C_OAR2_ENDUAL); 00526 } 00527 } 00528 00529 /** 00530 * @brief Selects the specified I2C Ack position. 00531 * @note This function must be called before data reception starts. 00532 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00533 * @param I2C_AckPosition: specifies the Ack position. 00534 * This parameter can be one of the following values: 00535 * @arg I2C_AckPosition_Current: Acknowledge on the current byte 00536 * @arg I2C_AckPosition_Next: Acknowledge on the next byte 00537 * @retval None 00538 */ 00539 void I2C_AckPositionConfig(I2C_TypeDef* I2Cx, I2C_AckPosition_TypeDef I2C_AckPosition) 00540 { 00541 /* Check function parameters */ 00542 assert_param(IS_I2C_ACK_POSITION(I2C_AckPosition)); 00543 00544 /* Clear the I2C Ack position */ 00545 I2Cx->CR2 &= (uint8_t)(~I2C_CR2_POS); 00546 /* Configure the specified I2C Ack position*/ 00547 I2Cx->CR2 |= (uint8_t)I2C_AckPosition; 00548 } 00549 00550 /** 00551 * @brief Drives the SMBusAlert pin high or low. 00552 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00553 * @param I2C_SMBusAlert: SMBusAlert pin state. 00554 * This parameter can be one of the following values: 00555 * @arg I2C_SMBusAlert_High: SMBAlert pin high 00556 * @arg I2C_SMBusAlert_Low: SMBAlert pin Low 00557 * @retval None 00558 */ 00559 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, I2C_SMBusAlert_TypeDef I2C_SMBusAlert) 00560 { 00561 00562 /* Check functions parameters */ 00563 assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert)); 00564 00565 if (I2C_SMBusAlert != I2C_SMBusAlert_High) 00566 { 00567 /* SMBus Alert pin low */ 00568 I2Cx->CR2 |= (uint8_t)I2C_CR2_ALERT; 00569 } 00570 else /*I2C_SMBusAlert = I2C_SMBusAlert_High */ 00571 { 00572 /* SMBus Alert pin high */ 00573 I2Cx->CR2 &= (uint8_t)(~I2C_CR2_ALERT); 00574 } 00575 } 00576 00577 /** 00578 * @brief Selects I2C fast mode duty cycle. 00579 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00580 * @param I2C_DutyCycle: specifies the fast mode duty cycle. 00581 * This parameter can be one of the following values: 00582 * @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2 00583 * @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9 00584 * @retval None 00585 */ 00586 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, I2C_DutyCycle_TypeDef I2C_DutyCycle) 00587 { 00588 00589 /* Check function parameters */ 00590 assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle)); 00591 00592 if (I2C_DutyCycle == I2C_DutyCycle_16_9) 00593 { 00594 /* I2C fast mode Tlow/Thigh = 16/9 */ 00595 I2Cx->CCRH |= I2C_CCRH_DUTY; 00596 } 00597 else /* I2C_DUTYCYCLE_2 */ 00598 { 00599 /* I2C fast mode Tlow/Thigh = 2 */ 00600 I2Cx->CCRH &= (uint8_t)(~I2C_CCRH_DUTY); 00601 } 00602 } 00603 00604 /** 00605 * @brief Transmits the 7-bit address (to select the) slave device. 00606 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00607 * @param Address: Specifies the slave address which will be transmitted. 00608 * @param I2C_Direction: specifies whether the I2C device will be a Transmitter 00609 * or a Receiver. 00610 * This parameter can be one of the following values 00611 * @arg I2C_Direction_Transmitter: Transmitter mode 00612 * @arg I2C_Direction_Receiver: Receiver mode 00613 * @retval None 00614 */ 00615 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, I2C_Direction_TypeDef I2C_Direction) 00616 { 00617 /* Check function parameters */ 00618 assert_param(IS_I2C_ADDRESS(Address)); 00619 assert_param(IS_I2C_DIRECTION(I2C_Direction)); 00620 00621 /* Test on the direction to set/reset the read/write bit */ 00622 if (I2C_Direction != I2C_Direction_Transmitter) 00623 { 00624 /* Set the address bit0 for read */ 00625 Address |= OAR1_ADD0_Set; 00626 } 00627 else 00628 { 00629 /* Reset the address bit0 for write */ 00630 Address &= OAR1_ADD0_Reset; 00631 } 00632 /* Send the address */ 00633 I2Cx->DR = Address; 00634 } 00635 00636 /** 00637 * @} 00638 */ 00639 00640 /** @defgroup I2C_Group2 Data transfers functions 00641 * @brief Data transfers functions 00642 * 00643 @verbatim 00644 =============================================================================== 00645 Data transfers functions 00646 =============================================================================== 00647 00648 @endverbatim 00649 * @{ 00650 */ 00651 00652 /** 00653 * @brief Send a byte by writing in the DR register. 00654 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00655 * @param Data: Byte to be sent. 00656 * @retval None 00657 */ 00658 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data) 00659 { 00660 /* Write in the DR register the data to be sent */ 00661 I2Cx->DR = Data; 00662 } 00663 00664 /** 00665 * @brief Returns the most recent received data. 00666 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00667 * @param None 00668 * @retval The value of the received byte data. 00669 */ 00670 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx) 00671 { 00672 /* Return the data present in the DR register */ 00673 return ((uint8_t)I2Cx->DR); 00674 } 00675 00676 /** 00677 * @} 00678 */ 00679 00680 /** @defgroup I2C_Group3 PEC management functions 00681 * @brief PEC management functions 00682 * 00683 @verbatim 00684 =============================================================================== 00685 PEC management functions 00686 =============================================================================== 00687 00688 @endverbatim 00689 * @{ 00690 */ 00691 00692 /** 00693 * @brief Enables or disables PEC transfer. 00694 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00695 * @param NewState: indicates the PEC transfer state. 00696 * This parameter can be: ENABLE or DISABLE. 00697 * @retval None 00698 */ 00699 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState) 00700 { 00701 /* Check the parameters */ 00702 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00703 00704 if (NewState != DISABLE) 00705 { 00706 /* Enable the PEC transmission */ 00707 I2Cx->CR2 |= I2C_CR2_PEC; 00708 } 00709 else 00710 { 00711 /* Disable the PEC transmission */ 00712 I2Cx->CR2 &= (uint8_t)(~I2C_CR2_PEC); 00713 } 00714 } 00715 00716 /** 00717 * @brief Enables or disables PEC calculation. 00718 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00719 * @param NewState: indicates the PEC calculation state. 00720 * This parameter can be: ENABLE or DISABLE. 00721 * @retval None 00722 */ 00723 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState) 00724 { 00725 /* Check the parameters */ 00726 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00727 00728 if (NewState != DISABLE) 00729 { 00730 /* Enable PEC calculation */ 00731 I2Cx->CR1 |= I2C_CR1_ENPEC; 00732 } 00733 else 00734 { 00735 /* Disable PEC calculation */ 00736 I2Cx->CR1 &= (uint8_t)(~I2C_CR1_ENPEC); 00737 } 00738 } 00739 00740 /** 00741 * @brief Selects I2C PEC position.. 00742 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00743 * @param I2C_PECPosition:PEC position. 00744 * This parameter can be one of the following values: 00745 * @arg I2C_PECPosition_Current: Current byte in shift register is PEC 00746 * @arg I2C_PECPosition_Next: Next byte in shift register is PEC 00747 * @retval None 00748 */ 00749 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, I2C_PECPosition_TypeDef I2C_PECPosition) 00750 { 00751 /* Check the parameters */ 00752 assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition)); 00753 00754 /* Clear the I2C PEC position */ 00755 I2Cx->CR2 &= (uint8_t)(~I2C_CR2_POS); 00756 /* Configure the specified I2C PEC position*/ 00757 I2Cx->CR2 |= (uint8_t)I2C_PECPosition; 00758 } 00759 00760 /** 00761 * @brief Returns PEC value. 00762 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00763 * @param None 00764 * @retval The value of the PEC. 00765 */ 00766 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx) 00767 { 00768 /* Return the PEC value */ 00769 return (I2Cx->PECR); 00770 } 00771 00772 /** 00773 * @} 00774 */ 00775 00776 /** @defgroup I2C_Group4 DMA transfers management functions 00777 * @brief DMA transfers management functions 00778 * 00779 @verbatim 00780 =============================================================================== 00781 DMA transfers management functions 00782 =============================================================================== 00783 This section provides functions allowing to configure the I2C DMA channels 00784 requests. 00785 00786 @endverbatim 00787 * @{ 00788 */ 00789 00790 /** 00791 * @brief Enables or disables the I2C DMA requests . 00792 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00793 * @param NewState: Indicate the new I2C DMA state. 00794 * This parameter can be: ENABLE or DISABLE. 00795 * @retval None 00796 */ 00797 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00798 { 00799 /* Check the parameters */ 00800 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00801 00802 if (NewState != DISABLE) 00803 { 00804 /* Enable I2C DMA requests */ 00805 I2Cx->ITR |= I2C_ITR_DMAEN; 00806 } 00807 else 00808 { 00809 /* Disable I2C DMA requests */ 00810 I2Cx->ITR &= (uint8_t)(~I2C_ITR_DMAEN); 00811 } 00812 } 00813 00814 /** 00815 * @brief Specifies that the next DMA transfer is the last one . 00816 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00817 * @param NewState: Indicate the new I2C DMA state. 00818 * This parameter can be: ENABLE or DISABLE. 00819 * @retval None 00820 */ 00821 void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00822 { 00823 /* Check the parameters */ 00824 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00825 00826 if (NewState != DISABLE) 00827 { 00828 /* Enable I2C DMA requests */ 00829 I2Cx->ITR |= I2C_ITR_LAST; 00830 } 00831 else 00832 { 00833 /* Disable I2C DMA requests */ 00834 I2Cx->ITR &= (uint8_t)(~I2C_ITR_LAST); 00835 } 00836 } 00837 00838 /** 00839 * @} 00840 */ 00841 00842 /** @defgroup I2C_Group5 Interrupts events and flags management functions 00843 * @brief Interrupts, events and flags management functions 00844 * 00845 @verbatim 00846 =============================================================================== 00847 Interrupts, events and flags management functions 00848 =============================================================================== 00849 This section provides functions allowing to configure the I2C Interrupts 00850 sources and check or clear the flags or pending bits status. 00851 The user should identify which mode will be used in his application to manage 00852 the communication: Polling mode, Interrupt mode or DMA mode. 00853 00854 =============================================================================== 00855 I2C State Monitoring Functions 00856 =============================================================================== 00857 This I2C driver provides three different ways for I2C state monitoring 00858 depending on the application requirements and constraints: 00859 00860 00861 1. Basic state monitoring (Using I2C_CheckEvent() function) 00862 ----------------------------------------------------------- 00863 It compares the status registers (SR1, SR2 and SR3) content to a given event 00864 (can be the combination of one or more flags). 00865 It returns SUCCESS if the current status includes the given flags 00866 and returns ERROR if one or more flags are missing in the current status. 00867 - When to use: 00868 - This function is suitable for most applications as well as for startup 00869 activity since the events are fully described in the product reference manual 00870 (RM0031). 00871 - It is also suitable for users who need to define their own events. 00872 - Limitations: 00873 - If an error occurs (ie. error flags are set besides to the monitored flags), 00874 the I2C_CheckEvent() function may return SUCCESS despite the communication 00875 hold or corrupted real state. 00876 In this case, it is advised to use error interrupts to monitor the error 00877 events and handle them in the interrupt IRQ handler. 00878 00879 @note 00880 For error management, it is advised to use the following functions: 00881 - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). 00882 - I2Cx_IRQHandler() which is called when the I2C interrupts occur. 00883 Where x is the peripheral instance (I2C1,...) 00884 - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the 00885 I2Cx_IRQHandler() function in order to determine which error occurred. 00886 - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() 00887 and/or I2C_GenerateStop() in order to clear the error flag and 00888 source and return to correct communication status. 00889 00890 00891 2. Advanced state monitoring (Using the function I2C_GetLastEvent()) 00892 -------------------------------------------------------------------- 00893 Using the function I2C_GetLastEvent() which returns the image of both SR1 00894 & SR3 status registers in a single word (uint16_t) (Status Register 3 value 00895 is shifted left by 8 bits and concatenated to Status Register 1). 00896 - When to use: 00897 - This function is suitable for the same applications above but it allows to 00898 overcome the limitations of I2C_GetFlagStatus() function (see below). 00899 The returned value could be compared to events already defined in the 00900 library (stm8l15x_i2c.h) or to custom values defined by user. 00901 - This function is suitable when multiple flags are monitored at the same time. 00902 - At the opposite of I2C_CheckEvent() function, this function allows user to 00903 choose when an event is accepted (when all events flags are set and no 00904 other flags are set or just when the needed flags are set like 00905 I2C_CheckEvent() function). 00906 - Limitations: 00907 - User may need to define his own events. 00908 - Same remark concerning the error management is applicable for this 00909 function if user decides to check only regular communication flags (and 00910 ignores error flags). 00911 00912 00913 3. Flag-based state monitoring (Using the function I2C_GetFlagStatus()) 00914 ----------------------------------------------------------------------- 00915 Using the function I2C_GetFlagStatus() which simply returns the status of 00916 one single flag (ie. I2C_FLAG_RXNE ...). 00917 - When to use: 00918 - This function could be used for specific applications or in debug phase. 00919 - It is suitable when only one flag checking is needed (most I2C events 00920 are monitored through multiple flags). 00921 - Limitations: 00922 - When calling this function, the Status register is accessed. Some flags are 00923 cleared when the status register is accessed. So checking the status 00924 of one Flag, may clear other ones. 00925 - Function may need to be called twice or more in order to monitor one 00926 single event. 00927 00928 For detailed description of Events, please refer to section I2C_Events in 00929 stm8l15x_i2c.h file. 00930 00931 00932 @endverbatim 00933 * @{ 00934 */ 00935 00936 /** 00937 * @brief Enables or disables the specified I2C interrupt. 00938 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00939 * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled. 00940 * This parameter can be any combination of the following values: 00941 * @arg I2C_IT_BUF: Buffer interrupt mask 00942 * @arg I2C_IT_EVT: Event interrupt mask 00943 * @arg I2C_IT_ERR: Error interrupt mask 00944 * @param NewState: State of the interrupt. 00945 * This parameter can be: ENABLE or DISABLE. 00946 * @retval None 00947 */ 00948 void I2C_ITConfig(I2C_TypeDef* I2Cx, I2C_IT_TypeDef I2C_IT, FunctionalState NewState) 00949 { 00950 /* Check functions parameters */ 00951 assert_param(IS_I2C_CONFIG_IT(I2C_IT)); 00952 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00953 00954 if (NewState != DISABLE) 00955 { 00956 /* Enable the selected I2C interrupts */ 00957 I2Cx->ITR |= (uint8_t)I2C_IT; 00958 } 00959 else /* NewState == DISABLE */ 00960 { 00961 /* Disable the selected I2C interrupts */ 00962 I2Cx->ITR &= (uint8_t)(~(uint8_t)I2C_IT); 00963 } 00964 } 00965 00966 /** 00967 * @brief Reads the specified I2C register and returns its value. 00968 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 00969 * @param I2C_Register: specifies the register to read. 00970 * This parameter can be one of the following values: 00971 * @arg I2C_Register_CR1: CR1 register. 00972 * @arg I2C_Register_CR2: CR2 register. 00973 * @arg I2C_Register_FREQR: Frequency register. 00974 * @arg I2C_Register_OARL: Own address register LSB. 00975 * @arg I2C_Register_OARH: Own address register MSB 00976 * @arg I2C_Register_DR: DR register. 00977 * @arg I2C_Register_SR1: SR1 register. 00978 * @arg I2C_Register_SR2: SR2 register. 00979 * @arg I2C_Register_SR3: SR3 register. 00980 * @arg I2C_Register_ITR: Interrupt and DMA register. 00981 * @arg I2C_Register_CCRL: Clock control register low. 00982 * @arg I2C_Register_CCRH: Clock control register high. 00983 * @arg I2C_Register_TRISER: TRISE register. 00984 * @arg I2C_Register_PECR: PEC register. 00985 * @retval The value of the read register. 00986 */ 00987 00988 uint8_t I2C_ReadRegister(I2C_TypeDef* I2Cx, I2C_Register_TypeDef I2C_Register) 00989 { 00990 __IO uint16_t tmp = 0; 00991 /* Check the parameters */ 00992 assert_param(IS_I2C_REGISTER(I2C_Register)); 00993 00994 tmp = (uint16_t) I2Cx; 00995 tmp += I2C_Register; 00996 00997 /* Return the selected register value */ 00998 return (*(__IO uint8_t *) tmp); 00999 } 01000 01001 01002 /** 01003 =============================================================================== 01004 1. Basic state monitoring 01005 =============================================================================== 01006 */ 01007 01008 /** 01009 * @brief Checks whether the last I2Cx Event is equal to the one passed 01010 * as parameter. 01011 * @param I2Cx: where x can be 1 to select the I2C peripheral. 01012 * @param I2C_EVENT: specifies the event to be checked. 01013 * This parameter can be one of the following values: 01014 * @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED: EV1 01015 * @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED: EV1 01016 * @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED: EV1 01017 * @arg I2C_EVENT_SLAVE_BYTE_RECEIVED: EV2 01018 * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL): EV2 01019 * @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED: EV3 01020 * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL): EV3 01021 * @arg I2C_EVENT_SLAVE_ACK_FAILURE: EV3_2 01022 * @arg I2C_EVENT_SLAVE_STOP_DETECTED: EV4 01023 * @arg I2C_EVENT_MASTER_MODE_SELECT: EV5 01024 * @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED: EV6 01025 * @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED: EV6 01026 * @arg I2C_EVENT_MASTER_BYTE_RECEIVED: EV7 01027 * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING: EV8 01028 * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED: EV8_2 01029 * @arg I2C_EVENT_MASTER_MODE_ADDRESS10: EV9 01030 * 01031 * @note: For detailed description of Events, please refer to section 01032 * I2C_Events in stm8l15x_i2c.h file. 01033 * 01034 * @retval An ErrorStatus enumeration value: 01035 * - SUCCESS: Last event is equal to the I2C_EVENT 01036 * - ERROR: Last event is different from the I2C_EVENT 01037 */ 01038 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, I2C_Event_TypeDef I2C_Event) 01039 { 01040 __IO uint16_t lastevent = 0x00; 01041 uint8_t flag1 = 0x00 ; 01042 uint8_t flag2 = 0x00; 01043 ErrorStatus status = ERROR; 01044 01045 /* Check the parameters */ 01046 assert_param(IS_I2C_EVENT(I2C_Event)); 01047 01048 if (I2C_Event == I2C_EVENT_SLAVE_ACK_FAILURE) 01049 { 01050 lastevent = I2Cx->SR2 & I2C_SR2_AF; 01051 } 01052 else 01053 { 01054 flag1 = I2Cx->SR1; 01055 flag2 = I2Cx->SR3; 01056 lastevent = ((uint16_t)((uint16_t)flag2 << (uint16_t)8) | (uint16_t)flag1); 01057 } 01058 /* Check whether the last event is equal to I2C_EVENT */ 01059 if (((uint16_t)lastevent & (uint16_t)I2C_Event) == (uint16_t)I2C_Event) 01060 { 01061 /* SUCCESS: last event is equal to I2C_EVENT */ 01062 status = SUCCESS; 01063 } 01064 else 01065 { 01066 /* ERROR: last event is different from I2C_EVENT */ 01067 status = ERROR; 01068 } 01069 01070 /* Return status */ 01071 return status; 01072 } 01073 01074 /** 01075 =============================================================================== 01076 2. Advanced state monitoring 01077 =============================================================================== 01078 */ 01079 01080 /** 01081 * @brief Returns the last I2C Event. 01082 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 01083 * 01084 * @note: For detailed description of Events, please refer to section 01085 * I2C_Events in stm8l15xx_i2c.h file. 01086 * 01087 * @retval The last event 01088 */ 01089 I2C_Event_TypeDef I2C_GetLastEvent(I2C_TypeDef* I2Cx) 01090 { 01091 __IO uint16_t lastevent = 0; 01092 uint16_t flag1 = 0; 01093 uint16_t flag2 = 0; 01094 01095 if ((I2Cx->SR2 & I2C_SR2_AF) != 0x00) 01096 { 01097 lastevent = I2C_EVENT_SLAVE_ACK_FAILURE; 01098 } 01099 else 01100 { 01101 /* Read the I2C status register */ 01102 flag1 = I2Cx->SR1; 01103 flag2 = I2Cx->SR3; 01104 01105 /* Get the last event value from I2C status register */ 01106 lastevent = ((uint16_t)((uint16_t)flag2 << 8) | (uint16_t)flag1); 01107 } 01108 /* Return status */ 01109 return (I2C_Event_TypeDef)lastevent; 01110 } 01111 01112 /** 01113 =============================================================================== 01114 3. Flag-based state monitoring 01115 =============================================================================== 01116 */ 01117 01118 /** 01119 * @brief Checks whether the specified I2C flag is set or not. 01120 * @param I2Cx: where x can be 1 select the I2C peripheral. 01121 * @param I2C_FLAG: specifies the flag to check. 01122 * This parameter can be one of the following values: 01123 * @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode) 01124 * @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode) 01125 * @arg I2C_FLAG_GENCALL: General call header flag (Slave mode) 01126 * @arg I2C_FLAG_TRA: Transmitter/Receiver flag 01127 * @arg I2C_FLAG_BUSY: Bus busy flag 01128 * @arg I2C_FLAG_MSL: Master/Slave flag 01129 * @arg I2C_FLAG_SMBALERT: SMBus Alert flag 01130 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag 01131 * @arg I2C_FLAG_PECERR: PEC error in reception flag 01132 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) 01133 * @arg I2C_FLAG_AF: Acknowledge failure flag 01134 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) 01135 * @arg I2C_FLAG_BERR: Bus error flag 01136 * @arg I2C_FLAG_TXE: Data register empty flag (Transmitter) 01137 * @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag 01138 * @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode) 01139 * @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode) 01140 * @arg I2C_FLAG_BTF: Byte transfer finished flag 01141 * @arg I2C_FLAG_ADDR: Address sent flag (Master mode) �ADSL� 01142 * Address matched flag (Slave mode)�ENDAD� 01143 * @arg I2C_FLAG_SB: Start bit flag (Master mode) 01144 * @retval The new state of I2C_FLAG (SET or RESET). 01145 */ 01146 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, I2C_FLAG_TypeDef I2C_FLAG) 01147 { 01148 uint8_t tempreg = 0; 01149 uint8_t regindex = 0; 01150 FlagStatus bitstatus = RESET; 01151 01152 /* Check the parameters */ 01153 assert_param(IS_I2C_GET_FLAG(I2C_FLAG)); 01154 01155 /* Read flag register index */ 01156 regindex = (uint8_t)((uint16_t)I2C_FLAG >> 8); 01157 /* Check SRx index */ 01158 switch (regindex) 01159 { 01160 /* Returns whether the status register to check is SR1 */ 01161 case 0x01: 01162 tempreg = (uint8_t)I2Cx->SR1; 01163 break; 01164 01165 /* Returns whether the status register to check is SR2 */ 01166 case 0x02: 01167 tempreg = (uint8_t)I2Cx->SR2; 01168 break; 01169 01170 /* Returns whether the status register to check is SR3 */ 01171 case 0x03: 01172 tempreg = (uint8_t)I2Cx->SR3; 01173 break; 01174 01175 default: 01176 break; 01177 } 01178 01179 /* Check the status of the specified I2C flag */ 01180 if ((tempreg & (uint8_t)I2C_FLAG ) != 0) 01181 { 01182 /* Flag is set */ 01183 bitstatus = SET; 01184 } 01185 else 01186 { 01187 /* Flag is reset */ 01188 bitstatus = RESET; 01189 } 01190 /* Return the flag status */ 01191 return bitstatus; 01192 } 01193 /** 01194 * @brief Clear flags 01195 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 01196 * @param I2C_Flag: Specifies the flag to clear 01197 * This parameter can be any combination of the following values: 01198 * @arg I2C_FLAG_SMBALERT: SMBus Alert flag 01199 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag 01200 * @arg I2C_FLAG_PECERR: PEC error in reception flag 01201 * @arg I2C_FLAG_WUFH: Wakeup from Halt 01202 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) 01203 * @arg I2C_FLAG_AF: Acknowledge failure flag 01204 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) 01205 * @arg I2C_FLAG_BERR: Bus error flag. 01206 * @note STOPF (STOP detection) is cleared by software sequence: a read operation 01207 * to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation 01208 * to I2C_CR2 register. 01209 * @note ADD10 (10-bit header sent) is cleared by software sequence: a read 01210 * operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the 01211 * second byte of the address in DR register. 01212 * @note BTF (Byte Transfer Finished) is cleared by software sequence: a read 01213 * operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a 01214 * read/write to I2C_DR register (I2C_SendData()). 01215 * @note ADDR (Address sent) is cleared by software sequence: a read operation 01216 * to I2C_SR1 register(I2C_GetFlagStatus()) followed by a read operation 01217 * to I2C_SR3 register ((void)(I2Cx->SR3)). 01218 * @note SB (Start Bit) is cleared software sequence: a read operation to 01219 * I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation 01220 * to I2C_DR register (I2C_SendData()). 01221 * @retval None 01222 */ 01223 void I2C_ClearFlag(I2C_TypeDef* I2Cx, I2C_FLAG_TypeDef I2C_FLAG) 01224 { 01225 uint16_t flagpos = 0; 01226 /* Check the parameters */ 01227 assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG)); 01228 01229 /* Get the I2C flag position */ 01230 flagpos = (uint16_t)I2C_FLAG & FLAG_Mask; 01231 /* Clear the selected I2C flag */ 01232 I2Cx->SR2 = (uint8_t)((uint16_t)(~flagpos)); 01233 } 01234 01235 /** 01236 * @brief Checks whether the specified I2C interrupt has occurred or not. 01237 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 01238 * @param I2C_IT: specifies the interrupt source to check. 01239 * This parameter can be one of the following values: 01240 * @arg I2C_IT_SMBALERT: SMBus Alert interrupt 01241 * @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt 01242 * @arg I2C_IT_PECERR: PEC error in reception interrupt 01243 * @arg I2C_IT_WUFH: Wakeup from Halt 01244 * @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode) 01245 * @arg I2C_IT_AF: Acknowledge failure flag 01246 * @arg I2C_IT_ARLO: Arbitration lost flag (Master mode) 01247 * @arg I2C_IT_BERR: Bus error flag 01248 * @arg I2C_IT_TXE: Data register empty flag (Transmitter) 01249 * @arg I2C_IT_RXNE: Data register not empty (Receiver) flag 01250 * @arg I2C_IT_STOPF: Stop detection flag (Slave mode) 01251 * @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode) 01252 * @arg I2C_IT_BTF: Byte transfer finished flag 01253 * @arg I2C_IT_ADDR: Address sent flag (Master mode) �ADSL� 01254 * Address matched flag (Slave mode)�ENDAD� 01255 * @arg I2C_IT_SB: Start bit flag (Master mode) 01256 * @retval The new state of I2C_IT 01257 */ 01258 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, I2C_IT_TypeDef I2C_IT) 01259 { 01260 ITStatus bitstatus = RESET; 01261 __IO uint8_t enablestatus = 0; 01262 uint16_t tempregister = 0; 01263 01264 /* Check the parameters */ 01265 assert_param(IS_I2C_GET_IT(I2C_IT)); 01266 01267 tempregister = (uint8_t)( ((uint16_t)((uint16_t)I2C_IT & ITEN_Mask)) >> 8); 01268 01269 /* Check if the interrupt source is enabled or not */ 01270 enablestatus = (uint8_t)(I2Cx->ITR & ( uint8_t)tempregister); 01271 01272 if ((uint16_t)((uint16_t)I2C_IT & REGISTER_Mask) == REGISTER_SR1_Index) 01273 { 01274 /* Check the status of the specified I2C flag */ 01275 if (((I2Cx->SR1 & (uint8_t)I2C_IT) != RESET) && enablestatus) 01276 { 01277 /* I2C_IT is set */ 01278 bitstatus = SET; 01279 } 01280 else 01281 { 01282 /* I2C_IT is reset */ 01283 bitstatus = RESET; 01284 } 01285 } 01286 else 01287 { 01288 /* Check the status of the specified I2C flag */ 01289 if (((I2Cx->SR2 & (uint8_t)I2C_IT) != RESET) && enablestatus) 01290 { 01291 /* I2C_IT is set */ 01292 bitstatus = SET; 01293 } 01294 else 01295 { 01296 /* I2C_IT is reset */ 01297 bitstatus = RESET; 01298 } 01299 } 01300 /* Return the I2C_IT status */ 01301 return bitstatus; 01302 } 01303 /** 01304 * @brief Clear IT pending bit 01305 * @param I2Cx: where x can be 1 to select the specified I2C peripheral. 01306 * @param I2C_IT: specifies the interrupt pending bit to clear. 01307 * This parameter can be any combination of the following values: 01308 * @arg I2C_IT_SMBALERT: SMBus Alert interrupt 01309 * @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt 01310 * @arg I2C_IT_PECERR: PEC error in reception interrupt 01311 * @arg I2C_IT_WUFH: Wakeup from Halt 01312 * @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode) 01313 * @arg I2C_IT_AF: Acknowledge failure interrupt 01314 * @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode) 01315 * @arg I2C_IT_BERR: Bus error interrupt 01316 * 01317 * @note STOPF (STOP detection) is cleared by software sequence: a read operation 01318 * to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to 01319 * I2C_CR2 register (I2C_AcknowledgeConfig() to configure the I2C peripheral Acknowledge). 01320 * @note ADD10 (10-bit header sent) is cleared by software sequence: a read 01321 * operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second 01322 * byte of the address in I2C_DR register. 01323 * @note BTF (Byte Transfer Finished) is cleared by software sequence: a read 01324 * operation to I2C_SR1 register (I2C_GetITStatus()) followed by a read/write to 01325 * I2C_DR register (I2C_SendData()). 01326 * @note ADDR (Address sent) is cleared by software sequence: a read operation 01327 * to I2C_SR1 register (I2C_GetITStatus()) followed by a read operation 01328 * to I2C_SR3 register ((void)(I2Cx->SR3)). 01329 * @note SB (Start Bit) is cleared by software sequence: a read operation to 01330 * I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to 01331 * I2C_DR register (I2C_SendData()). 01332 * @retval None 01333 */ 01334 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, I2C_IT_TypeDef I2C_IT) 01335 { 01336 uint16_t flagpos = 0; 01337 01338 /* Check the parameters */ 01339 assert_param(IS_I2C_CLEAR_IT(I2C_IT)); 01340 01341 /* Get the I2C flag position */ 01342 flagpos = (uint16_t)I2C_IT & FLAG_Mask; 01343 01344 /* Clear the selected I2C flag */ 01345 I2Cx->SR2 = (uint8_t)((uint16_t)~flagpos); 01346 } 01347 /** 01348 * @} 01349 */ 01350 01351 /** 01352 * @} 01353 */ 01354 01355 /** 01356 * @} 01357 */ 01358 01359 /** 01360 * @} 01361 */ 01362 01363 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/