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00003 //
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00007 // any modifications thereto. Any use, reproduction, disclosure, or 
00008 // distribution of this software and related documentation without an express 
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00010 // 
00011 // ALL NVIDIA DESIGN SPECIFICATIONS, CODE ARE PROVIDED "AS IS.". NVIDIA MAKES
00012 // NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, OR OTHERWISE WITH RESPECT TO
00013 // THE MATERIALS, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES OF NONINFRINGEMENT,
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00015 //
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00017 // However, NVIDIA Corporation assumes no responsibility for the consequences of use of such
00018 // information or for any infringement of patents or other rights of third parties that may
00019 // result from its use. No license is granted by implication or otherwise under any patent
00020 // or patent rights of NVIDIA Corporation. Details are subject to change without notice.
00021 // This code supersedes and replaces all information previously supplied.
00022 // NVIDIA Corporation products are not authorized for use as critical
00023 // components in life support devices or systems without express written approval of
00024 // NVIDIA Corporation.
00025 //
00026 // Copyright (c) 2008-2012 NVIDIA Corporation. All rights reserved.
00027 
00028 #ifndef PX_SPU_TASK_H
00029 #define PX_SPU_TASK_H
00030 
00031 #include "pxtask/PxTask.h"
00032 #include "pxtask/PxSpuDispatcher.h"
00033 
00034 #ifndef PX_DOXYGEN
00035 namespace physx
00036 {
00037 #endif
00038 
00039 namespace pxtask
00040 {
00041 
00061 class SpuTask : public LightCpuTask
00062 {
00063 public:
00064 
00065     static const PxU32 kMaxSpus = 6;        
00066     static const PxU32 kArgsPerSpu = 2; 
00067 
00075     SpuTask(const void* elfStart, PxU32 elfSize, PxU32 numSpus=1, const PxU32* args=NULL) 
00076         : mElfStart(elfStart)
00077         , mElfSize(elfSize)
00078         , mNumSpusToRun(numSpus)
00079         , mNumSpusFinished(0) 
00080     {
00081         if (args)
00082         {
00083             memcpy(mArgs, args, mNumSpusToRun*kArgsPerSpu*sizeof(PxU32));
00084         }       
00085     }
00086 
00087     virtual ~SpuTask() {}
00088 
00092     PX_INLINE PxU32 getSpuCount() const
00093     {
00094         return mNumSpusToRun; 
00095     }
00096 
00100     PX_INLINE void setSpuCount(PxU32 numSpusToRun)  
00101     { 
00102         PX_ASSERT(numSpusToRun);
00103         mNumSpusToRun = numSpusToRun; 
00104     }
00105 
00111     PX_INLINE const PxU32* getArgs(PxU32 spuIndex) const 
00112     { 
00113         PX_ASSERT(spuIndex < kMaxSpus); 
00114         return mArgs[spuIndex]; 
00115     }
00116 
00117 
00124     PX_INLINE void setArgs(PxU32 spuIndex, PxU32 arg1, PxU32 arg2)
00125     {
00126         PX_ASSERT(spuIndex < kMaxSpus);
00127         PxU32* arguments = mArgs[spuIndex];
00128         arguments[0]=arg1;
00129         arguments[1]=arg2;
00130     }
00131 
00135     PX_INLINE const void* getElfStart() const
00136     {
00137         return mElfStart; 
00138     }
00139 
00143     PX_INLINE PxU32 getElfSize() const 
00144     {
00145         return mElfSize;
00146     }
00147 
00153     PX_INLINE void notifySpuFinish()
00154     {
00155         ++mNumSpusFinished;
00156 
00157         // if all SPU tasks have finished clean-up and release
00158         if (mNumSpusFinished == mNumSpusToRun)
00159         {
00160             mNumSpusFinished = 0;
00161             release();          
00162         }
00163     }
00164 
00168     virtual void removeReference()
00169     {
00170         PX_ASSERT(mTm);
00171         mTm->decrReference(*this);
00172     }
00173 
00182     virtual void run() {}
00183 
00190     virtual void runAfterDispatch() {}
00191 
00192 protected:
00193 
00194     const void* mElfStart;              
00195     PxU32 mElfSize;                     
00196     PxU32 mNumSpusToRun;                
00197     PxU32 mNumSpusFinished;             
00198     PxU32 mArgs[kMaxSpus][kArgsPerSpu]; 
00199 
00200 } 
00201 // wrap this in a macro so Doxygen doesn't get confused and output it
00202 #ifndef PX_DOXYGEN
00203 PX_ALIGN_SUFFIX(16)
00204 #endif
00205 ;
00206 
00207 } // end pxtask namespace
00208 
00209 #ifndef PX_DOXYGEN
00210 } // end physx namespace
00211 #endif
00212 
00213 #endif