PxCudaContextManager.h
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All rights reserved. 00027 00028 00029 #ifndef PX_CUDA_CONTEXT_MANAGER_H 00030 #define PX_CUDA_CONTEXT_MANAGER_H 00031 00032 #include "pxtask/PxCudaMemoryManager.h" 00033 00034 /* Forward decl to avoid inclusion of cuda.h */ 00035 typedef struct CUctx_st *CUcontext; 00036 typedef struct CUgraphicsResource_st *CUgraphicsResource; 00037 00038 #ifndef PX_DOXYGEN 00039 namespace physx 00040 { 00041 #endif 00042 00043 class PxProfileZoneManager; 00044 00045 namespace pxtask 00046 { 00047 00049 struct CudaInteropMode 00050 { 00054 enum Enum 00055 { 00056 NO_INTEROP = 0, 00057 D3D9_INTEROP, 00058 D3D10_INTEROP, 00059 D3D11_INTEROP, 00060 OGL_INTEROP, 00061 00062 COUNT 00063 }; 00064 }; 00065 00067 class CudaContextManagerDesc 00068 { 00069 public: 00091 CUcontext *ctx; 00092 00100 void *graphicsDevice; 00101 00102 #if defined(PX_WINDOWS) 00103 00110 const char* appGUID; 00111 #endif 00112 00119 CudaInteropMode::Enum interopMode; 00120 00121 00134 PxU32 memoryBaseSize[CudaBufferMemorySpace::COUNT]; 00135 00142 PxU32 memoryPageSize[CudaBufferMemorySpace::COUNT]; 00143 00147 PxU32 maxMemorySize[CudaBufferMemorySpace::COUNT]; 00148 00149 PX_INLINE CudaContextManagerDesc() 00150 { 00151 ctx = NULL; 00152 interopMode = CudaInteropMode::NO_INTEROP; 00153 graphicsDevice = 0; 00154 #if defined(PX_WINDOWS) 00155 appGUID = NULL; 00156 #endif 00157 for(PxU32 i = 0; i < CudaBufferMemorySpace::COUNT; i++) 00158 { 00159 memoryBaseSize[i] = 0; 00160 memoryPageSize[i] = 2 * 1024*1024; 00161 maxMemorySize[i] = PX_MAX_U32; 00162 } 00163 } 00164 }; 00165 00166 00184 class CudaContextManager 00185 { 00186 public: 00202 virtual void acquireContext() = 0; 00203 00211 virtual void releaseContext() = 0; 00212 00217 virtual CudaMemoryManager *getMemoryManager() = 0; 00218 00223 virtual class GpuDispatcher *getGpuDispatcher() = 0; 00224 00234 virtual bool contextIsValid() const = 0; 00235 00236 /* Query CUDA context and device properties, without acquiring context */ 00237 00238 virtual bool supportsArchSM10() const = 0; 00239 virtual bool supportsArchSM11() const = 0; 00240 virtual bool supportsArchSM12() const = 0; 00241 virtual bool supportsArchSM13() const = 0; 00242 virtual bool supportsArchSM20() const = 0; 00243 virtual bool supportsArchSM30() const = 0; 00244 virtual bool supportsArchSM35() const = 0; 00245 virtual bool isIntegrated() const = 0; 00246 virtual bool hasDMAEngines() const = 0; 00247 virtual bool canMapHostMemory() const = 0; 00248 virtual int getDriverVersion() const = 0; 00249 virtual size_t getDeviceTotalMemBytes() const = 0; 00250 virtual int getMultiprocessorCount() const = 0; 00251 virtual unsigned int getClockRate() const = 0; 00252 virtual int getSharedMemPerBlock() const = 0; 00253 virtual const char *getDeviceName() const = 0; 00254 virtual CudaInteropMode::Enum getInteropMode() const = 0; 00255 00256 /* End query methods that don't require context to be acquired */ 00257 00277 virtual bool registerResourceInCudaGL(CUgraphicsResource &resource, PxU32 buffer) = 0; 00278 00298 virtual bool registerResourceInCudaD3D(CUgraphicsResource &resource, void *resourcePointer) = 0; 00299 00307 virtual bool unregisterResourceInCuda(CUgraphicsResource resource) = 0; 00308 00316 virtual int usingDedicatedPhysXGPU() const = 0; 00317 00333 virtual void release() = 0; 00334 00335 protected: 00336 00340 virtual ~CudaContextManager() {}; 00341 }; 00342 00346 class ScopedCudaLock 00347 { 00348 public: 00352 ScopedCudaLock(CudaContextManager& ctx) : mCtx(&ctx) 00353 { 00354 mCtx->acquireContext(); 00355 } 00356 00360 ~ScopedCudaLock() 00361 { 00362 mCtx->releaseContext(); 00363 } 00364 00365 protected: 00366 00370 CudaContextManager* mCtx; 00371 }; 00372 00378 int getSuggestedCudaDeviceOrdinal(PxErrorCallback& errc); 00379 00385 CudaContextManager* createCudaContextManager(PxFoundation& foundation, const CudaContextManagerDesc& desc, physx::PxProfileZoneManager* mgr); 00386 00390 #if defined(PX_WINDOWS) 00391 void* loadPhysxGPUModule(const char* appGUID = NULL); 00392 #else 00393 void* loadPhysxGPUModule(); 00394 #endif 00395 } // end pxtask namespace 00396 00397 #ifndef PX_DOXYGEN 00398 } // end physx namespace 00399 #endif 00400 00401 #endif
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