NVIDIA(R) PhysX(R) SDK 3.4 API Reference: PxCudaContextManager.h Source File

NVIDIA PhysX SDK 3.4 API

PxCudaContextManager.h

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00026 // Copyright (c) 2008-2017 NVIDIA Corporation. All rights reserved.
00027 
00028 
00029 #ifndef PXCUDACONTEXTMANAGER_PXCUDACONTEXTMANAGER_H
00030 #define PXCUDACONTEXTMANAGER_PXCUDACONTEXTMANAGER_H
00031 
00032 #include "foundation/PxPreprocessor.h"
00033 
00034 #if PX_SUPPORT_GPU_PHYSX
00035 
00036 #include "foundation/PxSimpleTypes.h"
00037 #include "foundation/PxErrorCallback.h"
00038 #include "foundation/PxFlags.h"
00039 #include "task/PxTaskDefine.h"
00040 #include "cudamanager/PxCudaMemoryManager.h"
00041 
00042 /* Forward decl to avoid inclusion of cuda.h */
00043 typedef struct CUctx_st *CUcontext;
00044 typedef struct CUgraphicsResource_st *CUgraphicsResource;
00045 typedef int CUdevice;
00046 
00047 namespace physx
00048 { 
00049     
00050 class PxGpuDispatcher;
00051 
00052 
00054 struct PxCudaInteropMode
00055 {
00059     enum Enum
00060     {
00061         NO_INTEROP = 0,
00062         D3D10_INTEROP,
00063         D3D11_INTEROP,
00064         OGL_INTEROP,
00065 
00066         COUNT
00067     };
00068 };
00069 
00070 struct PxCudaInteropRegisterFlag
00071 {
00072     enum Enum
00073     {
00074         eNONE           = 0x00,
00075         eREAD_ONLY      = 0x01,
00076         eWRITE_DISCARD  = 0x02,
00077         eSURFACE_LDST   = 0x04,
00078         eTEXTURE_GATHER = 0x08
00079     };
00080 };
00081 
00087 typedef PxFlags<PxCudaInteropRegisterFlag::Enum, uint32_t> PxCudaInteropRegisterFlags;
00088 PX_FLAGS_OPERATORS(PxCudaInteropRegisterFlag::Enum, uint32_t)
00089 
00090 
00091 class PxCudaContextManagerDesc
00092 {
00093 public:
00115     CUcontext            *ctx;
00116 
00124     void                 *graphicsDevice;
00125 
00126 #if PX_SUPPORT_GPU_PHYSX
00127 
00134     const char*          appGUID;
00135 #endif
00136 
00143     PxCudaInteropMode::Enum interopMode;
00144 
00145 
00161     uint32_t    memoryBaseSize[PxCudaBufferMemorySpace::COUNT];
00162 
00172     uint32_t    memoryPageSize[PxCudaBufferMemorySpace::COUNT];
00173 
00180     uint32_t    maxMemorySize[PxCudaBufferMemorySpace::COUNT];
00181 
00182     PX_INLINE PxCudaContextManagerDesc()
00183     {
00184         ctx = NULL;
00185         interopMode = PxCudaInteropMode::NO_INTEROP;
00186         graphicsDevice = 0;
00187 #if PX_SUPPORT_GPU_PHYSX
00188         appGUID  = NULL;
00189 #endif
00190         for(uint32_t i = 0; i < PxCudaBufferMemorySpace::COUNT; i++)
00191         {
00192             memoryBaseSize[i] = 0;
00193             memoryPageSize[i] = 2 * 1024*1024;
00194             maxMemorySize[i] = UINT32_MAX;
00195         }
00196     }
00197 };
00198 
00199 
00217 class PxCudaContextManager
00218 {
00219 public:
00235     virtual void acquireContext() = 0;
00236 
00244     virtual void releaseContext() = 0;
00245 
00249     virtual CUcontext getContext() = 0;
00250 
00257     virtual PxCudaMemoryManager *getMemoryManager() = 0;
00258 
00263     virtual class physx::PxGpuDispatcher *getGpuDispatcher() = 0;
00264 
00274     virtual bool contextIsValid() const = 0;
00275 
00276     /* Query CUDA context and device properties, without acquiring context */
00277 
00278     virtual bool supportsArchSM10() const = 0;  
00279     virtual bool supportsArchSM11() const = 0;  
00280     virtual bool supportsArchSM12() const = 0;  
00281     virtual bool supportsArchSM13() const = 0;  
00282     virtual bool supportsArchSM20() const = 0;  
00283     virtual bool supportsArchSM30() const = 0;  
00284     virtual bool supportsArchSM35() const = 0;  
00285     virtual bool supportsArchSM50() const = 0;  
00286     virtual bool supportsArchSM52() const = 0;  
00287     virtual bool supportsArchSM60() const = 0;  
00288     virtual bool isIntegrated() const = 0;      
00289     virtual bool canMapHostMemory() const = 0;  
00290     virtual int  getDriverVersion() const = 0;  
00291     virtual size_t getDeviceTotalMemBytes() const = 0; 
00292     virtual int getMultiprocessorCount() const = 0; 
00293     virtual unsigned int getClockRate() const = 0; 
00294     virtual int  getSharedMemPerBlock() const = 0; 
00295     virtual int  getSharedMemPerMultiprocessor() const = 0; 
00296     virtual unsigned int getMaxThreadsPerBlock() const = 0; 
00297     virtual const char *getDeviceName() const = 0; 
00298     virtual CUdevice getDevice() const = 0; 
00299     virtual PxCudaInteropMode::Enum getInteropMode() const = 0; 
00300 
00301     virtual void setUsingConcurrentStreams(bool) = 0; 
00302     virtual bool getUsingConcurrentStreams() const = 0; 
00303     /* End query methods that don't require context to be acquired */
00304 
00325     virtual bool registerResourceInCudaGL(CUgraphicsResource &resource, uint32_t buffer, PxCudaInteropRegisterFlags flags = PxCudaInteropRegisterFlags()) = 0;
00326 
00347     virtual bool registerResourceInCudaD3D(CUgraphicsResource &resource, void *resourcePointer, PxCudaInteropRegisterFlags flags = PxCudaInteropRegisterFlags()) = 0;
00348 
00356     virtual bool unregisterResourceInCuda(CUgraphicsResource resource) = 0;
00357 
00365     virtual int usingDedicatedGPU() const = 0;
00366 
00382     virtual void release() = 0;
00383 
00384 protected:
00385 
00389     virtual ~PxCudaContextManager() {}
00390 };
00391 
00395 class PxScopedCudaLock
00396 {
00397 public:
00401     PxScopedCudaLock(PxCudaContextManager& ctx) : mCtx(&ctx)
00402     {
00403         mCtx->acquireContext();
00404     }
00405 
00409     ~PxScopedCudaLock()
00410     {
00411         mCtx->releaseContext();
00412     }
00413 
00414 protected:
00415 
00419     PxCudaContextManager* mCtx;
00420 };
00421 
00422 } // end physx namespace
00423 
00424 #endif // PX_SUPPORT_GPU_PHYSX
00425 #endif // PXCUDACONTEXTMANAGER_PXCUDACONTEXTMANAGER_H


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