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STM8L15x Standard Peripherals Drivers
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stm8l15x_tim3.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8l15x_tim3.h 00004 * @author MCD Application Team 00005 * @version V1.5.0 00006 * @date 13-May-2011 00007 * @brief This file contains all the functions prototypes for the TIM3 firmware 00008 * library. 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 00013 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 00014 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 00015 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 00016 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 00017 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 00018 * 00019 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> 00020 ****************************************************************************** 00021 */ 00022 00023 /* Define to prevent recursive inclusion -------------------------------------*/ 00024 #ifndef __STM8L15x_TIM3_H 00025 #define __STM8L15x_TIM3_H 00026 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm8l15x.h" 00030 00031 /** @defgroup STM8L15x_StdPeriph_Driver 00032 * @{ 00033 */ 00034 00035 /** @defgroup TIM3 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 00041 /** @defgroup TIM3_Exported_Types 00042 * @{ 00043 */ 00044 00045 /** @defgroup TIM3_Forced_Action 00046 * @{ 00047 */ 00048 typedef enum 00049 { 00050 TIM3_ForcedAction_Active = ((uint8_t)0x50), /*!< Output Reference is forced low */ 00051 TIM3_ForcedAction_Inactive = ((uint8_t)0x40) /*!< Output Reference is forced high */ 00052 } 00053 TIM3_ForcedAction_TypeDef; 00054 00055 /** 00056 * @} 00057 */ 00058 00059 /** @defgroup TIM3_Prescaler 00060 * @{ 00061 */ 00062 typedef enum 00063 { 00064 TIM3_Prescaler_1 = ((uint8_t)0x00), /*!< Time base Prescaler = 1 (No effect)*/ 00065 TIM3_Prescaler_2 = ((uint8_t)0x01), /*!< Time base Prescaler = 2 */ 00066 TIM3_Prescaler_4 = ((uint8_t)0x02), /*!< Time base Prescaler = 4 */ 00067 TIM3_Prescaler_8 = ((uint8_t)0x03), /*!< Time base Prescaler = 8 */ 00068 TIM3_Prescaler_16 = ((uint8_t)0x04), /*!< Time base Prescaler = 16 */ 00069 TIM3_Prescaler_32 = ((uint8_t)0x05), /*!< Time base Prescaler = 32 */ 00070 TIM3_Prescaler_64 = ((uint8_t)0x06), /*!< Time base Prescaler = 64 */ 00071 TIM3_Prescaler_128 = ((uint8_t)0x07) /*!< Time base Prescaler = 128 */ 00072 }TIM3_Prescaler_TypeDef; 00073 00074 /** 00075 * @} 00076 */ 00077 00078 /** @defgroup TIM3_OCMode 00079 * @{ 00080 */ 00081 typedef enum 00082 { 00083 TIM3_OCMode_Timing = ((uint8_t)0x00), /*!< Timing (Frozen) Mode*/ 00084 TIM3_OCMode_Active = ((uint8_t)0x10), /*!< Active Mode*/ 00085 TIM3_OCMode_Inactive = ((uint8_t)0x20), /*!< Inactive Mode*/ 00086 TIM3_OCMode_Toggle = ((uint8_t)0x30), /*!< Toggle Mode*/ 00087 TIM3_OCMode_PWM1 = ((uint8_t)0x60), /*!< PWM Mode 1*/ 00088 TIM3_OCMode_PWM2 = ((uint8_t)0x70) /*!< PWM Mode 2*/ 00089 }TIM3_OCMode_TypeDef; 00090 00091 /** 00092 * @} 00093 */ 00094 00095 /** @defgroup TIM3_OnePulseMode 00096 * @{ 00097 */ 00098 typedef enum 00099 { 00100 TIM3_OPMode_Single = ((uint8_t)0x01), /*!< Single one Pulse mode (OPM Active) */ 00101 TIM3_OPMode_Repetitive = ((uint8_t)0x00) /*!< Repetitive Pulse mode (OPM inactive) */ 00102 }TIM3_OPMode_TypeDef; 00103 00104 /** 00105 * @} 00106 */ 00107 00108 /** @defgroup TIM3_Channel 00109 * @{ 00110 */ 00111 typedef enum 00112 { 00113 TIM3_Channel_1 = ((uint8_t)0x00), /*!< Channel 1*/ 00114 TIM3_Channel_2 = ((uint8_t)0x01) /*!< Channel 2*/ 00115 }TIM3_Channel_TypeDef; 00116 00117 /** 00118 * @} 00119 */ 00120 00121 /** @defgroup TIM3_CounterMode 00122 * @{ 00123 */ 00124 typedef enum 00125 { 00126 TIM3_CounterMode_Up = ((uint8_t)0x00), /*!< Counter Up Mode */ 00127 TIM3_CounterMode_Down = ((uint8_t)0x10), /*!< Counter Down Mode */ 00128 TIM3_CounterMode_CenterAligned1 = ((uint8_t)0x20), /*!< Counter Central aligned Mode 1 */ 00129 TIM3_CounterMode_CenterAligned2 = ((uint8_t)0x40), /*!< Counter Central aligned Mode 2 */ 00130 TIM3_CounterMode_CenterAligned3 = ((uint8_t)0x60) /*!< Counter Central aligned Mode 3 */ 00131 }TIM3_CounterMode_TypeDef; 00132 00133 /** 00134 * @} 00135 */ 00136 00137 /** @defgroup TIM3_Output_Compare_Polarity 00138 * @{ 00139 */ 00140 typedef enum 00141 { 00142 TIM3_OCPolarity_High = ((uint8_t)0x00), /*!< Output compare polarity = High */ 00143 TIM3_OCPolarity_Low = ((uint8_t)0x01) /*!< Output compare polarity = Low */ 00144 }TIM3_OCPolarity_TypeDef; 00145 00146 /** 00147 * @} 00148 */ 00149 00150 /** @defgroup TIM3_Output_State 00151 * @{ 00152 */ 00153 typedef enum 00154 { 00155 TIM3_OutputState_Disable = ((uint8_t)0x00), /*!< Output compare State disabled 00156 (channel output disabled) */ 00157 TIM3_OutputState_Enable = ((uint8_t)0x01) /*!< Output compare State enabled 00158 (channel output enabled) */ 00159 }TIM3_OutputState_TypeDef; 00160 00161 /** 00162 * @} 00163 */ 00164 00165 /** @defgroup TIM3_Break_State 00166 * @{ 00167 */ 00168 typedef enum 00169 { 00170 TIM3_BreakState_Disable = ((uint8_t)0x00), /*!< Break State disabled (break option disabled) */ 00171 TIM3_BreakState_Enable = ((uint8_t)0x10) /*!< Break State enabled (break option enabled) */ 00172 }TIM3_BreakState_TypeDef; 00173 00174 /** 00175 * @} 00176 */ 00177 00178 /** @defgroup TIM3_Break_Polarity 00179 * @{ 00180 */ 00181 typedef enum 00182 { 00183 TIM3_BreakPolarity_High = ((uint8_t)0x20), /*!< if Break, channel polarity = High */ 00184 TIM3_BreakPolarity_Low = ((uint8_t)0x00) /*!< if Break, channel polarity = Low */ 00185 }TIM3_BreakPolarity_TypeDef; 00186 00187 /** 00188 * @} 00189 */ 00190 00191 /** @defgroup TIM3_Automatic_Output 00192 * @{ 00193 */ 00194 typedef enum 00195 { 00196 TIM3_AutomaticOutput_Enable = ((uint8_t)0x40), /*!< Automatic Output option enabled */ 00197 TIM3_AutomaticOutput_Disable = ((uint8_t)0x00) /*!< Automatic Output option disabled */ 00198 }TIM3_AutomaticOutput_TypeDef; 00199 00200 /** 00201 * @} 00202 */ 00203 00204 /** @defgroup TIM3_Lock_Level 00205 * @{ 00206 */ 00207 typedef enum 00208 { 00209 TIM3_LockLevel_Off = ((uint8_t)0x00), /*!< Lock option disabled */ 00210 TIM3_LockLevel_1 = ((uint8_t)0x01), /*!< Select Lock Level 1 */ 00211 TIM3_LockLevel_2 = ((uint8_t)0x02), /*!< Select Lock Level 2 */ 00212 TIM3_LockLevel_3 = ((uint8_t)0x03) /*!< Select Lock Level 3 */ 00213 }TIM3_LockLevel_TypeDef; 00214 00215 /** 00216 * @} 00217 */ 00218 00219 /** @defgroup TIM3_OSSI_State 00220 * @{ 00221 */ 00222 typedef enum 00223 { 00224 TIM3_OSSIState_Enable = ((uint8_t)0x04), /*!< Off-State Selection for Idle mode enabled */ 00225 TIM3_OSSIState_Disable = ((uint8_t)0x00) /*!< Off-State Selection for Idle mode disabled */ 00226 }TIM3_OSSIState_TypeDef; 00227 00228 /** 00229 * @} 00230 */ 00231 00232 /** @defgroup TIM3_Output_Compare_Idle_state 00233 * @{ 00234 */ 00235 typedef enum 00236 { 00237 TIM3_OCIdleState_Reset = ((uint8_t)0x00), /*!< Output Compare Idle state = Reset */ 00238 TIM3_OCIdleState_Set = ((uint8_t)0x01) /*!< Output Compare Idle state = Set */ 00239 }TIM3_OCIdleState_TypeDef; 00240 00241 /** 00242 * @} 00243 */ 00244 00245 /** @defgroup TIM3_Input_Capture_Polarity 00246 * @{ 00247 */ 00248 typedef enum 00249 { 00250 TIM3_ICPolarity_Rising = ((uint8_t)0x00), /*!< Input Capture on Rising Edge*/ 00251 TIM3_ICPolarity_Falling = ((uint8_t)0x01) /*!< Input Capture on Falling Edge*/ 00252 }TIM3_ICPolarity_TypeDef; 00253 00254 /** 00255 * @} 00256 */ 00257 00258 /** @defgroup TIM3_Input_Capture_Selection 00259 * @{ 00260 */ 00261 typedef enum 00262 { 00263 TIM3_ICSelection_DirectTI = ((uint8_t)0x01), /*!< Input Capture mapped on the direct input*/ 00264 TIM3_ICSelection_IndirectTI = ((uint8_t)0x02), /*!< Input Capture mapped on the indirect input*/ 00265 TIM3_ICSelection_TRGI = ((uint8_t)0x03) /*!< Input Capture mapped on the Trigger Input*/ 00266 }TIM3_ICSelection_TypeDef; 00267 00268 /** 00269 * @} 00270 */ 00271 00272 /** @defgroup TIM3_Input_Capture_Prescaler 00273 * @{ 00274 */ 00275 typedef enum 00276 { 00277 TIM3_ICPSC_DIV1 = ((uint8_t)0x00), /*!< Input Capture Prescaler = 1 (one capture every 1 event) */ 00278 TIM3_ICPSC_DIV2 = ((uint8_t)0x04), /*!< Input Capture Prescaler = 2 (one capture every 2 events) */ 00279 TIM3_ICPSC_DIV4 = ((uint8_t)0x08), /*!< Input Capture Prescaler = 4 (one capture every 4 events) */ 00280 TIM3_ICPSC_DIV8 = ((uint8_t)0x0C) /*!< Input Capture Prescaler = 8 (one capture every 8 events) */ 00281 }TIM3_ICPSC_TypeDef; 00282 00283 /** 00284 * @} 00285 */ 00286 00287 /** @defgroup TIM3_Interrupts 00288 * @{ 00289 */ 00290 typedef enum 00291 { 00292 TIM3_IT_Update = ((uint8_t)0x01), /*!< Update Interrupt*/ 00293 TIM3_IT_CC1 = ((uint8_t)0x02), /*!< Capture Compare Channel1 Interrupt*/ 00294 TIM3_IT_CC2 = ((uint8_t)0x04), /*!< Capture Compare Channel2 Interrupt*/ 00295 TIM3_IT_Trigger = ((uint8_t)0x40), /*!< Trigger Interrupt*/ 00296 TIM3_IT_Break = ((uint8_t)0x80) /*!< Break Interrupt*/ 00297 }TIM3_IT_TypeDef; 00298 00299 /** 00300 * @} 00301 */ 00302 00303 /** @defgroup TIM3_External_Trigger_Prescaler 00304 * @{ 00305 */ 00306 typedef enum 00307 { 00308 TIM3_ExtTRGPSC_OFF = ((uint8_t)0x00), /*!< No External Trigger prescaler */ 00309 TIM3_ExtTRGPSC_DIV2 = ((uint8_t)0x10), /*!< External Trigger prescaler = 2 (ETRP frequency divided by 2) */ 00310 TIM3_ExtTRGPSC_DIV4 = ((uint8_t)0x20), /*!< External Trigger prescaler = 4 (ETRP frequency divided by 4) */ 00311 TIM3_ExtTRGPSC_DIV8 = ((uint8_t)0x30) /*!< External Trigger prescaler = 8 (ETRP frequency divided by 8) */ 00312 }TIM3_ExtTRGPSC_TypeDef; 00313 00314 /** 00315 * @} 00316 */ 00317 00318 /** @defgroup TIM3_Internal_Trigger_Selection 00319 * @{ 00320 */ 00321 typedef enum 00322 { 00323 TIM3_TRGSelection_TIM4 = ((uint8_t)0x00), /*!< TRIG Input source = TIM TRIG Output */ 00324 TIM3_TRGSelection_TIM1 = ((uint8_t)0x10), /*!< TRIG Input source = TIM TRIG Output */ 00325 TIM3_TRGSelection_TIM5 = ((uint8_t)0x20), /*!< TRIG Input source = TIM TRIG Output */ 00326 TIM3_TRGSelection_TIM2 = ((uint8_t)0x30), /*!< TRIG Input source = TIM TRIG Output */ 00327 TIM3_TRGSelection_TI1F_ED = ((uint8_t)0x40), /*!< TRIG Input source = TI1F_ED (TI1 Edge Detector) */ 00328 TIM3_TRGSelection_TI1FP1 = ((uint8_t)0x50), /*!< TRIG Input source = TI1FP1 (Filtred Timer Input 1) */ 00329 TIM3_TRGSelection_TI2FP2 = ((uint8_t)0x60), /*!< TRIG Input source = TI2FP2 (Filtred Timer Input 2) */ 00330 TIM3_TRGSelection_ETRF = ((uint8_t)0x70) /*!< TRIG Input source = ETRF (External Trigger Input ) */ 00331 }TIM3_TRGSelection_TypeDef; 00332 00333 /** 00334 * @} 00335 */ 00336 00337 /** @defgroup TIM3_TI_External_Clock_Source 00338 * @{ 00339 */ 00340 typedef enum 00341 { 00342 TIM3_TIxExternalCLK1Source_TI1ED = ((uint8_t)0x40), /*!< External Clock mode 1 source = TI1ED */ 00343 TIM3_TIxExternalCLK1Source_TI1 = ((uint8_t)0x50), /*!< External Clock mode 1 source = TI1 */ 00344 TIM3_TIxExternalCLK1Source_TI2 = ((uint8_t)0x60) /*!< External Clock mode 1 source = TI2 */ 00345 }TIM3_TIxExternalCLK1Source_TypeDef; 00346 00347 /** 00348 * @} 00349 */ 00350 00351 /** @defgroup TIM3_External_Trigger_Polarity 00352 * @{ 00353 */ 00354 typedef enum 00355 { 00356 TIM3_ExtTRGPolarity_Inverted = ((uint8_t)0x80), /*!< External Trigger Polarity = inverted */ 00357 TIM3_ExtTRGPolarity_NonInverted = ((uint8_t)0x00) /*!< External Trigger Polarity = non inverted */ 00358 }TIM3_ExtTRGPolarity_TypeDef; 00359 00360 /** 00361 * @} 00362 */ 00363 00364 /** @defgroup TIM3_Prescaler_Reload_Mode 00365 * @{ 00366 */ 00367 typedef enum 00368 { 00369 TIM3_PSCReloadMode_Update = ((uint8_t)0x00), /*!< Prescaler value is reloaded at every update*/ 00370 TIM3_PSCReloadMode_Immediate = ((uint8_t)0x01) /*!< Prescaler value is reloaded immediatly*/ 00371 }TIM3_PSCReloadMode_TypeDef; 00372 00373 /** 00374 * @} 00375 */ 00376 00377 /** @defgroup TIM3_Encoder_Mode 00378 * @{ 00379 */ 00380 typedef enum 00381 { 00382 TIM3_EncoderMode_TI1 = ((uint8_t)0x01), /*!< Encoder mode 1*/ 00383 TIM3_EncoderMode_TI2 = ((uint8_t)0x02), /*!< Encoder mode 2*/ 00384 TIM3_EncoderMode_TI12 = ((uint8_t)0x03) /*!< Encoder mode 3*/ 00385 }TIM3_EncoderMode_TypeDef; 00386 00387 /** 00388 * @} 00389 */ 00390 00391 /** @defgroup TIM3_Event_Source 00392 * @{ 00393 */ 00394 typedef enum 00395 { 00396 TIM3_EventSource_Update = ((uint8_t)0x01), /*!< Update Event*/ 00397 TIM3_EventSource_CC1 = ((uint8_t)0x02), /*!< Capture Compare Channel1 Event*/ 00398 TIM3_EventSource_CC2 = ((uint8_t)0x04), /*!< Capture Compare Channel2 Event*/ 00399 TIM3_EventSource_Trigger = ((uint8_t)0x40), /*!< Trigger Event*/ 00400 TIM3_EventSource_Break = ((uint8_t)0x80) /*!< Break Event*/ 00401 }TIM3_EventSource_TypeDef; 00402 00403 /** 00404 * @} 00405 */ 00406 00407 /** @defgroup TIM3_Update_Source 00408 * @{ 00409 */ 00410 typedef enum 00411 { 00412 TIM3_UpdateSource_Global = ((uint8_t)0x00), /*!< Global Update request source */ 00413 TIM3_UpdateSource_Regular = ((uint8_t)0x01) /*!< Regular Update request source */ 00414 }TIM3_UpdateSource_TypeDef; 00415 00416 /** 00417 * @} 00418 */ 00419 00420 /** @defgroup TIM3_Trigger_Output_Source 00421 * @{ 00422 */ 00423 typedef enum 00424 { 00425 TIM3_TRGOSource_Reset = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/ 00426 TIM3_TRGOSource_Enable = ((uint8_t)0x10), /*!< Trigger Output source = TIM3 is enabled*/ 00427 TIM3_TRGOSource_Update = ((uint8_t)0x20), /*!< Trigger Output source = Update event*/ 00428 TIM3_TRGOSource_OC1 = ((uint8_t)0x30), /*!< Trigger Output source = output compare channel1 */ 00429 TIM3_TRGOSource_OC1REF = ((uint8_t)0x40), /*!< Trigger Output source = output compare channel 1 reference */ 00430 TIM3_TRGOSource_OC2REF = ((uint8_t)0x50) /*!< Trigger Output source = output compare channel 2 reference */ 00431 }TIM3_TRGOSource_TypeDef; 00432 00433 /** 00434 * @} 00435 */ 00436 00437 /** @defgroup TIM3_Slave_Mode 00438 * @{ 00439 */ 00440 typedef enum 00441 { 00442 TIM3_SlaveMode_Reset = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/ 00443 TIM3_SlaveMode_Gated = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/ 00444 TIM3_SlaveMode_Trigger = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/ 00445 TIM3_SlaveMode_External1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/ 00446 }TIM3_SlaveMode_TypeDef; 00447 00448 /** 00449 * @} 00450 */ 00451 00452 /** @defgroup TIM3_Flags 00453 * @{ 00454 */ 00455 typedef enum 00456 { 00457 TIM3_FLAG_Update = ((uint16_t)0x0001), /*!< Update Flag */ 00458 TIM3_FLAG_CC1 = ((uint16_t)0x0002), /*!< Capture compare 1 Flag */ 00459 TIM3_FLAG_CC2 = ((uint16_t)0x0004), /*!< Capture compare 2 Flag */ 00460 TIM3_FLAG_Trigger = ((uint16_t)0x0040), /*!< Trigger Flag */ 00461 TIM3_FLAG_Break = ((uint16_t)0x0080), /*!< Break Flag */ 00462 TIM3_FLAG_CC1OF = ((uint16_t)0x0200), /*!< Capture compare 1 over capture Flag */ 00463 TIM3_FLAG_CC2OF = ((uint16_t)0x0400) /*!< Capture compare 2 over capture Flag */ 00464 }TIM3_FLAG_TypeDef; 00465 00466 /** 00467 * @} 00468 */ 00469 00470 /** @defgroup TIM3_DMA_Source_Requests 00471 * @{ 00472 */ 00473 typedef enum 00474 { 00475 TIM3_DMASource_Update = ((uint8_t)0x01), /*!< TIM3 DMA Update Request*/ 00476 TIM3_DMASource_CC1 = ((uint8_t)0x02), 00477 TIM3_DMASource_CC2 = ((uint8_t)0x04) 00478 }TIM3_DMASource_TypeDef; 00479 00480 /** 00481 * @} 00482 */ 00483 00484 /** 00485 * @} 00486 */ 00487 00488 /* Exported constants --------------------------------------------------------*/ 00489 /* Exported macros -----------------------------------------------------------*/ 00490 00491 /** @defgroup TIM3_Exported_Macros 00492 * @{ 00493 */ 00494 00495 /** 00496 * @brief Macro used by the assert function to check the different functions parameters. 00497 */ 00498 00499 /** 00500 * @brief Macro TIM3 Forced Action 00501 */ 00502 #define IS_TIM3_FORCED_ACTION(ACTION) \ 00503 (((ACTION) == TIM3_ForcedAction_Active) || \ 00504 ((ACTION) == TIM3_ForcedAction_Inactive)) 00505 00506 /** 00507 * @brief Macro TIM3 Prescaler 00508 */ 00509 #define IS_TIM3_PRESCALER(PRESCALER) \ 00510 (((PRESCALER) == TIM3_Prescaler_1) || \ 00511 ((PRESCALER) == TIM3_Prescaler_2) || \ 00512 ((PRESCALER) == TIM3_Prescaler_4) || \ 00513 ((PRESCALER) == TIM3_Prescaler_8) || \ 00514 ((PRESCALER) == TIM3_Prescaler_16) || \ 00515 ((PRESCALER) == TIM3_Prescaler_32) || \ 00516 ((PRESCALER) == TIM3_Prescaler_64) || \ 00517 ((PRESCALER) == TIM3_Prescaler_128)) 00518 00519 /** 00520 * @brief Macro TIM3 Output Compare and PWM modes 00521 */ 00522 #define IS_TIM3_OC_MODE(MODE) \ 00523 (((MODE) == TIM3_OCMode_Timing) || \ 00524 ((MODE) == TIM3_OCMode_Active) || \ 00525 ((MODE) == TIM3_OCMode_Inactive) || \ 00526 ((MODE) == TIM3_OCMode_Toggle) || \ 00527 ((MODE) == TIM3_OCMode_PWM1) || \ 00528 ((MODE) == TIM3_OCMode_PWM2)) 00529 00530 #define IS_TIM3_OCM(MODE) \ 00531 (((MODE) == TIM3_OCMode_Timing) || \ 00532 ((MODE) == TIM3_OCMode_Active) || \ 00533 ((MODE) == TIM3_OCMode_Inactive) || \ 00534 ((MODE) == TIM3_OCMode_Toggle) || \ 00535 ((MODE) == TIM3_OCMode_PWM1) || \ 00536 ((MODE) == TIM3_OCMode_PWM2) || \ 00537 ((MODE) == (uint8_t)TIM3_ForcedAction_Active) || \ 00538 ((MODE) == (uint8_t)TIM3_ForcedAction_Inactive)) 00539 /** 00540 * @brief Macro TIM3 One Pulse Mode 00541 */ 00542 #define IS_TIM3_OPM_MODE(MODE) \ 00543 (((MODE) == TIM3_OPMode_Single) || \ 00544 ((MODE) == TIM3_OPMode_Repetitive)) 00545 00546 /** 00547 * @brief Macro TIM3 Channel 00548 */ 00549 #define IS_TIM3_CHANNEL(CHANNEL) \ 00550 (((CHANNEL) == TIM3_Channel_1) || \ 00551 ((CHANNEL) == TIM3_Channel_2) ) 00552 00553 /** 00554 * @brief Macro TIM3 Counter Mode 00555 */ 00556 #define IS_TIM3_COUNTER_MODE(MODE) \ 00557 (((MODE) == TIM3_CounterMode_Up) || \ 00558 ((MODE) == TIM3_CounterMode_Down) || \ 00559 ((MODE) == TIM3_CounterMode_CenterAligned1) || \ 00560 ((MODE) == TIM3_CounterMode_CenterAligned2) || \ 00561 ((MODE) == TIM3_CounterMode_CenterAligned3)) 00562 00563 /** 00564 * @brief Macro TIM3 Output Compare Polarity 00565 */ 00566 #define IS_TIM3_OC_POLARITY(POLARITY) \ 00567 (((POLARITY) == TIM3_OCPolarity_High) || \ 00568 ((POLARITY) == TIM3_OCPolarity_Low)) 00569 00570 /** 00571 * @brief Macro TIM3 Output Compare states 00572 */ 00573 #define IS_TIM3_OUTPUT_STATE(STATE) \ 00574 (((STATE) == TIM3_OutputState_Disable) || \ 00575 ((STATE) == TIM3_OutputState_Enable)) 00576 00577 00578 /** 00579 * @brief Macro Break Input enable/disable 00580 */ 00581 #define IS_TIM3_BREAK_STATE(STATE) \ 00582 (((STATE) == TIM3_BreakState_Enable) || \ 00583 ((STATE) == TIM3_BreakState_Disable)) 00584 00585 /** 00586 * @brief Macro Break Polarity 00587 */ 00588 #define IS_TIM3_BREAK_POLARITY(POLARITY) \ 00589 (((POLARITY) == TIM3_BreakPolarity_Low) || \ 00590 ((POLARITY) == TIM3_BreakPolarity_High)) 00591 00592 /** 00593 * @brief Macro TIM3 AOE Bit Set/Reset 00594 */ 00595 #define IS_TIM3_AUTOMATIC_OUTPUT_STATE(STATE) \ 00596 (((STATE) == TIM3_AutomaticOutput_Enable) || \ 00597 ((STATE) == TIM3_AutomaticOutput_Disable)) 00598 00599 /** 00600 * @brief Macro Lock levels 00601 */ 00602 #define IS_TIM3_LOCK_LEVEL(LEVEL) \ 00603 (((LEVEL) == TIM3_LockLevel_Off) || \ 00604 ((LEVEL) == TIM3_LockLevel_1) || \ 00605 ((LEVEL) == TIM3_LockLevel_2) || \ 00606 ((LEVEL) == TIM3_LockLevel_3)) 00607 00608 /** 00609 * @brief Macro OSSI: Off-State Selection for Idle mode states 00610 */ 00611 #define IS_TIM3_OSSI_STATE(STATE) \ 00612 (((STATE) == TIM3_OSSIState_Enable) || \ 00613 ((STATE) == TIM3_OSSIState_Disable)) 00614 00615 /** 00616 * @brief Macro TIM3 OC IDLE STATE 00617 */ 00618 #define IS_TIM3_OCIDLE_STATE(STATE) \ 00619 (((STATE) == TIM3_OCIdleState_Set) || \ 00620 ((STATE) == TIM3_OCIdleState_Reset)) 00621 00622 /** 00623 * @brief Macro TIM3 IC POLARITY 00624 */ 00625 00626 #define IS_TIM3_IC_POLARITY(POLARITY) \ 00627 (((POLARITY) == TIM3_ICPolarity_Rising) || \ 00628 ((POLARITY) == TIM3_ICPolarity_Falling)) 00629 00630 /** 00631 * @brief Macro TIM3 IC SELECTION 00632 */ 00633 #define IS_TIM3_IC_SELECTION(SELECTION) \ 00634 (((SELECTION) == TIM3_ICSelection_DirectTI) || \ 00635 ((SELECTION) == TIM3_ICSelection_IndirectTI) || \ 00636 ((SELECTION) == TIM3_ICSelection_TRGI)) 00637 00638 00639 /** 00640 * @brief Macro TIM3 IC PRESCALER 00641 */ 00642 #define IS_TIM3_IC_PRESCALER(PRESCALER) \ 00643 (((PRESCALER) == TIM3_ICPSC_DIV1) || \ 00644 ((PRESCALER) == TIM3_ICPSC_DIV2) || \ 00645 ((PRESCALER) == TIM3_ICPSC_DIV4) || \ 00646 ((PRESCALER) == TIM3_ICPSC_DIV8)) 00647 00648 /** 00649 * @brief Macro TIM3 Input Capture Filter Value 00650 */ 00651 #define IS_TIM3_IC_FILTER(ICFILTER) \ 00652 ((ICFILTER) <= 0x0F) 00653 00654 /** 00655 * @brief Macro TIM3 Interrupts 00656 */ 00657 #define IS_TIM3_IT(IT) \ 00658 ((IT) != 0x00) 00659 00660 #define IS_TIM3_GET_IT(IT) \ 00661 (((IT) == TIM3_IT_Update) || \ 00662 ((IT) == TIM3_IT_CC1) || \ 00663 ((IT) == TIM3_IT_CC2) || \ 00664 ((IT) == TIM3_IT_Trigger) || \ 00665 ((IT) == TIM3_IT_Break)) 00666 00667 /** 00668 * @brief Macro TIM3 external trigger prescaler 00669 */ 00670 #define IS_TIM3_EXT_PRESCALER(PRESCALER) \ 00671 (((PRESCALER) == TIM3_ExtTRGPSC_OFF) || \ 00672 ((PRESCALER) == TIM3_ExtTRGPSC_DIV2) || \ 00673 ((PRESCALER) == TIM3_ExtTRGPSC_DIV4) || \ 00674 ((PRESCALER) == TIM3_ExtTRGPSC_DIV8)) 00675 00676 /** 00677 * @brief Macro TIM3 Trigger Selection 00678 */ 00679 #define IS_TIM3_TRIGGER_SELECTION(SELECTION) \ 00680 (((SELECTION) == TIM3_TRGSelection_TI1F_ED) || \ 00681 ((SELECTION) == TIM3_TRGSelection_TI1FP1) || \ 00682 ((SELECTION) == TIM3_TRGSelection_TI2FP2) || \ 00683 ((SELECTION) == TIM3_TRGSelection_TIM4) || \ 00684 ((SELECTION) == TIM3_TRGSelection_TIM1) || \ 00685 ((SELECTION) == TIM3_TRGSelection_TIM5) || \ 00686 ((SELECTION) == TIM3_TRGSelection_TIM2) || \ 00687 ((SELECTION) == TIM3_TRGSelection_ETRF)) 00688 00689 00690 #define IS_TIM3_TIX_TRIGGER_SELECTION(SELECTION) \ 00691 (((SELECTION) == TIM3_TRGSelection_TI1F_ED) || \ 00692 ((SELECTION) == TIM3_TRGSelection_TI1FP1) || \ 00693 ((SELECTION) == TIM3_TRGSelection_TI2FP2)) 00694 00695 /** 00696 * @brief Macro TIM3 TIx external Clock Selection 00697 */ 00698 #define IS_TIM3_TIXCLK_SOURCE(SOURCE) \ 00699 (((SOURCE) == TIM3_TIxExternalCLK1Source_TI1ED) || \ 00700 ((SOURCE) == TIM3_TIxExternalCLK1Source_TI2) || \ 00701 ((SOURCE) == TIM3_TIxExternalCLK1Source_TI1)) 00702 00703 /** 00704 * @brief Macro TIM3 Trigger Polarity 00705 */ 00706 #define IS_TIM3_EXT_POLARITY(POLARITY) \ 00707 (((POLARITY) == TIM3_ExtTRGPolarity_Inverted) || \ 00708 ((POLARITY) == TIM3_ExtTRGPolarity_NonInverted)) 00709 00710 /** 00711 * @brief Macro TIM3 External Trigger Filter 00712 */ 00713 #define IS_TIM3_EXT_FILTER(EXTFILTER) \ 00714 ((EXTFILTER) <= 0x0F) 00715 00716 /** 00717 * @brief Macro TIM3 Prescaler Reload 00718 */ 00719 #define IS_TIM3_PRESCALER_RELOAD(RELOAD) \ 00720 (((RELOAD) == TIM3_PSCReloadMode_Update) || \ 00721 ((RELOAD) == TIM3_PSCReloadMode_Immediate)) 00722 00723 /** 00724 * @brief Macro TIM3 encoder mode 00725 */ 00726 #define IS_TIM3_ENCODER_MODE(MODE) \ 00727 (((MODE) == TIM3_EncoderMode_TI1) || \ 00728 ((MODE) == TIM3_EncoderMode_TI2) || \ 00729 ((MODE) == TIM3_EncoderMode_TI12)) 00730 00731 /** 00732 * @brief Macro TIM3 event source 00733 */ 00734 #define IS_TIM3_EVENT_SOURCE(SOURCE) \ 00735 ((((SOURCE) & (uint8_t)0x18) == 0x00) && ((SOURCE) != 0x00)) 00736 00737 /** 00738 * @brief Macro TIM3 update source 00739 */ 00740 #define IS_TIM3_UPDATE_SOURCE(SOURCE) \ 00741 (((SOURCE) == TIM3_UpdateSource_Global) || \ 00742 ((SOURCE) == TIM3_UpdateSource_Regular)) 00743 00744 /** 00745 * @brief Macro TIM3 TRGO source 00746 */ 00747 #define IS_TIM3_TRGO_SOURCE(SOURCE) \ 00748 (((SOURCE) == TIM3_TRGOSource_Reset) || \ 00749 ((SOURCE) == TIM3_TRGOSource_Enable) || \ 00750 ((SOURCE) == TIM3_TRGOSource_Update) || \ 00751 ((SOURCE) == TIM3_TRGOSource_OC1) || \ 00752 ((SOURCE) == TIM3_TRGOSource_OC1REF) || \ 00753 ((SOURCE) == TIM3_TRGOSource_OC2REF)) 00754 /** 00755 * @brief Macro TIM3 Slave mode 00756 */ 00757 #define IS_TIM3_SLAVE_MODE(MODE) \ 00758 (((MODE) == TIM3_SlaveMode_Reset) || \ 00759 ((MODE) == TIM3_SlaveMode_Gated) || \ 00760 ((MODE) == TIM3_SlaveMode_Trigger) || \ 00761 ((MODE) == TIM3_SlaveMode_External1)) 00762 /** 00763 * @brief Macro TIM3 Flags 00764 */ 00765 #define IS_TIM3_GET_FLAG(FLAG) \ 00766 (((FLAG) == TIM3_FLAG_Update) || \ 00767 ((FLAG) == TIM3_FLAG_CC1) || \ 00768 ((FLAG) == TIM3_FLAG_CC2) || \ 00769 ((FLAG) == TIM3_FLAG_Trigger) || \ 00770 ((FLAG) == TIM3_FLAG_Break) || \ 00771 ((FLAG) == TIM3_FLAG_CC1OF) || \ 00772 ((FLAG) == TIM3_FLAG_CC2OF)) 00773 00774 #define IS_TIM3_CLEAR_FLAG(FLAG) \ 00775 ((((FLAG) & (uint16_t)0xE100) == 0x0000) && ((FLAG) != 0x0000)) 00776 00777 /** 00778 * @brief Macro TIM3 DMA sources 00779 */ 00780 00781 #define IS_TIM3_DMA_SOURCE(SOURCE) \ 00782 (((SOURCE) == TIM3_DMASource_Update) || \ 00783 ((SOURCE) == TIM3_DMASource_CC1) || \ 00784 ((SOURCE) == TIM3_DMASource_CC2)) 00785 00786 /** 00787 * @} 00788 */ 00789 00790 /* Exported functions ------------------------------------------------------- */ 00791 /* TimeBase management ********************************************************/ 00792 void TIM3_DeInit(void); 00793 void TIM3_TimeBaseInit(TIM3_Prescaler_TypeDef TIM3_Prescaler, 00794 TIM3_CounterMode_TypeDef TIM3_CounterMode, 00795 uint16_t TIM3_Period); 00796 void TIM3_PrescalerConfig(TIM3_Prescaler_TypeDef Prescaler, 00797 TIM3_PSCReloadMode_TypeDef TIM3_PSCReloadMode); 00798 void TIM3_CounterModeConfig(TIM3_CounterMode_TypeDef TIM3_CounterMode); 00799 void TIM3_SetCounter(uint16_t Counter); 00800 void TIM3_SetAutoreload(uint16_t Autoreload); 00801 uint16_t TIM3_GetCounter(void); 00802 TIM3_Prescaler_TypeDef TIM3_GetPrescaler(void); 00803 void TIM3_UpdateDisableConfig(FunctionalState NewState); 00804 void TIM3_UpdateRequestConfig(TIM3_UpdateSource_TypeDef TIM3_UpdateSource); 00805 void TIM3_ARRPreloadConfig(FunctionalState NewState); 00806 void TIM3_SelectOnePulseMode(TIM3_OPMode_TypeDef TIM3_OPMode); 00807 void TIM3_Cmd(FunctionalState NewState); 00808 00809 /* Output Compare management **************************************************/ 00810 void TIM3_OC1Init(TIM3_OCMode_TypeDef TIM3_OCMode, 00811 TIM3_OutputState_TypeDef TIM3_OutputState, 00812 uint16_t TIM3_Pulse, 00813 TIM3_OCPolarity_TypeDef TIM3_OCPolarity, 00814 TIM3_OCIdleState_TypeDef TIM3_OCIdleState); 00815 void TIM3_OC2Init(TIM3_OCMode_TypeDef TIM3_OCMode, 00816 TIM3_OutputState_TypeDef TIM3_OutputState, 00817 uint16_t TIM3_Pulse, 00818 TIM3_OCPolarity_TypeDef TIM3_OCPolarity, 00819 TIM3_OCIdleState_TypeDef TIM3_OCIdleState); 00820 void TIM3_BKRConfig(TIM3_OSSIState_TypeDef TIM3_OSSIState, 00821 TIM3_LockLevel_TypeDef TIM3_LockLevel, 00822 TIM3_BreakState_TypeDef TIM3_BreakState, 00823 TIM3_BreakPolarity_TypeDef TIM3_BreakPolarity, 00824 TIM3_AutomaticOutput_TypeDef TIM3_AutomaticOutput); 00825 void TIM3_CtrlPWMOutputs(FunctionalState NewState); 00826 void TIM3_SelectOCxM(TIM3_Channel_TypeDef TIM3_Channel, 00827 TIM3_OCMode_TypeDef TIM3_OCMode); 00828 void TIM3_SetCompare1(uint16_t Compare); 00829 void TIM3_SetCompare2(uint16_t Compare); 00830 void TIM3_ForcedOC1Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); 00831 void TIM3_ForcedOC2Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); 00832 void TIM3_OC1PreloadConfig(FunctionalState NewState); 00833 void TIM3_OC2PreloadConfig(FunctionalState NewState); 00834 void TIM3_OC1FastConfig(FunctionalState NewState); 00835 void TIM3_OC2FastConfig(FunctionalState NewState); 00836 void TIM3_OC1PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 00837 void TIM3_OC2PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); 00838 void TIM3_CCxCmd(TIM3_Channel_TypeDef TIM3_Channel, FunctionalState NewState); 00839 00840 /* Input Capture management ***************************************************/ 00841 void TIM3_ICInit(TIM3_Channel_TypeDef TIM3_Channel, 00842 TIM3_ICPolarity_TypeDef TIM3_ICPolarity, 00843 TIM3_ICSelection_TypeDef TIM3_ICSelection, 00844 TIM3_ICPSC_TypeDef TIM3_ICPrescaler, 00845 uint8_t TIM3_ICFilter); 00846 void TIM3_PWMIConfig(TIM3_Channel_TypeDef TIM3_Channel, 00847 TIM3_ICPolarity_TypeDef TIM3_ICPolarity, 00848 TIM3_ICSelection_TypeDef TIM3_ICSelection, 00849 TIM3_ICPSC_TypeDef TIM3_ICPrescaler, 00850 uint8_t TIM3_ICFilter); 00851 uint16_t TIM3_GetCapture1(void); 00852 uint16_t TIM3_GetCapture2(void); 00853 void TIM3_SetIC1Prescaler(TIM3_ICPSC_TypeDef TIM3_IC1Prescaler); 00854 void TIM3_SetIC2Prescaler(TIM3_ICPSC_TypeDef TIM3_IC2Prescaler); 00855 00856 /* Interrupts, DMA and flags management ***************************************/ 00857 void TIM3_ITConfig(TIM3_IT_TypeDef TIM3_IT, FunctionalState NewState); 00858 void TIM3_GenerateEvent(TIM3_EventSource_TypeDef TIM3_EventSource); 00859 FlagStatus TIM3_GetFlagStatus(TIM3_FLAG_TypeDef TIM3_FLAG); 00860 void TIM3_ClearFlag(TIM3_FLAG_TypeDef TIM3_FLAG); 00861 ITStatus TIM3_GetITStatus(TIM3_IT_TypeDef TIM3_IT); 00862 void TIM3_ClearITPendingBit(TIM3_IT_TypeDef TIM3_IT); 00863 void TIM3_DMACmd(TIM3_DMASource_TypeDef TIM3_DMASource, FunctionalState NewState); 00864 void TIM3_SelectCCDMA(FunctionalState NewState); 00865 00866 /* Clocks management **********************************************************/ 00867 void TIM3_InternalClockConfig(void); 00868 void TIM3_TIxExternalClockConfig(TIM3_TIxExternalCLK1Source_TypeDef TIM3_TIxExternalCLKSource, 00869 TIM3_ICPolarity_TypeDef TIM3_ICPolarity, 00870 uint8_t ICFilter); 00871 void TIM3_ETRClockMode1Config(TIM3_ExtTRGPSC_TypeDef TIM3_ExtTRGPrescaler, 00872 TIM3_ExtTRGPolarity_TypeDef TIM3_ExtTRGPolarity, 00873 uint8_t ExtTRGFilter); 00874 void TIM3_ETRClockMode2Config(TIM3_ExtTRGPSC_TypeDef TIM3_ExtTRGPrescaler, 00875 TIM3_ExtTRGPolarity_TypeDef TIM3_ExtTRGPolarity, 00876 uint8_t ExtTRGFilter); 00877 00878 /* Synchronization management *************************************************/ 00879 void TIM3_SelectInputTrigger(TIM3_TRGSelection_TypeDef TIM3_InputTriggerSource); 00880 void TIM3_SelectOutputTrigger(TIM3_TRGOSource_TypeDef TIM3_TRGOSource); 00881 void TIM3_SelectSlaveMode(TIM3_SlaveMode_TypeDef TIM3_SlaveMode); 00882 void TIM3_SelectMasterSlaveMode(FunctionalState NewState); 00883 void TIM3_ETRConfig(TIM3_ExtTRGPSC_TypeDef TIM3_ExtTRGPrescaler, 00884 TIM3_ExtTRGPolarity_TypeDef TIM3_ExtTRGPolarity, 00885 uint8_t ExtTRGFilter); 00886 00887 /* Specific interface management **********************************************/ 00888 void TIM3_EncoderInterfaceConfig(TIM3_EncoderMode_TypeDef TIM3_EncoderMode, 00889 TIM3_ICPolarity_TypeDef TIM3_IC1Polarity, 00890 TIM3_ICPolarity_TypeDef TIM3_IC2Polarity); 00891 void TIM3_SelectHallSensor(FunctionalState NewState); 00892 00893 #endif /* __STM8L15x_TIM3_H */ 00894 00895 /** 00896 * @} 00897 */ 00898 00899 /** 00900 * @} 00901 */ 00902 00903 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/