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STM8L15x Standard Peripherals Drivers
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stm8l15x_tim2.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8l15x_tim2.h 00004 * @author MCD Application Team 00005 * @version V1.5.0 00006 * @date 13-May-2011 00007 * @brief This file contains all the functions prototypes for the TIM2 firmware 00008 * library. 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 00013 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 00014 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 00015 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 00016 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 00017 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 00018 * 00019 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> 00020 ****************************************************************************** 00021 */ 00022 00023 /* Define to prevent recursive inclusion -------------------------------------*/ 00024 #ifndef __STM8L15x_TIM2_H 00025 #define __STM8L15x_TIM2_H 00026 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm8l15x.h" 00030 00031 /** @addtogroup STM8L15x_StdPeriph_Driver 00032 * @{ 00033 */ 00034 00035 /** @addtogroup TIM2 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 00041 /** @defgroup TIM2_Exported_Types 00042 * @{ 00043 */ 00044 00045 /** @defgroup TIM2_Forced_Action 00046 * @{ 00047 */ 00048 typedef enum 00049 { 00050 TIM2_ForcedAction_Active = ((uint8_t)0x50), /*!< Output Reference is forced low */ 00051 TIM2_ForcedAction_Inactive = ((uint8_t)0x40) /*!< Output Reference is forced high */ 00052 } 00053 TIM2_ForcedAction_TypeDef; 00054 00055 /** 00056 * @} 00057 */ 00058 00059 /** @defgroup TIM2_Prescaler 00060 * @{ 00061 */ 00062 typedef enum 00063 { 00064 TIM2_Prescaler_1 = ((uint8_t)0x00), /*!< Time base Prescaler = 1 (No effect)*/ 00065 TIM2_Prescaler_2 = ((uint8_t)0x01), /*!< Time base Prescaler = 2 */ 00066 TIM2_Prescaler_4 = ((uint8_t)0x02), /*!< Time base Prescaler = 4 */ 00067 TIM2_Prescaler_8 = ((uint8_t)0x03), /*!< Time base Prescaler = 8 */ 00068 TIM2_Prescaler_16 = ((uint8_t)0x04), /*!< Time base Prescaler = 16 */ 00069 TIM2_Prescaler_32 = ((uint8_t)0x05), /*!< Time base Prescaler = 32 */ 00070 TIM2_Prescaler_64 = ((uint8_t)0x06), /*!< Time base Prescaler = 64 */ 00071 TIM2_Prescaler_128 = ((uint8_t)0x07) /*!< Time base Prescaler = 128 */ 00072 }TIM2_Prescaler_TypeDef; 00073 00074 /** 00075 * @} 00076 */ 00077 00078 /** @defgroup TIM2_OCMode 00079 * @{ 00080 */ 00081 typedef enum 00082 { 00083 TIM2_OCMode_Timing = ((uint8_t)0x00), /*!< Timing (Frozen) Mode*/ 00084 TIM2_OCMode_Active = ((uint8_t)0x10), /*!< Active Mode*/ 00085 TIM2_OCMode_Inactive = ((uint8_t)0x20), /*!< Inactive Mode*/ 00086 TIM2_OCMode_Toggle = ((uint8_t)0x30), /*!< Toggle Mode*/ 00087 TIM2_OCMode_PWM1 = ((uint8_t)0x60), /*!< PWM Mode 1*/ 00088 TIM2_OCMode_PWM2 = ((uint8_t)0x70) /*!< PWM Mode 2*/ 00089 }TIM2_OCMode_TypeDef; 00090 00091 /** 00092 * @} 00093 */ 00094 00095 /** @defgroup TIM2_OnePulseMode 00096 * @{ 00097 */ 00098 typedef enum 00099 { 00100 TIM2_OPMode_Single = ((uint8_t)0x01), /*!< Single one Pulse mode (OPM Active) */ 00101 TIM2_OPMode_Repetitive = ((uint8_t)0x00) /*!< Repetitive Pulse mode (OPM inactive) */ 00102 }TIM2_OPMode_TypeDef; 00103 00104 /** 00105 * @} 00106 */ 00107 00108 /** @defgroup TIM2_Channel 00109 * @{ 00110 */ 00111 typedef enum 00112 { 00113 TIM2_Channel_1 = ((uint8_t)0x00), /*!< Channel 1*/ 00114 TIM2_Channel_2 = ((uint8_t)0x01) /*!< Channel 2*/ 00115 }TIM2_Channel_TypeDef; 00116 00117 /** 00118 * @} 00119 */ 00120 00121 /** @defgroup TIM2_CounterMode 00122 * @{ 00123 */ 00124 typedef enum 00125 { 00126 TIM2_CounterMode_Up = ((uint8_t)0x00), /*!< Counter Up Mode */ 00127 TIM2_CounterMode_Down = ((uint8_t)0x10), /*!< Counter Down Mode */ 00128 TIM2_CounterMode_CenterAligned1 = ((uint8_t)0x20), /*!< Counter Central aligned Mode 1 */ 00129 TIM2_CounterMode_CenterAligned2 = ((uint8_t)0x40), /*!< Counter Central aligned Mode 2 */ 00130 TIM2_CounterMode_CenterAligned3 = ((uint8_t)0x60) /*!< Counter Central aligned Mode 3 */ 00131 }TIM2_CounterMode_TypeDef; 00132 00133 /** 00134 * @} 00135 */ 00136 00137 /** @defgroup TIM2_Output_Compare_Polarity 00138 * @{ 00139 */ 00140 typedef enum 00141 { 00142 TIM2_OCPolarity_High = ((uint8_t)0x00), /*!< Output compare polarity = High */ 00143 TIM2_OCPolarity_Low = ((uint8_t)0x01) /*!< Output compare polarity = Low */ 00144 }TIM2_OCPolarity_TypeDef; 00145 00146 /** 00147 * @} 00148 */ 00149 00150 /** @defgroup TIM2_Output_State 00151 * @{ 00152 */ 00153 typedef enum 00154 { 00155 TIM2_OutputState_Disable = ((uint8_t)0x00), /*!< Output compare State disabled (channel output disabled) */ 00156 TIM2_OutputState_Enable = ((uint8_t)0x01) /*!< Output compare State enabled (channel output enabled) */ 00157 }TIM2_OutputState_TypeDef; 00158 00159 /** 00160 * @} 00161 */ 00162 00163 /** @defgroup TIM2_Break_State 00164 * @{ 00165 */ 00166 typedef enum 00167 { 00168 TIM2_BreakState_Disable = ((uint8_t)0x00), /*!< Break State disabled (break option disabled) */ 00169 TIM2_BreakState_Enable = ((uint8_t)0x10) /*!< Break State enabled (break option enabled) */ 00170 00171 }TIM2_BreakState_TypeDef; 00172 00173 /** 00174 * @} 00175 */ 00176 00177 /** @defgroup TIM2_Break_Polarity 00178 * @{ 00179 */ 00180 typedef enum 00181 { 00182 TIM2_BreakPolarity_High = ((uint8_t)0x20), /*!< if Break, channel polarity = High */ 00183 TIM2_BreakPolarity_Low = ((uint8_t)0x00) /*!< if Break, channel polarity = Low */ 00184 00185 }TIM2_BreakPolarity_TypeDef; 00186 00187 /** 00188 * @} 00189 */ 00190 00191 /** @defgroup TIM2_Automatic_Output 00192 * @{ 00193 */ 00194 typedef enum 00195 { 00196 TIM2_AutomaticOutput_Enable = ((uint8_t)0x40), /*!< Automatic Output option enabled */ 00197 TIM2_AutomaticOutput_Disable = ((uint8_t)0x00) /*!< Automatic Output option disabled */ 00198 }TIM2_AutomaticOutput_TypeDef; 00199 00200 /** 00201 * @} 00202 */ 00203 00204 /** @defgroup TIM2_Lock_Level 00205 * @{ 00206 */ 00207 typedef enum 00208 { 00209 TIM2_LockLevel_Off = ((uint8_t)0x00), /*!< Lock option disabled */ 00210 TIM2_LockLevel_1 = ((uint8_t)0x01), /*!< Select Lock Level 1 */ 00211 TIM2_LockLevel_2 = ((uint8_t)0x02), /*!< Select Lock Level 2 */ 00212 TIM2_LockLevel_3 = ((uint8_t)0x03) /*!< Select Lock Level 3 */ 00213 }TIM2_LockLevel_TypeDef; 00214 00215 /** 00216 * @} 00217 */ 00218 00219 /** @defgroup TIM2_OSSI_State 00220 * @{ 00221 */ 00222 typedef enum 00223 { 00224 TIM2_OSSIState_Enable = ((uint8_t)0x04), /*!< Off-State Selection for Idle mode enabled */ 00225 TIM2_OSSIState_Disable = ((uint8_t)0x00) /*!< Off-State Selection for Idle mode disabled */ 00226 }TIM2_OSSIState_TypeDef; 00227 00228 /** 00229 * @} 00230 */ 00231 00232 /** @defgroup TIM2_Output_Compare_Idle_state 00233 * @{ 00234 */ 00235 typedef enum 00236 { 00237 TIM2_OCIdleState_Reset = ((uint8_t)0x00), /*!< Output Compare Idle state = Reset */ 00238 TIM2_OCIdleState_Set = ((uint8_t)0x01) /*!< Output Compare Idle state = Set */ 00239 }TIM2_OCIdleState_TypeDef; 00240 00241 /** 00242 * @} 00243 */ 00244 00245 /** @defgroup TIM2_Input_Capture_Polarity 00246 * @{ 00247 */ 00248 typedef enum 00249 { 00250 TIM2_ICPolarity_Rising = ((uint8_t)0x00), /*!< Input Capture on Rising Edge*/ 00251 TIM2_ICPolarity_Falling = ((uint8_t)0x01) /*!< Input Capture on Falling Edge*/ 00252 }TIM2_ICPolarity_TypeDef; 00253 00254 /** 00255 * @} 00256 */ 00257 00258 /** @defgroup TIM2_Input_Capture_Selection 00259 * @{ 00260 */ 00261 typedef enum 00262 { 00263 TIM2_ICSelection_DirectTI = ((uint8_t)0x01), /*!< Input Capture mapped on the direct input*/ 00264 TIM2_ICSelection_IndirectTI = ((uint8_t)0x02), /*!< Input Capture mapped on the indirect input*/ 00265 TIM2_ICSelection_TRGI = ((uint8_t)0x03) /*!< Input Capture mapped on the Trigger Input*/ 00266 }TIM2_ICSelection_TypeDef; 00267 00268 /** 00269 * @} 00270 */ 00271 00272 /** @defgroup TIM2_Input_Capture_Prescaler 00273 * @{ 00274 */ 00275 typedef enum 00276 { 00277 TIM2_ICPSC_DIV1 = ((uint8_t)0x00), /*!< Input Capture Prescaler = 1 (one capture every 1 event) */ 00278 TIM2_ICPSC_DIV2 = ((uint8_t)0x04), /*!< Input Capture Prescaler = 2 (one capture every 2 events) */ 00279 TIM2_ICPSC_DIV4 = ((uint8_t)0x08), /*!< Input Capture Prescaler = 4 (one capture every 4 events) */ 00280 TIM2_ICPSC_DIV8 = ((uint8_t)0x0C) /*!< Input Capture Prescaler = 8 (one capture every 8 events) */ 00281 }TIM2_ICPSC_TypeDef; 00282 00283 /** 00284 * @} 00285 */ 00286 00287 /** @defgroup TIM2_Interrupts 00288 * @{ 00289 */ 00290 typedef enum 00291 { 00292 TIM2_IT_Update = ((uint8_t)0x01), /*!< Update Interrupt*/ 00293 TIM2_IT_CC1 = ((uint8_t)0x02), /*!< Capture Compare Channel1 Interrupt*/ 00294 TIM2_IT_CC2 = ((uint8_t)0x04), /*!< Capture Compare Channel2 Interrupt*/ 00295 TIM2_IT_Trigger = ((uint8_t)0x40), /*!< Trigger Interrupt*/ 00296 TIM2_IT_Break = ((uint8_t)0x80) /*!< Break Interrupt*/ 00297 }TIM2_IT_TypeDef; 00298 00299 /** 00300 * @} 00301 */ 00302 00303 /** @defgroup TIM2_External_Trigger_Prescaler 00304 * @{ 00305 */ 00306 typedef enum 00307 { 00308 TIM2_ExtTRGPSC_OFF = ((uint8_t)0x00), /*!< No External Trigger prescaler */ 00309 TIM2_ExtTRGPSC_DIV2 = ((uint8_t)0x10), /*!< External Trigger prescaler = 2 (ETRP frequency divided by 2) */ 00310 TIM2_ExtTRGPSC_DIV4 = ((uint8_t)0x20), /*!< External Trigger prescaler = 4 (ETRP frequency divided by 4) */ 00311 TIM2_ExtTRGPSC_DIV8 = ((uint8_t)0x30) /*!< External Trigger prescaler = 8 (ETRP frequency divided by 8) */ 00312 }TIM2_ExtTRGPSC_TypeDef; 00313 00314 /** 00315 * @} 00316 */ 00317 00318 /** @defgroup TIM2_Internal_Trigger_Selection 00319 * @{ 00320 */ 00321 typedef enum 00322 { 00323 TIM2_TRGSelection_TIM4 = ((uint8_t)0x00), /*!< TRIG Input source = TIM TRIG Output */ 00324 TIM2_TRGSelection_TIM1 = ((uint8_t)0x10), /*!< TRIG Input source = TIM TRIG Output */ 00325 TIM2_TRGSelection_TIM3 = ((uint8_t)0x20), /*!< TRIG Input source = TIM TRIG Output */ 00326 TIM2_TRGSelection_TIM5 = ((uint8_t)0x30), /*!< TRIG Input source = TIM TRIG Output */ 00327 TIM2_TRGSelection_TI1F_ED = ((uint8_t)0x40), /*!< TRIG Input source = TI1F_ED (TI1 Edge Detector) */ 00328 TIM2_TRGSelection_TI1FP1 = ((uint8_t)0x50), /*!< TRIG Input source = TI1FP1 (Filtred Timer Input 1) */ 00329 TIM2_TRGSelection_TI2FP2 = ((uint8_t)0x60), /*!< TRIG Input source = TI2FP2 (Filtred Timer Input 2) */ 00330 TIM2_TRGSelection_ETRF = ((uint8_t)0x70) /*!< TRIG Input source = ETRF (External Trigger Input ) */ 00331 }TIM2_TRGSelection_TypeDef; 00332 00333 /** 00334 * @} 00335 */ 00336 00337 /** @defgroup TIM2_TI_External_Clock_Source 00338 * @{ 00339 */ 00340 typedef enum 00341 { 00342 TIM2_TIxExternalCLK1Source_TI1ED = ((uint8_t)0x40), /*!< External Clock mode 1 source = TI1ED */ 00343 TIM2_TIxExternalCLK1Source_TI1 = ((uint8_t)0x50), /*!< External Clock mode 1 source = TI1 */ 00344 TIM2_TIxExternalCLK1Source_TI2 = ((uint8_t)0x60) /*!< External Clock mode 1 source = TI2 */ 00345 }TIM2_TIxExternalCLK1Source_TypeDef; 00346 00347 /** 00348 * @} 00349 */ 00350 00351 /** @defgroup TIM2_External_Trigger_Polarity 00352 * @{ 00353 */ 00354 typedef enum 00355 { 00356 TIM2_ExtTRGPolarity_Inverted = ((uint8_t)0x80), /*!< External Trigger Polarity = inverted */ 00357 TIM2_ExtTRGPolarity_NonInverted = ((uint8_t)0x00) /*!< External Trigger Polarity = non inverted */ 00358 }TIM2_ExtTRGPolarity_TypeDef; 00359 00360 /** 00361 * @} 00362 */ 00363 00364 /** @defgroup TIM2_Prescaler_Reload_Mode 00365 * @{ 00366 */ 00367 typedef enum 00368 { 00369 TIM2_PSCReloadMode_Update = ((uint8_t)0x00), /*!< Prescaler value is reloaded at every update*/ 00370 TIM2_PSCReloadMode_Immediate = ((uint8_t)0x01) /*!< Prescaler value is reloaded immediatly*/ 00371 }TIM2_PSCReloadMode_TypeDef; 00372 00373 /** 00374 * @} 00375 */ 00376 00377 /** @defgroup TIM2_Encoder_Mode 00378 * @{ 00379 */ 00380 typedef enum 00381 { 00382 TIM2_EncoderMode_TI1 = ((uint8_t)0x01), /*!< Encoder mode 1*/ 00383 TIM2_EncoderMode_TI2 = ((uint8_t)0x02), /*!< Encoder mode 2*/ 00384 TIM2_EncoderMode_TI12 = ((uint8_t)0x03) /*!< Encoder mode 3*/ 00385 }TIM2_EncoderMode_TypeDef; 00386 00387 /** 00388 * @} 00389 */ 00390 00391 /** @defgroup TIM2_Event_Source 00392 * @{ 00393 */ 00394 typedef enum 00395 { 00396 TIM2_EventSource_Update = ((uint8_t)0x01), /*!< Update Event*/ 00397 TIM2_EventSource_CC1 = ((uint8_t)0x02), /*!< Capture Compare Channel1 Event*/ 00398 TIM2_EventSource_CC2 = ((uint8_t)0x04), /*!< Capture Compare Channel2 Event*/ 00399 TIM2_EventSource_Trigger = ((uint8_t)0x40), /*!< Trigger Event*/ 00400 TIM2_EventSource_Break = ((uint8_t)0x80) /*!< Break Event*/ 00401 }TIM2_EventSource_TypeDef; 00402 00403 /** 00404 * @} 00405 */ 00406 00407 /** @defgroup TIM2_Update_Source 00408 * @{ 00409 */ 00410 typedef enum 00411 { 00412 TIM2_UpdateSource_Global = ((uint8_t)0x00), /*!< Global Update request source */ 00413 TIM2_UpdateSource_Regular = ((uint8_t)0x01) /*!< Regular Update request source */ 00414 }TIM2_UpdateSource_TypeDef; 00415 00416 /** 00417 * @} 00418 */ 00419 00420 /** @defgroup TIM2_Trigger_Output_Source 00421 * @{ 00422 */ 00423 typedef enum 00424 { 00425 TIM2_TRGOSource_Reset = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/ 00426 TIM2_TRGOSource_Enable = ((uint8_t)0x10), /*!< Trigger Output source = TIM2 is enabled*/ 00427 TIM2_TRGOSource_Update = ((uint8_t)0x20), /*!< Trigger Output source = Update event*/ 00428 TIM2_TRGOSource_OC1 = ((uint8_t)0x30), /*!< Trigger Output source = output compare channel1 */ 00429 TIM2_TRGOSource_OC1REF = ((uint8_t)0x40), /*!< Trigger Output source = output compare channel 1 reference */ 00430 TIM2_TRGOSource_OC2REF = ((uint8_t)0x50) /*!< Trigger Output source = output compare channel 2 reference */ 00431 }TIM2_TRGOSource_TypeDef; 00432 00433 /** 00434 * @} 00435 */ 00436 00437 /** @defgroup TIM2_Slave_Mode 00438 * @{ 00439 */ 00440 typedef enum 00441 { 00442 TIM2_SlaveMode_Reset = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/ 00443 TIM2_SlaveMode_Gated = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/ 00444 TIM2_SlaveMode_Trigger = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/ 00445 TIM2_SlaveMode_External1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/ 00446 }TIM2_SlaveMode_TypeDef; 00447 00448 /** 00449 * @} 00450 */ 00451 00452 /** @defgroup TIM2_Flags 00453 * @{ 00454 */ 00455 typedef enum 00456 { 00457 TIM2_FLAG_Update = ((uint16_t)0x0001), /*!< Update Flag */ 00458 TIM2_FLAG_CC1 = ((uint16_t)0x0002), /*!< Capture compare 1 Flag */ 00459 TIM2_FLAG_CC2 = ((uint16_t)0x0004), /*!< Capture compare 2 Flag */ 00460 TIM2_FLAG_Trigger = ((uint16_t)0x0040), /*!< Trigger Flag */ 00461 TIM2_FLAG_Break = ((uint16_t)0x0080), /*!< Break Flag */ 00462 TIM2_FLAG_CC1OF = ((uint16_t)0x0200), /*!< Capture compare 1 over capture Flag */ 00463 TIM2_FLAG_CC2OF = ((uint16_t)0x0400) /*!< Capture compare 2 over capture Flag */ 00464 }TIM2_FLAG_TypeDef; 00465 00466 /** 00467 * @} 00468 */ 00469 00470 /** @defgroup TIM2_DMA_Source_Requests 00471 * @{ 00472 */ 00473 typedef enum 00474 { 00475 TIM2_DMASource_Update = ((uint8_t)0x01), /*!< TIM2 DMA Update Request*/ 00476 TIM2_DMASource_CC1 = ((uint8_t)0x02), /*!< TIM2 DMA CC1 Request*/ 00477 TIM2_DMASource_CC2 = ((uint8_t)0x04) /*!< TIM2 DMA CC2 Request*/ 00478 }TIM2_DMASource_TypeDef; 00479 00480 /** 00481 * @} 00482 */ 00483 00484 /** 00485 * @} 00486 */ 00487 00488 /* Exported constants --------------------------------------------------------*/ 00489 /* Exported macros -----------------------------------------------------------*/ 00490 00491 /** @defgroup TIM2_Exported_Macros 00492 * @{ 00493 */ 00494 00495 /** 00496 * @brief Macro used by the assert function to check the different functions parameters. 00497 */ 00498 00499 /** 00500 * @brief Macro TIM2 Forced Action 00501 */ 00502 #define IS_TIM2_FORCED_ACTION(ACTION) \ 00503 (((ACTION) == TIM2_ForcedAction_Active) || \ 00504 ((ACTION) == TIM2_ForcedAction_Inactive)) 00505 00506 /** 00507 * @brief Macro TIM2 Prescaler 00508 */ 00509 #define IS_TIM2_PRESCALER(PRESCALER) \ 00510 (((PRESCALER) == TIM2_Prescaler_1) || \ 00511 ((PRESCALER) == TIM2_Prescaler_2) || \ 00512 ((PRESCALER) == TIM2_Prescaler_4) || \ 00513 ((PRESCALER) == TIM2_Prescaler_8) || \ 00514 ((PRESCALER) == TIM2_Prescaler_16) || \ 00515 ((PRESCALER) == TIM2_Prescaler_32) || \ 00516 ((PRESCALER) == TIM2_Prescaler_64) || \ 00517 ((PRESCALER) == TIM2_Prescaler_128)) 00518 00519 /** 00520 * @brief Macro TIM2 Output Compare and PWM modes 00521 */ 00522 #define IS_TIM2_OC_MODE(MODE) \ 00523 (((MODE) == TIM2_OCMode_Timing) || \ 00524 ((MODE) == TIM2_OCMode_Active) || \ 00525 ((MODE) == TIM2_OCMode_Inactive) || \ 00526 ((MODE) == TIM2_OCMode_Toggle) || \ 00527 ((MODE) == TIM2_OCMode_PWM1) || \ 00528 ((MODE) == TIM2_OCMode_PWM2)) 00529 00530 #define IS_TIM2_OCM(MODE) \ 00531 (((MODE) == TIM2_OCMode_Timing) || \ 00532 ((MODE) == TIM2_OCMode_Active) || \ 00533 ((MODE) == TIM2_OCMode_Inactive) || \ 00534 ((MODE) == TIM2_OCMode_Toggle) || \ 00535 ((MODE) == TIM2_OCMode_PWM1) || \ 00536 ((MODE) == TIM2_OCMode_PWM2) || \ 00537 ((MODE) == (uint8_t)TIM2_ForcedAction_Active) || \ 00538 ((MODE) == (uint8_t)TIM2_ForcedAction_Inactive)) 00539 /** 00540 * @brief Macro TIM2 One Pulse Mode 00541 */ 00542 #define IS_TIM2_OPM_MODE(MODE) \ 00543 (((MODE) == TIM2_OPMode_Single) || \ 00544 ((MODE) == TIM2_OPMode_Repetitive)) 00545 00546 /** 00547 * @brief Macro TIM2 Channel 00548 */ 00549 #define IS_TIM2_CHANNEL(CHANNEL) \ 00550 (((CHANNEL) == TIM2_Channel_1) || \ 00551 ((CHANNEL) == TIM2_Channel_2) ) 00552 00553 /** 00554 * @brief Macro TIM2 Counter Mode 00555 */ 00556 #define IS_TIM2_COUNTER_MODE(MODE) \ 00557 (((MODE) == TIM2_CounterMode_Up) || \ 00558 ((MODE) == TIM2_CounterMode_Down) || \ 00559 ((MODE) == TIM2_CounterMode_CenterAligned1) || \ 00560 ((MODE) == TIM2_CounterMode_CenterAligned2) || \ 00561 ((MODE) == TIM2_CounterMode_CenterAligned3)) 00562 00563 /** 00564 * @brief Macro TIM2 Output Compare Polarity 00565 */ 00566 #define IS_TIM2_OC_POLARITY(POLARITY) \ 00567 (((POLARITY) == TIM2_OCPolarity_High) || \ 00568 ((POLARITY) == TIM2_OCPolarity_Low)) 00569 00570 /** 00571 * @brief Macro TIM2 Output Compare states 00572 */ 00573 #define IS_TIM2_OUTPUT_STATE(STATE) \ 00574 (((STATE) == TIM2_OutputState_Disable) || \ 00575 ((STATE) == TIM2_OutputState_Enable)) 00576 00577 /** 00578 * @brief Macro Break Input enable/disable 00579 */ 00580 #define IS_TIM2_BREAK_STATE(STATE) \ 00581 (((STATE) == TIM2_BreakState_Enable) || \ 00582 ((STATE) == TIM2_BreakState_Disable)) 00583 00584 /** 00585 * @brief Macro Break Polarity 00586 */ 00587 #define IS_TIM2_BREAK_POLARITY(POLARITY) \ 00588 (((POLARITY) == TIM2_BreakPolarity_Low) || \ 00589 ((POLARITY) == TIM2_BreakPolarity_High)) 00590 00591 /** 00592 * @brief Macro TIM2 AOE Bit Set/Reset 00593 */ 00594 #define IS_TIM2_AUTOMATIC_OUTPUT_STATE(STATE) \ 00595 (((STATE) == TIM2_AutomaticOutput_Enable) || \ 00596 ((STATE) == TIM2_AutomaticOutput_Disable)) 00597 00598 /** 00599 * @brief Macro Lock levels 00600 */ 00601 #define IS_TIM2_LOCK_LEVEL(LEVEL) \ 00602 (((LEVEL) == TIM2_LockLevel_Off) || \ 00603 ((LEVEL) == TIM2_LockLevel_1) || \ 00604 ((LEVEL) == TIM2_LockLevel_2) || \ 00605 ((LEVEL) == TIM2_LockLevel_3)) 00606 00607 /** 00608 * @brief Macro OSSI: Off-State Selection for Idle mode states 00609 */ 00610 #define IS_TIM2_OSSI_STATE(STATE) \ 00611 (((STATE) == TIM2_OSSIState_Enable) || \ 00612 ((STATE) == TIM2_OSSIState_Disable)) 00613 00614 /** 00615 * @brief Macro TIM2 OC IDLE STATE 00616 */ 00617 #define IS_TIM2_OCIDLE_STATE(STATE) \ 00618 (((STATE) == TIM2_OCIdleState_Set) || \ 00619 ((STATE) == TIM2_OCIdleState_Reset)) 00620 00621 /** 00622 * @brief Macro TIM2 IC POLARITY 00623 */ 00624 00625 #define IS_TIM2_IC_POLARITY(POLARITY) \ 00626 (((POLARITY) == TIM2_ICPolarity_Rising) || \ 00627 ((POLARITY) == TIM2_ICPolarity_Falling)) 00628 00629 /** 00630 * @brief Macro TIM2 IC SELECTION 00631 */ 00632 #define IS_TIM2_IC_SELECTION(SELECTION) \ 00633 (((SELECTION) == TIM2_ICSelection_DirectTI) || \ 00634 ((SELECTION) == TIM2_ICSelection_IndirectTI) || \ 00635 ((SELECTION) == TIM2_ICSelection_TRGI)) 00636 00637 /** 00638 * @brief Macro TIM2 IC PRESCALER 00639 */ 00640 #define IS_TIM2_IC_PRESCALER(PRESCALER) \ 00641 (((PRESCALER) == TIM2_ICPSC_DIV1) || \ 00642 ((PRESCALER) == TIM2_ICPSC_DIV2) || \ 00643 ((PRESCALER) == TIM2_ICPSC_DIV4) || \ 00644 ((PRESCALER) == TIM2_ICPSC_DIV8)) 00645 00646 /** 00647 * @brief Macro TIM2 Input Capture Filter Value 00648 */ 00649 #define IS_TIM2_IC_FILTER(ICFILTER) \ 00650 ((ICFILTER) <= 0x0F) 00651 00652 /** 00653 * @brief Macro TIM2 Interrupts 00654 */ 00655 #define IS_TIM2_IT(IT) \ 00656 ((IT) != 0x00) 00657 00658 #define IS_TIM2_GET_IT(IT) \ 00659 (((IT) == TIM2_IT_Update) || \ 00660 ((IT) == TIM2_IT_CC1) || \ 00661 ((IT) == TIM2_IT_CC2) || \ 00662 ((IT) == TIM2_IT_Trigger) || \ 00663 ((IT) == TIM2_IT_Break)) 00664 00665 /** 00666 * @brief Macro TIM2 external trigger prescaler 00667 */ 00668 #define IS_TIM2_EXT_PRESCALER(PRESCALER) \ 00669 (((PRESCALER) == TIM2_ExtTRGPSC_OFF) || \ 00670 ((PRESCALER) == TIM2_ExtTRGPSC_DIV2) || \ 00671 ((PRESCALER) == TIM2_ExtTRGPSC_DIV4) || \ 00672 ((PRESCALER) == TIM2_ExtTRGPSC_DIV8)) 00673 /** 00674 * @brief Macro TIM2 Trigger Selection 00675 */ 00676 #define IS_TIM2_TRIGGER_SELECTION(SELECTION) \ 00677 (((SELECTION) == TIM2_TRGSelection_TIM4) || \ 00678 ((SELECTION) == TIM2_TRGSelection_TIM1) || \ 00679 ((SELECTION) == TIM2_TRGSelection_TIM3) || \ 00680 ((SELECTION) == TIM2_TRGSelection_TIM5) || \ 00681 ((SELECTION) == TIM2_TRGSelection_TI1F_ED) || \ 00682 ((SELECTION) == TIM2_TRGSelection_TI1FP1) || \ 00683 ((SELECTION) == TIM2_TRGSelection_TI2FP2) || \ 00684 ((SELECTION) == TIM2_TRGSelection_ETRF)) 00685 00686 00687 #define IS_TIM2_TIX_TRIGGER_SELECTION(SELECTION) \ 00688 (((SELECTION) == TIM2_TRGSelection_TI1F_ED) || \ 00689 ((SELECTION) == TIM2_TRGSelection_TI1FP1) || \ 00690 ((SELECTION) == TIM2_TRGSelection_TI2FP2)) 00691 00692 /** 00693 * @brief Macro TIM2 TIx external Clock Selection 00694 */ 00695 #define IS_TIM2_TIXCLK_SOURCE(SOURCE) \ 00696 (((SOURCE) == TIM2_TIxExternalCLK1Source_TI1ED) || \ 00697 ((SOURCE) == TIM2_TIxExternalCLK1Source_TI2) || \ 00698 ((SOURCE) == TIM2_TIxExternalCLK1Source_TI1)) 00699 00700 /** 00701 * @brief Macro TIM2 Trigger Polarity 00702 */ 00703 #define IS_TIM2_EXT_POLARITY(POLARITY) \ 00704 (((POLARITY) == TIM2_ExtTRGPolarity_Inverted) || \ 00705 ((POLARITY) == TIM2_ExtTRGPolarity_NonInverted)) 00706 00707 /** 00708 * @brief Macro TIM2 External Trigger Filter 00709 */ 00710 #define IS_TIM2_EXT_FILTER(EXTFILTER) \ 00711 ((EXTFILTER) <= 0x0F) 00712 00713 /** 00714 * @brief Macro TIM2 Prescaler Reload 00715 */ 00716 #define IS_TIM2_PRESCALER_RELOAD(RELOAD) \ 00717 (((RELOAD) == TIM2_PSCReloadMode_Update) || \ 00718 ((RELOAD) == TIM2_PSCReloadMode_Immediate)) 00719 00720 /** 00721 * @brief Macro TIM2 encoder mode 00722 */ 00723 #define IS_TIM2_ENCODER_MODE(MODE) \ 00724 (((MODE) == TIM2_EncoderMode_TI1) || \ 00725 ((MODE) == TIM2_EncoderMode_TI2) || \ 00726 ((MODE) == TIM2_EncoderMode_TI12)) 00727 00728 /** 00729 * @brief Macro TIM2 event source 00730 */ 00731 #define IS_TIM2_EVENT_SOURCE(SOURCE) \ 00732 ((((SOURCE) & (uint8_t)0x18) == 0x00) && \ 00733 ((SOURCE) != 0x00)) 00734 00735 /** 00736 * @brief Macro TIM2 update source 00737 */ 00738 #define IS_TIM2_UPDATE_SOURCE(SOURCE) \ 00739 (((SOURCE) == TIM2_UpdateSource_Global) || \ 00740 ((SOURCE) == TIM2_UpdateSource_Regular)) 00741 00742 /** 00743 * @brief Macro TIM2 TRGO source 00744 */ 00745 #define IS_TIM2_TRGO_SOURCE(SOURCE) \ 00746 (((SOURCE) == TIM2_TRGOSource_Reset) || \ 00747 ((SOURCE) == TIM2_TRGOSource_Enable) || \ 00748 ((SOURCE) == TIM2_TRGOSource_Update) || \ 00749 ((SOURCE) == TIM2_TRGOSource_OC1) || \ 00750 ((SOURCE) == TIM2_TRGOSource_OC1REF) || \ 00751 ((SOURCE) == TIM2_TRGOSource_OC2REF)) 00752 /** 00753 * @brief Macro TIM2 Slave mode 00754 */ 00755 #define IS_TIM2_SLAVE_MODE(MODE) \ 00756 (((MODE) == TIM2_SlaveMode_Reset) || \ 00757 ((MODE) == TIM2_SlaveMode_Gated) || \ 00758 ((MODE) == TIM2_SlaveMode_Trigger) || \ 00759 ((MODE) == TIM2_SlaveMode_External1)) 00760 /** 00761 * @brief Macro TIM2 Flags 00762 */ 00763 #define IS_TIM2_GET_FLAG(FLAG) \ 00764 (((FLAG) == TIM2_FLAG_Update) || \ 00765 ((FLAG) == TIM2_FLAG_CC1) || \ 00766 ((FLAG) == TIM2_FLAG_CC2) || \ 00767 ((FLAG) == TIM2_FLAG_Trigger) || \ 00768 ((FLAG) == TIM2_FLAG_Break) || \ 00769 ((FLAG) == TIM2_FLAG_CC1OF) || \ 00770 ((FLAG) == TIM2_FLAG_CC2OF)) 00771 00772 #define IS_TIM2_CLEAR_FLAG(FLAG) \ 00773 ((((FLAG) & (uint16_t)0xE100) == 0x0000) && ((FLAG) != 0x0000)) 00774 00775 /** 00776 * @brief Macro TIM2 DMA sources 00777 */ 00778 00779 #define IS_TIM2_DMA_SOURCE(SOURCE) \ 00780 (((SOURCE) == TIM2_DMASource_Update) || \ 00781 ((SOURCE) == TIM2_DMASource_CC1) || \ 00782 ((SOURCE) == TIM2_DMASource_CC2)) 00783 00784 /** 00785 * @} 00786 */ 00787 00788 /* Exported functions ------------------------------------------------------- */ 00789 /* TimeBase management ********************************************************/ 00790 void TIM2_DeInit(void); 00791 void TIM2_TimeBaseInit(TIM2_Prescaler_TypeDef TIM2_Prescaler, 00792 TIM2_CounterMode_TypeDef TIM2_CounterMode, uint16_t TIM2_Period); 00793 void TIM2_PrescalerConfig(TIM2_Prescaler_TypeDef Prescaler, 00794 TIM2_PSCReloadMode_TypeDef TIM2_PSCReloadMode); 00795 void TIM2_CounterModeConfig(TIM2_CounterMode_TypeDef TIM2_CounterMode); 00796 void TIM2_SetCounter(uint16_t Counter); 00797 void TIM2_SetAutoreload(uint16_t Autoreload); 00798 uint16_t TIM2_GetCounter(void); 00799 TIM2_Prescaler_TypeDef TIM2_GetPrescaler(void); 00800 void TIM2_UpdateDisableConfig(FunctionalState NewState); 00801 void TIM2_UpdateRequestConfig(TIM2_UpdateSource_TypeDef TIM2_UpdateSource); 00802 void TIM2_ARRPreloadConfig(FunctionalState NewState); 00803 void TIM2_SelectOnePulseMode(TIM2_OPMode_TypeDef TIM2_OPMode); 00804 void TIM2_Cmd(FunctionalState NewState); 00805 00806 /* Output Compare management **************************************************/ 00807 void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode, 00808 TIM2_OutputState_TypeDef TIM2_OutputState, 00809 uint16_t TIM2_Pulse, 00810 TIM2_OCPolarity_TypeDef TIM2_OCPolarity, 00811 TIM2_OCIdleState_TypeDef TIM2_OCIdleState); 00812 void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode, 00813 TIM2_OutputState_TypeDef TIM2_OutputState, 00814 uint16_t TIM2_Pulse, 00815 TIM2_OCPolarity_TypeDef TIM2_OCPolarity, 00816 TIM2_OCIdleState_TypeDef TIM2_OCIdleState); 00817 void TIM2_BKRConfig(TIM2_OSSIState_TypeDef TIM2_OSSIState, 00818 TIM2_LockLevel_TypeDef TIM2_LockLevel, 00819 TIM2_BreakState_TypeDef TIM2_BreakState, 00820 TIM2_BreakPolarity_TypeDef TIM2_BreakPolarity, 00821 TIM2_AutomaticOutput_TypeDef TIM2_AutomaticOutput); 00822 void TIM2_CtrlPWMOutputs(FunctionalState NewState); 00823 void TIM2_SelectOCxM(TIM2_Channel_TypeDef TIM2_Channel, TIM2_OCMode_TypeDef TIM2_OCMode); 00824 void TIM2_SetCompare1(uint16_t Compare); 00825 void TIM2_SetCompare2(uint16_t Compare); 00826 void TIM2_ForcedOC1Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); 00827 void TIM2_ForcedOC2Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); 00828 void TIM2_OC1PreloadConfig(FunctionalState NewState); 00829 void TIM2_OC2PreloadConfig(FunctionalState NewState); 00830 void TIM2_OC1FastConfig(FunctionalState NewState); 00831 void TIM2_OC2FastConfig(FunctionalState NewState); 00832 void TIM2_OC1PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); 00833 void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); 00834 void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState); 00835 00836 /* Input Capture management ***************************************************/ 00837 void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel, 00838 TIM2_ICPolarity_TypeDef TIM2_ICPolarity, 00839 TIM2_ICSelection_TypeDef TIM2_ICSelection, 00840 TIM2_ICPSC_TypeDef TIM2_ICPrescaler, 00841 uint8_t TIM2_ICFilter); 00842 void TIM2_PWMIConfig(TIM2_Channel_TypeDef TIM2_Channel, 00843 TIM2_ICPolarity_TypeDef TIM2_ICPolarity, 00844 TIM2_ICSelection_TypeDef TIM2_ICSelection, 00845 TIM2_ICPSC_TypeDef TIM2_ICPrescaler, 00846 uint8_t TIM2_ICFilter); 00847 uint16_t TIM2_GetCapture1(void); 00848 uint16_t TIM2_GetCapture2(void); 00849 void TIM2_SetIC1Prescaler(TIM2_ICPSC_TypeDef TIM2_IC1Prescaler); 00850 void TIM2_SetIC2Prescaler(TIM2_ICPSC_TypeDef TIM2_IC2Prescaler); 00851 00852 /* Interrupts, DMA and flags management ***************************************/ 00853 void TIM2_ITConfig(TIM2_IT_TypeDef TIM2_IT, FunctionalState NewState); 00854 void TIM2_GenerateEvent(TIM2_EventSource_TypeDef TIM2_EventSource); 00855 FlagStatus TIM2_GetFlagStatus(TIM2_FLAG_TypeDef TIM2_FLAG); 00856 void TIM2_ClearFlag(TIM2_FLAG_TypeDef TIM2_FLAG); 00857 ITStatus TIM2_GetITStatus(TIM2_IT_TypeDef TIM2_IT); 00858 void TIM2_ClearITPendingBit(TIM2_IT_TypeDef TIM2_IT); 00859 void TIM2_DMACmd(TIM2_DMASource_TypeDef TIM2_DMASource, FunctionalState NewState); 00860 void TIM2_SelectCCDMA(FunctionalState NewState); 00861 00862 /* Clocks management **********************************************************/ 00863 void TIM2_InternalClockConfig(void); 00864 void TIM2_TIxExternalClockConfig(TIM2_TIxExternalCLK1Source_TypeDef TIM2_TIxExternalCLKSource, 00865 TIM2_ICPolarity_TypeDef TIM2_ICPolarity, 00866 uint8_t ICFilter); 00867 void TIM2_ETRClockMode1Config(TIM2_ExtTRGPSC_TypeDef TIM2_ExtTRGPrescaler, 00868 TIM2_ExtTRGPolarity_TypeDef TIM2_ExtTRGPolarity, 00869 uint8_t ExtTRGFilter); 00870 void TIM2_ETRClockMode2Config(TIM2_ExtTRGPSC_TypeDef TIM2_ExtTRGPrescaler, 00871 TIM2_ExtTRGPolarity_TypeDef TIM2_ExtTRGPolarity, 00872 uint8_t ExtTRGFilter); 00873 00874 /* Synchronization management *************************************************/ 00875 void TIM2_SelectInputTrigger(TIM2_TRGSelection_TypeDef TIM2_InputTriggerSource); 00876 void TIM2_SelectOutputTrigger(TIM2_TRGOSource_TypeDef TIM2_TRGOSource); 00877 void TIM2_SelectSlaveMode(TIM2_SlaveMode_TypeDef TIM2_SlaveMode); 00878 void TIM2_SelectMasterSlaveMode(FunctionalState NewState); 00879 void TIM2_ETRConfig(TIM2_ExtTRGPSC_TypeDef TIM2_ExtTRGPrescaler, 00880 TIM2_ExtTRGPolarity_TypeDef TIM2_ExtTRGPolarity, 00881 uint8_t ExtTRGFilter); 00882 00883 /* Specific interface management **********************************************/ 00884 void TIM2_EncoderInterfaceConfig(TIM2_EncoderMode_TypeDef TIM2_EncoderMode, 00885 TIM2_ICPolarity_TypeDef TIM2_IC1Polarity, 00886 TIM2_ICPolarity_TypeDef TIM2_IC2Polarity); 00887 void TIM2_SelectHallSensor(FunctionalState NewState); 00888 00889 #endif /* __STM8L15x_TIM2_H */ 00890 00891 /** 00892 * @} 00893 */ 00894 00895 /** 00896 * @} 00897 */ 00898 00899 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/