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STM8L15x Standard Peripherals Drivers
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stm8l15x_syscfg.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8l15x_syscfg.h 00004 * @author MCD Application Team 00005 * @version V1.5.0 00006 * @date 13-May-2011 00007 * @brief This file contains all the functions prototypes for the SYSCFG firmware 00008 * library. 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 00013 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 00014 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 00015 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 00016 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 00017 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 00018 * 00019 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> 00020 ****************************************************************************** 00021 */ 00022 00023 /* Define to prevent recursive inclusion -------------------------------------*/ 00024 #ifndef __STM8L15x_SYSCFG_H 00025 #define __STM8L15x_SYSCFG_H 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm8l15x.h" 00029 00030 /** @addtogroup STM8L15x_StdPeriph_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup SYSCFG 00035 * @{ 00036 */ 00037 /* Exported types ------------------------------------------------------------*/ 00038 /** @defgroup SYSCFG_Exported_Types 00039 * @{ 00040 */ 00041 00042 /** @defgroup RI_Input_Capture 00043 * @{ 00044 */ 00045 typedef enum 00046 { 00047 RI_InputCapture_IC2 = ((uint8_t) 0x02), /*!< TIM1 Input Capture 2 is routed */ 00048 RI_InputCapture_IC3 = ((uint8_t) 0x03) /*!< TIM1 Input Capture 3 is routed */ 00049 }RI_InputCapture_TypeDef; 00050 00051 /** 00052 * @} 00053 */ 00054 00055 /** @defgroup RI_Input_Capture_Routing 00056 * @{ 00057 */ 00058 typedef enum 00059 { 00060 RI_InputCaptureRouting_0 = ((uint8_t) 0x00), /*!< TIM1 IC2 is routed to PD4, IC3 to PD5 */ 00061 RI_InputCaptureRouting_1 = ((uint8_t) 0x01), /*!< TIM1 IC2 is routed to PF0, IC3 to PF1 */ 00062 RI_InputCaptureRouting_2 = ((uint8_t) 0x02), /*!< TIM1 IC2 is routed to PF2, IC3 to PF3 */ 00063 RI_InputCaptureRouting_3 = ((uint8_t) 0x03), /*!< TIM1 IC2 is routed to PE0, IC3 to PE1 */ 00064 RI_InputCaptureRouting_4 = ((uint8_t) 0x04), /*!< TIM1 IC2 is routed to PE2, IC3 to PE3 */ 00065 RI_InputCaptureRouting_5 = ((uint8_t) 0x05), /*!< TIM1 IC2 is routed to PE4, IC3 to PE5 */ 00066 RI_InputCaptureRouting_6 = ((uint8_t) 0x06), /*!< TIM1 IC2 is routed to PE6, IC3 to PE7 */ 00067 RI_InputCaptureRouting_7 = ((uint8_t) 0x07), /*!< TIM1 IC2 is routed to PD0, IC3 to PD1 */ 00068 RI_InputCaptureRouting_8 = ((uint8_t) 0x08), /*!< TIM1 IC2 is routed to PD2, IC3 to PD3 */ 00069 RI_InputCaptureRouting_9 = ((uint8_t) 0x09), /*!< TIM1 IC2 is routed to PD4, IC3 to PD5 */ 00070 RI_InputCaptureRouting_10 = ((uint8_t) 0x0A), /*!< TIM1 IC2 is routed to PD6, IC3 to PD7 */ 00071 RI_InputCaptureRouting_11 = ((uint8_t) 0x0B), /*!< TIM1 IC2 is routed to PC0, IC3 to PC1 */ 00072 RI_InputCaptureRouting_12 = ((uint8_t) 0x0C), /*!< TIM1 IC2 is routed to PC2, IC3 to PC3 */ 00073 RI_InputCaptureRouting_13 = ((uint8_t) 0x0D), /*!< TIM1 IC2 is routed to PC4, IC3 to PC5 */ 00074 RI_InputCaptureRouting_14 = ((uint8_t) 0x0E), /*!< TIM1 IC2 is routed to PC6, IC3 to PC7 */ 00075 RI_InputCaptureRouting_15 = ((uint8_t) 0x0F), /*!< TIM1 IC2 is routed to PB0, IC3 to PB1 */ 00076 RI_InputCaptureRouting_16 = ((uint8_t) 0x10), /*!< TIM1 IC2 is routed to PB2, IC3 to PB3 */ 00077 RI_InputCaptureRouting_17 = ((uint8_t) 0x11), /*!< TIM1 IC2 is routed to PB4, IC3 to PB5 */ 00078 RI_InputCaptureRouting_18 = ((uint8_t) 0x12), /*!< TIM1 IC2 is routed to PB6, IC3 to PB7 */ 00079 RI_InputCaptureRouting_19 = ((uint8_t) 0x13), /*!< TIM1 IC2 is routed to PA0, IC3 to PA2 */ 00080 RI_InputCaptureRouting_20 = ((uint8_t) 0x14), /*!< TIM1 IC2 is routed to PA3, IC3 to PA4 */ 00081 RI_InputCaptureRouting_21 = ((uint8_t) 0x15), /*!< TIM1 IC2 is routed to PA5, IC3 to PA6 */ 00082 RI_InputCaptureRouting_22 = ((uint8_t) 0x16) /*!< TIM1 IC2 is routed to PA7, IC3 to PD5 */ 00083 }RI_InputCaptureRouting_TypeDef; 00084 00085 /** 00086 * @} 00087 */ 00088 00089 /** @defgroup RI_Analog_Switch 00090 * @{ 00091 */ 00092 /** 00093 * @brief Definition of the Analog Switch to be controlled. 00094 * Values are coded in 0xXY format where 00095 * X: the register index (1: RI_ASCR1, 2: RI_ASCR2) 00096 * Y: the bit position which corresponds with the Analog Switch 00097 */ 00098 typedef enum 00099 { 00100 RI_AnalogSwitch_0 = ((uint8_t) 0x10), /*!< Analog switch 0 */ 00101 RI_AnalogSwitch_1 = ((uint8_t) 0x11), /*!< Analog switch 1 */ 00102 RI_AnalogSwitch_2 = ((uint8_t) 0x12), /*!< Analog switch 2 */ 00103 RI_AnalogSwitch_3 = ((uint8_t) 0x13), /*!< Analog switch 3 */ 00104 RI_AnalogSwitch_4 = ((uint8_t) 0x14), /*!< Analog switch 4 */ 00105 RI_AnalogSwitch_5 = ((uint8_t) 0x15), /*!< Analog switch 5 */ 00106 RI_AnalogSwitch_6 = ((uint8_t) 0x16), /*!< Analog switch 6 */ 00107 RI_AnalogSwitch_7 = ((uint8_t) 0x17), /*!< Analog switch 7 */ 00108 RI_AnalogSwitch_8 = ((uint8_t) 0x20), /*!< Analog switch 8 */ 00109 RI_AnalogSwitch_9 = ((uint8_t) 0x21), /*!< Analog switch 9 */ 00110 RI_AnalogSwitch_10 = ((uint8_t) 0x22), /*!< Analog switch 10 */ 00111 RI_AnalogSwitch_11 = ((uint8_t) 0x23), /*!< Analog switch 11 */ 00112 RI_AnalogSwitch_14 = ((uint8_t) 0x26) /*!< Analog switch 14 */ 00113 }RI_AnalogSwitch_TypeDef; 00114 00115 /** 00116 * @} 00117 */ 00118 00119 /** @defgroup RI_IO_Switch 00120 * @{ 00121 */ 00122 /** 00123 * @brief Definition of the I/O Switch to be controlled. 00124 * Values are coded in 0xXY format where 00125 * X: the register index (1: RI_IOSR1, 2: RI_IOSR2, 3: RI_IOSR3 or 4: RI_IOSR4) 00126 * Y: the bit index of the Input Output Switch in RI_IOSRx register 00127 */ 00128 typedef enum 00129 { 00130 RI_IOSwitch_1 = ((uint8_t) 0x10), /*!< Input Output Switch switch 1 */ 00131 RI_IOSwitch_2 = ((uint8_t) 0x20), /*!< Input Output Switch switch 2 */ 00132 RI_IOSwitch_3 = ((uint8_t) 0x30), /*!< Input Output Switch switch 3 */ 00133 RI_IOSwitch_4 = ((uint8_t) 0x11), /*!< Input Output Switch switch 4 */ 00134 RI_IOSwitch_5 = ((uint8_t) 0x21), /*!< Input Output Switch switch 4 */ 00135 RI_IOSwitch_6 = ((uint8_t) 0x31), /*!< Input Output Switch switch 6 */ 00136 RI_IOSwitch_7 = ((uint8_t) 0x12), /*!< Input Output Switch switch 7 */ 00137 RI_IOSwitch_8 = ((uint8_t) 0x22), /*!< Input Output Switch switch 8 */ 00138 RI_IOSwitch_9 = ((uint8_t) 0x32), /*!< Input Output Switch switch 9 */ 00139 RI_IOSwitch_10 = ((uint8_t) 0x13), /*!< Input Output Switch switch 10 */ 00140 RI_IOSwitch_11 = ((uint8_t) 0x23), /*!< Input Output Switch switch 11 */ 00141 RI_IOSwitch_12 = ((uint8_t) 0x33), /*!< Input Output Switch switch 12 */ 00142 RI_IOSwitch_13 = ((uint8_t) 0x14), /*!< Input Output Switch switch 13 */ 00143 RI_IOSwitch_14 = ((uint8_t) 0x24), /*!< Input Output Switch switch 14 */ 00144 RI_IOSwitch_15 = ((uint8_t) 0x34), /*!< Input Output Switch switch 15 */ 00145 RI_IOSwitch_16 = ((uint8_t) 0x15), /*!< Input Output Switch switch 16 */ 00146 RI_IOSwitch_17 = ((uint8_t) 0x25), /*!< Input Output Switch switch 17 */ 00147 RI_IOSwitch_18 = ((uint8_t) 0x35), /*!< Input Output Switch switch 18 */ 00148 RI_IOSwitch_19 = ((uint8_t) 0x16), /*!< Input Output Switch switch 19 */ 00149 RI_IOSwitch_20 = ((uint8_t) 0x26), /*!< Input Output Switch switch 20 */ 00150 RI_IOSwitch_21 = ((uint8_t) 0x36), /*!< Input Output Switch switch 21 */ 00151 RI_IOSwitch_22 = ((uint8_t) 0x17), /*!< Input Output Switch switch 22 */ 00152 RI_IOSwitch_23 = ((uint8_t) 0x27), /*!< Input Output Switch switch 23 */ 00153 RI_IOSwitch_24 = ((uint8_t) 0x37), /*!< Input Output Switch switch 24 */ 00154 RI_IOSwitch_26 = ((uint8_t) 0x41), /*!< Input Output Switch switch 26 */ 00155 RI_IOSwitch_27 = ((uint8_t) 0x46), /*!< Input Output Switch switch 27 */ 00156 RI_IOSwitch_28 = ((uint8_t) 0x47), /*!< Input Output Switch switch 28 */ 00157 RI_IOSwitch_29 = ((uint8_t) 0x40) /*!< Input Output Switch switch 29 */ 00158 }RI_IOSwitch_TypeDef; 00159 00160 /** 00161 * @} 00162 */ 00163 00164 /** @defgroup RI_Resistor 00165 * @{ 00166 */ 00167 /** 00168 * @brief Definition of the pull-up and pull-down resistors for COMP1 and ADC. 00169 */ 00170 typedef enum 00171 { 00172 RI_Resistor_10KPU = ((uint8_t) 0x01), 00173 RI_Resistor_400KPU = ((uint8_t) 0x02), 00174 RI_Resistor_10KPD = ((uint8_t) 0x04), 00175 RI_Resistor_400KPD = ((uint8_t) 0x08) 00176 }RI_Resistor_TypeDef; 00177 00178 /** 00179 * @} 00180 */ 00181 00182 /** @defgroup REMAP_Pin 00183 * @{ 00184 */ 00185 /** 00186 * @brief Definition of the REMAP pins. 00187 * Elements values convention: 0xXY 00188 * X = RMPCRx registers index 00189 * X = 0x01 : RMPCR1 00190 * X = 0x02 : RMPCR2 00191 * X = 0x03 : RMPCR3 00192 * Y = Mask for setting/resetting bits in RMPCRx register 00193 */ 00194 typedef enum 00195 { 00196 /* RMPCR1 register bits */ 00197 REMAP_Pin_USART1TxRxPortA = ((uint16_t)0x011C), /*!< USART1 Tx- Rx (PC3- PC2) remapping to PA2- PA3 */ 00198 REMAP_Pin_USART1TxRxPortC = ((uint16_t)0x012C), /*!< USART1 Tx- Rx (PC3- PC2) remapping to PC5- PC6 */ 00199 REMAP_Pin_USART1Clk = ((uint16_t)0x014B), /*!< USART1 CK (PC4) remapping to PA0 */ 00200 REMAP_Pin_SPI1Full = ((uint16_t)0x0187), /*!< SPI1 MISO- MOSI- SCK- NSS(PB7- PB6- PB5- PB4) 00201 remapping to PA2- PA3- PC6- PC5 */ 00202 /* RMPCR2 register bits */ 00203 REMAP_Pin_ADC1ExtTRIG1 = ((uint16_t)0x0201), /*!< ADC1 External Trigger 1 (PA6) remapping to PD0 */ 00204 REMAP_Pin_TIM2TRIGPortA = ((uint16_t)0x0202), /*!< TIM2 Trigger (PB3) remapping to PA4 */ 00205 REMAP_Pin_TIM3TRIGPortA = ((uint16_t)0x0204), /*!< TIM3 Trigger (PD1) remapping to PA5 */ 00206 REMAP_Pin_TIM2TRIGLSE = ((uint16_t)0x0208), /*!< TIM2 Trigger remapping to LSE */ 00207 REMAP_Pin_TIM3TRIGLSE = ((uint16_t)0x0210), /*!< TIM3 Trigger remapping to LSE */ 00208 REMAP_Pin_SPI2Full = ((uint16_t)0x0220), /*!< SPI2 MISO- MOSI- SCK- NSS(PG7- PG6- PG5- PG4) 00209 remapping to PI3- PI2- PI1- PI0 */ 00210 REMAP_Pin_TIM3TRIGPortG = ((uint16_t)0x0240), /*!< TIM3 Trigger (PD1) remapping to PG3 */ 00211 REMAP_Pin_TIM23BKIN = ((uint16_t)0x0280), /*!< TIM2 Break Input (PA4) remapping to PG0 00212 and TIM3 Break Input (PA5) remapping to PG1 */ 00213 /* RMPCR3 register bits */ 00214 REMAP_Pin_SPI1PortF = ((uint16_t)0x0301), /*!< SPI1 MISO- MOSI- SCK- NSS(PB7- PB6- PB5- PB4) 00215 remapping to PF0- PF1- PF2- PF3 */ 00216 REMAP_Pin_USART3TxRxPortF = ((uint16_t)0x0302), /*!< USART3 Tx- Rx (PG1- PG0) remapping to PF0- PF1 */ 00217 REMAP_Pin_USART3Clk = ((uint16_t)0x0304), /*!< USART3 CK (PG2) remapping to PF2 */ 00218 REMAP_Pin_TIM3Channel1 = ((uint16_t)0x0308), /*!< TIM3 Channel 1 (PB1) remapping to PI0 */ 00219 REMAP_Pin_TIM3Channel2 = ((uint16_t)0x0310), /*!< TIM3 Channel 2 (PD0) remapping to PI3 */ 00220 REMAP_Pin_CCO = ((uint16_t)0x0320), /*!< CCO (PC4) remapping to PE2 */ 00221 REMAP_Pin_TIM2Channel1 = ((uint16_t)0x0340), /*!< TIM2 Channel 1 (PB0) remapping to PC5 */ 00222 REMAP_Pin_TIM2Channel2 = ((uint16_t)0x0380) /*!< TIM2 Channel 2 (PB2) remapping to PC6 */ 00223 }REMAP_Pin_TypeDef; 00224 00225 /** 00226 * @} 00227 */ 00228 00229 /** @defgroup REMAP_DMA_Channel 00230 * @{ 00231 */ 00232 typedef enum 00233 { 00234 REMAP_DMA1Channel_ADC1ToChannel0 = ((uint8_t)0x00), /*!< ADC1 DMA1 req/ack mapped on DMA1 channel 0 */ 00235 REMAP_DMA1Channel_ADC1ToChannel1 = ((uint8_t)0x01), /*!< ADC1 DMA1 req/ack mapped on DMA1 channel 1 */ 00236 REMAP_DMA1Channel_ADC1ToChannel2 = ((uint8_t)0x02), /*!< ADC1 DMA1 req/ack mapped on DMA1 channel 2 */ 00237 REMAP_DMA1Channel_ADC1ToChannel3 = ((uint8_t)0x03), /*!< ADC1 DMA1 req/ack mapped on DMA1 channel 3 */ 00238 REMAP_DMA1Channel_TIM4ToChannel0 = ((uint8_t)0xF0), /*!< TIM4 DMA1 req/ack mapped on DMA1 channel 0 */ 00239 REMAP_DMA1Channel_TIM4ToChannel1 = ((uint8_t)0xF4), /*!< TIM4 DMA1 req/ack mapped on DMA1 channel 1 */ 00240 REMAP_DMA1Channel_TIM4ToChannel2 = ((uint8_t)0xF8), /*!< TIM4 DMA1 req/ack mapped on DMA1 channel 2 */ 00241 REMAP_DMA1Channel_TIM4ToChannel3 = ((uint8_t)0xFC) /*!< TIM4 DMA1 req/ack mapped on DMA1 channel 3 */ 00242 }REMAP_DMAChannel_TypeDef; 00243 00244 /** 00245 * @} 00246 */ 00247 00248 /** 00249 * @} 00250 */ 00251 /* Exported constants --------------------------------------------------------*/ 00252 /* Exported macros -----------------------------------------------------------*/ 00253 /** @defgroup SYSCFG_Exported_Macros 00254 * @{ 00255 */ 00256 00257 /** 00258 * @brief Macro used by the assert function in order to check the different 00259 * values of @ref RI_InputCaptureTypeDef enum. 00260 */ 00261 #define IS_RI_INPUTCAPTURE(RI_IC) (((RI_IC) == RI_InputCapture_IC2) || \ 00262 ((RI_IC) == RI_InputCapture_IC3)) 00263 00264 /** 00265 * @brief Macro used by the assert function in order to check the different 00266 * values of @ref RI_InputCaptureRoutingTypeDef enum. 00267 */ 00268 #define IS_RI_INPUTCAPTUREROUTING(RI_IC_ROUTING) (((RI_IC_ROUTING) == RI_InputCaptureRouting_0) || \ 00269 ((RI_IC_ROUTING) == RI_InputCaptureRouting_1) || \ 00270 ((RI_IC_ROUTING) == RI_InputCaptureRouting_2) || \ 00271 ((RI_IC_ROUTING) == RI_InputCaptureRouting_3) || \ 00272 ((RI_IC_ROUTING) == RI_InputCaptureRouting_4) || \ 00273 ((RI_IC_ROUTING) == RI_InputCaptureRouting_5) || \ 00274 ((RI_IC_ROUTING) == RI_InputCaptureRouting_6) || \ 00275 ((RI_IC_ROUTING) == RI_InputCaptureRouting_7) || \ 00276 ((RI_IC_ROUTING) == RI_InputCaptureRouting_8) || \ 00277 ((RI_IC_ROUTING) == RI_InputCaptureRouting_9) || \ 00278 ((RI_IC_ROUTING) == RI_InputCaptureRouting_10) || \ 00279 ((RI_IC_ROUTING) == RI_InputCaptureRouting_11) || \ 00280 ((RI_IC_ROUTING) == RI_InputCaptureRouting_12) || \ 00281 ((RI_IC_ROUTING) == RI_InputCaptureRouting_13) || \ 00282 ((RI_IC_ROUTING) == RI_InputCaptureRouting_14) || \ 00283 ((RI_IC_ROUTING) == RI_InputCaptureRouting_15) || \ 00284 ((RI_IC_ROUTING) == RI_InputCaptureRouting_16) || \ 00285 ((RI_IC_ROUTING) == RI_InputCaptureRouting_17) || \ 00286 ((RI_IC_ROUTING) == RI_InputCaptureRouting_18) || \ 00287 ((RI_IC_ROUTING) == RI_InputCaptureRouting_19) || \ 00288 ((RI_IC_ROUTING) == RI_InputCaptureRouting_20) || \ 00289 ((RI_IC_ROUTING) == RI_InputCaptureRouting_21) || \ 00290 ((RI_IC_ROUTING) == RI_InputCaptureRouting_22)) 00291 00292 /** 00293 * @brief Macro used by the assert function in order to check the different 00294 * values of @ref RI_AnalogSwitch_TypeDef enum. 00295 */ 00296 #define IS_RI_ANALOGSWITCH(RI_ANALOGSWITCH) (((RI_ANALOGSWITCH) == RI_AnalogSwitch_0) || \ 00297 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_1) || \ 00298 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_2) || \ 00299 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_3) || \ 00300 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_4) || \ 00301 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_5) || \ 00302 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_6) || \ 00303 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_7) || \ 00304 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_8) || \ 00305 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_9) || \ 00306 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_10)|| \ 00307 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_11)|| \ 00308 ((RI_ANALOGSWITCH) == RI_AnalogSwitch_14)) 00309 00310 /** 00311 * @brief Macro used by the assert function in order to check the different 00312 * values of @ref RI_IOSwitch_TypeDef enum. 00313 */ 00314 #define IS_RI_IOSWITCH(RI_IOSWITCH) (((RI_IOSWITCH) == RI_IOSwitch_1) || \ 00315 ((RI_IOSWITCH) == RI_IOSwitch_2) || \ 00316 ((RI_IOSWITCH) == RI_IOSwitch_3) || \ 00317 ((RI_IOSWITCH) == RI_IOSwitch_4) || \ 00318 ((RI_IOSWITCH) == RI_IOSwitch_5) || \ 00319 ((RI_IOSWITCH) == RI_IOSwitch_6) || \ 00320 ((RI_IOSWITCH) == RI_IOSwitch_7) || \ 00321 ((RI_IOSWITCH) == RI_IOSwitch_8) || \ 00322 ((RI_IOSWITCH) == RI_IOSwitch_9) || \ 00323 ((RI_IOSWITCH) == RI_IOSwitch_10) || \ 00324 ((RI_IOSWITCH) == RI_IOSwitch_11) || \ 00325 ((RI_IOSWITCH) == RI_IOSwitch_12) || \ 00326 ((RI_IOSWITCH) == RI_IOSwitch_13) || \ 00327 ((RI_IOSWITCH) == RI_IOSwitch_14) || \ 00328 ((RI_IOSWITCH) == RI_IOSwitch_15) || \ 00329 ((RI_IOSWITCH) == RI_IOSwitch_16) || \ 00330 ((RI_IOSWITCH) == RI_IOSwitch_17) || \ 00331 ((RI_IOSWITCH) == RI_IOSwitch_18) || \ 00332 ((RI_IOSWITCH) == RI_IOSwitch_19) || \ 00333 ((RI_IOSWITCH) == RI_IOSwitch_20) || \ 00334 ((RI_IOSWITCH) == RI_IOSwitch_21) || \ 00335 ((RI_IOSWITCH) == RI_IOSwitch_22) || \ 00336 ((RI_IOSWITCH) == RI_IOSwitch_23) || \ 00337 ((RI_IOSWITCH) == RI_IOSwitch_24) || \ 00338 ((RI_IOSWITCH) == RI_IOSwitch_26) || \ 00339 ((RI_IOSWITCH) == RI_IOSwitch_27) || \ 00340 ((RI_IOSWITCH) == RI_IOSwitch_28) || \ 00341 ((RI_IOSWITCH) == RI_IOSwitch_29)) 00342 00343 /** 00344 * @brief Macro used by the assert function in order to check the different 00345 * values of @ref RI_ResistorTypeDef enum. 00346 */ 00347 #define IS_RI_RESISTOR(RI_RESISTOR) (((RI_RESISTOR) == RI_Resistor_10KPU) || \ 00348 ((RI_RESISTOR) == RI_Resistor_400KPU) || \ 00349 ((RI_RESISTOR) == RI_Resistor_10KPD) || \ 00350 ((RI_RESISTOR) == RI_Resistor_400KPD)) 00351 /** 00352 * @brief Macro used by the assert function in order to check the different 00353 * values of @ref REMAP_Pin_TypeDef enum. 00354 */ 00355 #define IS_REMAP_PIN(PIN) (((PIN) == REMAP_Pin_USART1TxRxPortA) || \ 00356 ((PIN) == REMAP_Pin_USART1TxRxPortC) || \ 00357 ((PIN) == REMAP_Pin_USART1Clk) || \ 00358 ((PIN) == REMAP_Pin_SPI1Full) || \ 00359 ((PIN) == REMAP_Pin_ADC1ExtTRIG1) || \ 00360 ((PIN) == REMAP_Pin_TIM2TRIGPortA) || \ 00361 ((PIN) == REMAP_Pin_TIM3TRIGPortA) || \ 00362 ((PIN) == REMAP_Pin_TIM2TRIGLSE) || \ 00363 ((PIN) == REMAP_Pin_TIM3TRIGLSE) || \ 00364 ((PIN) == REMAP_Pin_SPI2Full) || \ 00365 ((PIN) == REMAP_Pin_TIM3TRIGPortG) || \ 00366 ((PIN) == REMAP_Pin_TIM23BKIN) || \ 00367 ((PIN) == REMAP_Pin_SPI1PortF) || \ 00368 ((PIN) == REMAP_Pin_USART3TxRxPortF) || \ 00369 ((PIN) == REMAP_Pin_USART3Clk) || \ 00370 ((PIN) == REMAP_Pin_TIM3Channel1) || \ 00371 ((PIN) == REMAP_Pin_TIM3Channel2) || \ 00372 ((PIN) == REMAP_Pin_CCO) || \ 00373 ((PIN) == REMAP_Pin_TIM2Channel1) || \ 00374 ((PIN) == REMAP_Pin_TIM2Channel2)) 00375 00376 00377 /** 00378 * @brief Macro used by the assert function in order to check the different 00379 * values of the @ref REMAP_DMAChannel_TypeDef enum. 00380 */ 00381 #define IS_REMAP_DMACHANNEL(MAP) (((MAP) == REMAP_DMA1Channel_ADC1ToChannel0) || \ 00382 ((MAP) == REMAP_DMA1Channel_ADC1ToChannel1) || \ 00383 ((MAP) == REMAP_DMA1Channel_ADC1ToChannel2) || \ 00384 ((MAP) == REMAP_DMA1Channel_ADC1ToChannel3) || \ 00385 ((MAP) == REMAP_DMA1Channel_TIM4ToChannel0) || \ 00386 ((MAP) == REMAP_DMA1Channel_TIM4ToChannel1) || \ 00387 ((MAP) == REMAP_DMA1Channel_TIM4ToChannel2) || \ 00388 ((MAP) == REMAP_DMA1Channel_TIM4ToChannel3)) 00389 /** 00390 * @} 00391 */ 00392 00393 /* Exported functions ------------------------------------------------------- */ 00394 /* Routing Interface (RI) configuration ***************************************/ 00395 void SYSCFG_RIDeInit(void); 00396 void SYSCFG_RITIMInputCaptureConfig(RI_InputCapture_TypeDef RI_InputCapture, 00397 RI_InputCaptureRouting_TypeDef RI_InputCaptureRouting); 00398 void SYSCFG_RIAnalogSwitchConfig(RI_AnalogSwitch_TypeDef RI_AnalogSwitch, 00399 FunctionalState NewState); 00400 void SYSCFG_RIIOSwitchConfig(RI_IOSwitch_TypeDef RI_IOSwitch, FunctionalState NewState); 00401 void SYSCFG_RIResistorConfig(RI_Resistor_TypeDef RI_Resistor, FunctionalState NewState); 00402 00403 /* SYSCFG configuration *******************************************************/ 00404 void SYSCFG_REMAPDeInit(void); 00405 void SYSCFG_REMAPPinConfig(REMAP_Pin_TypeDef REMAP_Pin, FunctionalState NewState); 00406 void SYSCFG_REMAPDMAChannelConfig(REMAP_DMAChannel_TypeDef REMAP_DMAChannel); 00407 00408 #endif /* __STM8L15x_SYSCFG_H */ 00409 00410 /** 00411 * @} 00412 */ 00413 00414 /** 00415 * @} 00416 */ 00417 00418 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/