STM32L4R9I_EVAL BSP User Manual
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Defines | |
#define | SRAM_OK 0x00 |
SRAM status structure definition. | |
#define | SRAM_ERROR 0x01 |
#define | SRAM_DEVICE_ADDR ((uint32_t)0x60000000) |
#define | SRAM_DEVICE_SIZE ((uint32_t)0x200000) /* SRAM device size : 1024 words of 16-bits */ |
#define | SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_16 |
#define | SRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_DISABLE |
#define | SRAM_WRITEBURST FMC_WRITE_BURST_DISABLE |
#define | SRAM_DMAx_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE |
#define | SRAM_DMAx_CHANNEL DMA1_Channel1 |
#define | SRAM_DMAx_IRQn DMA1_Channel1_IRQn |
#define | SRAM_DMAx_IRQHandler DMA1_Channel1_IRQHandler |
Define Documentation
#define SRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_DISABLE |
Definition at line 78 of file stm32l4r9i_eval_sram.h.
#define SRAM_DEVICE_ADDR ((uint32_t)0x60000000) |
Definition at line 73 of file stm32l4r9i_eval_sram.h.
#define SRAM_DEVICE_SIZE ((uint32_t)0x200000) /* SRAM device size : 1024 words of 16-bits */ |
Definition at line 74 of file stm32l4r9i_eval_sram.h.
#define SRAM_DMAx_CHANNEL DMA1_Channel1 |
Definition at line 84 of file stm32l4r9i_eval_sram.h.
Referenced by SRAM_MspInit().
#define SRAM_DMAx_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE |
Definition at line 83 of file stm32l4r9i_eval_sram.h.
Referenced by SRAM_MspInit().
#define SRAM_DMAx_IRQHandler DMA1_Channel1_IRQHandler |
Definition at line 86 of file stm32l4r9i_eval_sram.h.
#define SRAM_DMAx_IRQn DMA1_Channel1_IRQn |
Definition at line 85 of file stm32l4r9i_eval_sram.h.
Referenced by SRAM_MspInit().
#define SRAM_ERROR 0x01 |
Definition at line 71 of file stm32l4r9i_eval_sram.h.
Referenced by BSP_SRAM_Init(), BSP_SRAM_ReadData(), BSP_SRAM_ReadData_DMA(), BSP_SRAM_WriteData(), and BSP_SRAM_WriteData_DMA().
#define SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_16 |
Definition at line 76 of file stm32l4r9i_eval_sram.h.
#define SRAM_OK 0x00 |
SRAM status structure definition.
Definition at line 70 of file stm32l4r9i_eval_sram.h.
Referenced by BSP_SRAM_Init(), BSP_SRAM_ReadData(), BSP_SRAM_ReadData_DMA(), BSP_SRAM_WriteData(), and BSP_SRAM_WriteData_DMA().
#define SRAM_WRITEBURST FMC_WRITE_BURST_DISABLE |
Definition at line 80 of file stm32l4r9i_eval_sram.h.
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