STM32L4R9I_EVAL BSP User Manual: stm32l4r9i_eval_sram.h Source File

STM32L4R9I_EVAL BSP

stm32l4r9i_eval_sram.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4r9i_eval_sram.h
00004   * @author  MCD Application Team
00005   * @brief   This file contains the common defines and functions prototypes for
00006   *          the stm32l4r9i_eval_sram.c driver.
00007   ******************************************************************************
00008   * @attention
00009   *
00010   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00011   *
00012   * Redistribution and use in source and binary forms, with or without modification,
00013   * are permitted provided that the following conditions are met:
00014   *   1. Redistributions of source code must retain the above copyright notice,
00015   *      this list of conditions and the following disclaimer.
00016   *   2. Redistributions in binary form must reproduce the above copyright notice,
00017   *      this list of conditions and the following disclaimer in the documentation
00018   *      and/or other materials provided with the distribution.
00019   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00020   *      may be used to endorse or promote products derived from this software
00021   *      without specific prior written permission.
00022   *
00023   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00024   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00025   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00026   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00027   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00028   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00029   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00030   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00031   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00032   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00033   *
00034   ******************************************************************************
00035   */
00036 
00037 /** @addtogroup BSP
00038   * @{
00039   */
00040 
00041 /** @addtogroup STM32L4R9I_EVAL
00042   * @{
00043   */
00044 
00045 /* Define to prevent recursive inclusion -------------------------------------*/
00046 #ifndef __STM32L4R9I_EVAL_SRAM_H
00047 #define __STM32L4R9I_EVAL_SRAM_H
00048 
00049 #ifdef __cplusplus
00050  extern "C" {
00051 #endif
00052 
00053 /* Includes ------------------------------------------------------------------*/
00054 #include "stm32l4xx_hal.h"
00055 
00056 /** @addtogroup STM32L4R9I_EVAL_SRAM
00057   * @{
00058   */
00059 
00060 
00061 /* Exported constants --------------------------------------------------------*/
00062 
00063 /** @defgroup STM32L4R9I_EVAL_SRAM_Exported_Constants Exported Constants
00064   * @{
00065   */
00066 
00067 /**
00068   * @brief  SRAM status structure definition
00069   */
00070 #define SRAM_OK              0x00
00071 #define SRAM_ERROR           0x01
00072 
00073 #define SRAM_DEVICE_ADDR     ((uint32_t)0x60000000)
00074 #define SRAM_DEVICE_SIZE     ((uint32_t)0x200000)  /* SRAM device size : 1024 words of 16-bits */
00075 
00076 #define SRAM_MEMORY_WIDTH    FMC_NORSRAM_MEM_BUS_WIDTH_16
00077 
00078 #define SRAM_BURSTACCESS     FMC_BURST_ACCESS_MODE_DISABLE
00079 
00080 #define SRAM_WRITEBURST      FMC_WRITE_BURST_DISABLE
00081 
00082 /* DMA definitions for SRAM DMA transfer */
00083 #define SRAM_DMAx_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
00084 #define SRAM_DMAx_CHANNEL    DMA1_Channel1
00085 #define SRAM_DMAx_IRQn       DMA1_Channel1_IRQn
00086 #define SRAM_DMAx_IRQHandler DMA1_Channel1_IRQHandler
00087 
00088 /**
00089   * @}
00090   */
00091 
00092 
00093 /* Exported functions --------------------------------------------------------*/
00094 
00095 /** @addtogroup STM32L4R9I_EVAL_SRAM_Exported_Functions
00096   * @{
00097   */
00098 uint8_t BSP_SRAM_Init(void);
00099 uint8_t BSP_SRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00100 uint8_t BSP_SRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00101 uint8_t BSP_SRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00102 uint8_t BSP_SRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00103 void BSP_SRAM_DMA_IRQHandler(void);
00104 
00105 /**
00106   * @}
00107   */
00108 
00109 /**
00110   * @}
00111   */
00112 
00113 #ifdef __cplusplus
00114 }
00115 #endif
00116 
00117 #endif /* __STM32L4R9I_EVAL_SRAM_H */
00118 
00119 /**
00120   * @}
00121   */
00122 
00123 /**
00124   * @}
00125   */
00126 
00127 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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