NI-TClk
Synchronization Repeatability Optimization

Every call to the niTClk Synchronize VI or niTClk_Synchronize function causes NI-TClk to measure the time between the Sync Pulse Clock and TClk. The imprecision associated with this measurement is usually very small relative to the TClk timebase. NI-TClk adjusts TClks and TClk timebases on the devices based on the measurement. Some devices can adjust their TClk timebases with very fine resolution, usually using an oscillator phase DAC and a Phase Locked Loop (PLL). These devices will appear to have synchronization jitter from repeated calls to the niTClk Synchronize VI or niTClk_Synchronize function.

You can eliminate the jitter associated with TClk measurements for most devices by setting the oscillator phase DAC value directly through the individual product drivers as follows:

1. Configure the devices for acquisition or generation synchronized with NI-TClk.
2. After the acquisition or generation is completed, but before you call Close on the product driver, read the oscillator phase DAC attribute using the individual product drivers for each synchronized device.
3. Store these values.
4. Before running the program again, change the program to set the phase DAC attributes to the stored values using the individual product drivers for each synchronized device before calling the niTClk Synchronize VI or the niTClk_Synchronize function.

When you follow this procedure, NI-TClk adjusts TClks but not TClk timebases on the synchronized devices, and the synchronization jitter is minimized.