flex_configure_pwm_output |
Configure PWM Output
Usage
status = flex_configure_pwm_output(u8 boardID, u8 PWMOutput, u16 enable, u16 clock);
Purpose
Enables and disables PWM outputs, and sets the PWM clock frequency.
Parameters
Name | Type | Description |
---|---|---|
boardID | u8 | assigned by Measurement & Automation Explorer (MAX) |
PWMOutput | u8 | PWM Output |
enable | u16 | enable/disable for PWM Output |
clock | u16 | clock selector |
Parameter Discussion
PWMOutput selects the PWM Output to configure (1 or 2).
enable enables or disables the specified PWM Output. When enabled, the clock parameter determines the clock frequency used for the PWM output.
1 = enabled
0 = disabled
clock specifies the clock frequency for the PWM output. The base clock frequency for the PWM outputs is 24.81 MHz on the 7340 and 7330 controllers, 24.58 MHz on the 7350 controller, and 20.48 on 7334/42/44 controllers. This base clock frequency is divided down depending on the clock value selected. The following table lists the PWM clock frequency settings:
Clock Divider Value | 7334/42/44 Frequency | 7330/40 Frequency | 7350 Frequency | PWM Frequency Scales Constant |
---|---|---|---|---|
512 | 40.00 kHz | 48.46 kHz | 48.01 kHz | NIMC_PWM_FREQ_SCALE_512 (0) |
1K | 20.00 kHz | 24.23 kHz | 24.00 kHz | NIMC_PWM_FREQ_SCALE_1K (1) |
2K | 10.00 kHz | 12.11 kHz | 12.00 kHz | NIMC_PWM_FREQ_SCALE_2K (2) |
4K | 5.00 kHz | 6.06 kHz | 6.00 kHz | NIMC_PWM_FREQ_SCALE_4K (3) |
8K | 2.50 kHz | 3.03 kHz | 3.00 kHz | NIMC_PWM_FREQ_SCALE_8K (4) |
16K | 1.25 kHz | 1.51 kHz | 1.50 kHz | NIMC_PWM_FREQ_SCALE_16K (5) |
33K | 625.00 Hz | 757.14 Hz | 750.09 Hz | NIMC_PWM_FREQ_SCALE_33K (6) |
External Clock/ 256 Hz | External Clock/ 256 Hz | External Clock/ 256 Hz | External Clock/ 256 Hz | NIMC_PWM_FREQ_EXT_CLK_256 (7) |
65K | 312.50 Hz | 378.57 Hz | 375.05 Hz | NIMC_PWM_FREQ_SCALE_65K (8) |
131K | 156.25 Hz | 189.29 Hz | 187.52 Hz | NIMC_PWM_FREQ_SCALE_131K (9) |
262K | 78.13 Hz | 94.64 Hz | 93.76 Hz | NIMC_PWM_FREQ_SCALE_262K (10) |
524K | 39.06 Hz | 47.32 Hz | 46.88 Hz | NIMC_PWM_FREQ_SCALE_524K (11) |
1048K | 19.53 Hz | 23.66 Hz | 23.44 Hz | NIMC_PWM_FREQ_SCALE_1048K (12) |
2097K | 9.77 Hz | 11.83 Hz | 11.72 Hz | NIMC_PWM_FREQ_SCALE_2097K (13) |
4194K | 4.88 Hz | 5.92 Hz | 5.86 Hz | NIMC_PWM_FREQ_SCALE_4194K (14) |
External Clock/ 32,768 Hz | External Clock/ 32,768 Hz | External Clock/ 32,768 Hz | External Clock/ 32,768 Hz | NIMC_PWM_FREQ_EXT_CLK_33K (15) |
Using This Function
The PWM outputs on the NI motion controller are digital pulse-train outputs that have a frequency specified by the clock parameter of this function and a duty cycle specified by the Load PWM Duty Cycle function. These outputs can be used to control devices that require a PWM input, such as a laser whose intensity is controlled by a PWM signal, or can be used to generate isolated analog outputs by passing the PWM output through an optocoupler, and then filtering the digital pulse train to produce an analog output voltage.
When you configure a PWM output, the clock frequency applies to both PWM outputs. If you configure one PWM output for a clock value of 3, and then the second PWM output for a clock value of 4, the value of 4 applies to both PWM outputs.
The only exception is when the clock settings for the two PWM outputs are 0 and 8, 1 and 9, 2 and 10, and so on, in which case each output has a different frequency. This is because clock values 0–7 and 8–15 are paired. Clock values 0 and 8 use the common time base of 10.24 MHz (12.8 MHz on the 7350). The frequency of clock value 0 is found by dividing the time base by 256, while clock value 8 is found by dividing the time base by 32768. If you have an NI 7344 controller and you switch channel B to clock value 10, the time base changes to 2.56 MHz. This change also switches channel A to 2.56/256 = 10 kHz. Therefore, if the value in one set changes, it switches the other channel to the pairing clock value. If the two values are in the same group, the two channels have the same frequency.
To use an external clock (clock values of 7 or 15), connect the external clock signal to the PCLK input on the Digital I/O connector.