STM32L4R9I_EVAL BSP User Manual: stm32l4r9i_eval_nor.h Source File

STM32L4R9I_EVAL BSP

stm32l4r9i_eval_nor.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4r9i_eval_nor.h
00004   * @author  MCD Application Team
00005   * @brief   This file contains the common defines and functions prototypes for
00006   *          the stm32l4r9i_eval_nor.c driver.
00007   ******************************************************************************
00008   * @attention
00009   *
00010   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00011   *
00012   * Redistribution and use in source and binary forms, with or without modification,
00013   * are permitted provided that the following conditions are met:
00014   *   1. Redistributions of source code must retain the above copyright notice,
00015   *      this list of conditions and the following disclaimer.
00016   *   2. Redistributions in binary form must reproduce the above copyright notice,
00017   *      this list of conditions and the following disclaimer in the documentation
00018   *      and/or other materials provided with the distribution.
00019   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00020   *      may be used to endorse or promote products derived from this software
00021   *      without specific prior written permission.
00022   *
00023   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00024   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00025   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00026   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00027   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00028   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00029   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00030   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00031   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00032   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00033   *
00034   ******************************************************************************
00035   */
00036 
00037 /** @addtogroup BSP
00038   * @{
00039   */
00040 
00041 /** @addtogroup STM32L4R9I_EVAL
00042   * @{
00043   */
00044 
00045 /* Define to prevent recursive inclusion -------------------------------------*/
00046 #ifndef __STM32L4R9I_EVAL_NOR_H
00047 #define __STM32L4R9I_EVAL_NOR_H
00048 
00049 #ifdef __cplusplus
00050  extern "C" {
00051 #endif
00052 
00053 /* Includes ------------------------------------------------------------------*/
00054 #include "stm32l4xx_hal.h"
00055 
00056 /** @addtogroup STM32L4R9I_EVAL_NOR
00057   * @{
00058   */
00059 
00060 
00061 /* Exported constants --------------------------------------------------------*/
00062 /** @defgroup STM32L4R9I_EVAL_NOR_Exported_Constants Exported Constants
00063   * @{
00064   */
00065 
00066 /**
00067   * @brief  NOR status structure definition
00068   */
00069 #define NOR_STATUS_OK           0x00
00070 #define NOR_STATUS_ERROR        0x01
00071 
00072 #define NOR_DEVICE_ADDR         ((uint32_t)0x68000000)
00073 
00074 #define NOR_MEMORY_WIDTH        FMC_NORSRAM_MEM_BUS_WIDTH_16
00075 
00076 #define NOR_BURSTACCESS         FMC_BURST_ACCESS_MODE_DISABLE
00077 
00078 #define NOR_WRITEBURST          FMC_WRITE_BURST_DISABLE
00079 
00080 /* NOR operations Timeout definitions */
00081 #define BLOCKERASE_TIMEOUT      2000U  /* NOR block erase timeout : 2 s */
00082 #define CHIPERASE_TIMEOUT       400000U  /* NOR chip erase timeout : 400 s */
00083 #define PROGRAM_TIMEOUT         13U  /* NOR program timeout : 64 bytes * 200 us = 12.8 ms */
00084 
00085 /* NOR Ready/Busy signal GPIO definitions */
00086 #define NOR_READY_BUSY_PIN      GPIO_PIN_6
00087 #define NOR_READY_BUSY_GPIO     GPIOD
00088 #define NOR_READY_STATE         GPIO_PIN_SET
00089 #define NOR_BUSY_STATE          GPIO_PIN_RESET
00090 
00091 /**
00092   * @}
00093   */
00094 
00095 
00096 /* Exported functions --------------------------------------------------------*/
00097 
00098 /** @addtogroup STM32L4R9I_EVAL_NOR_Exported_Functions
00099   * @{
00100   */
00101 uint8_t BSP_NOR_Init(void);
00102 uint8_t BSP_NOR_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00103 uint8_t BSP_NOR_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00104 uint8_t BSP_NOR_ProgramData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00105 uint8_t BSP_NOR_Erase_Block(uint32_t BlockAddress);
00106 uint8_t BSP_NOR_Erase_Chip(void);
00107 uint8_t BSP_NOR_Read_ID(NOR_IDTypeDef *pNOR_ID);
00108 void    BSP_NOR_ReturnToReadMode(void);
00109 
00110 /**
00111   * @}
00112   */
00113 
00114 /**
00115   * @}
00116   */
00117 
00118 #ifdef __cplusplus
00119 }
00120 #endif
00121 
00122 #endif /* __STM32L4R9I_EVAL_NOR_H */
00123 /**
00124   * @}
00125   */
00126 
00127 /**
00128   * @}
00129   */
00130 
00131 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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