GD32F10x USB-Device: E:/USB Libraries/GD32_USB_Device_Driver/src/usb_core.c Source File

GD32F103 Firmware

usb_core.c
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1 
11 /* Includes ------------------------------------------------------------------*/
12 #include "usb_core.h"
13 
29 uint32_t InterruptMask = 0;
30 
44 void DR_Init (void)
45 {
46  /* Just reset the CLOSE bit */
47  _SetCTLR(CTLR_SETRST);
48 
49  /* May be need wait some time(tSTARTUP) ... */
50 
51  /* Clear SETRST bit in CTLR register */
52  _SetCTLR(0);
53 
54  /* Clear all pending interrupts */
55  _SetIFR(0);
56 
57  /* Set allocation buffer address */
58  _SetBAR(BUFFER_ADDRESS);
59 
60  InterruptMask = IER_MASK;
61 
62  /* Enable all interrupts mask bits */
63  _SetCTLR(InterruptMask);
64 }
65 
71 void DR_StopDevice (void)
72 {
73  /* Disable all interrupts and set USB reset */
74  _SetCTLR(CTLR_SETRST);
75 
76  /* Clear all interrupt flags */
77  _SetIFR(0);
78 
79  /* Close device */
80  _SetCTLR(CTLR_SETRST | CTLR_CLOSE);
81 }
82 
99  uint8_t EpAddr,
100  uint8_t EpKind,
101  uint32_t BufAddr)
102 
103 {
104  USB_EP *ep;
105  uint8_t EpID = EpAddr & 0x7F;
106 
107  if (EpAddr >> 7)
108  {
109  /* Get an IN endpoint */
110  ep = &pudev->dev.in_ep[EpID];
111  }
112  else
113  {
114  /* Get a OUT endpoint */
115  ep = &pudev->dev.out_ep[EpID];
116  }
117 
118  if (EpKind == USB_SNG_BUFTYPE)
119  {
120  /* Endpoint is single buffer kind */
121  ep->is_dblbuf = 0;
122 
123  /* Configure the buffer address */
124  ep->bufaddress = (uint16_t)BufAddr;
125  }
126  else if(EpKind == USB_DBL_BUFTYPE)
127  {
128  /* Endpoint is double buffer kind */
129  ep->is_dblbuf = 1;
130 
131  /* Get the buffer0 and buffer1 address */
132  ep->buf0addr = BufAddr & 0xFFFF;
133  ep->buf1addr = (BufAddr & 0xFFFF0000) >> 16;
134 
135  /* Set the endpoint kind as double buffer */
136  _SetEPDoubleBuff(EpID);
137 
138  /* Set buffer address for double buffered endpoint */
139  _SetEPDblBufAddr(EpID, ep->buf0addr, ep->buf1addr);
140  }
141 }
142 
143 
153  uint8_t EpAddr,
154  uint8_t EpType,
155  uint16_t EpMps)
156 {
157  USB_EP *ep;
158  uint8_t EpID = EpAddr & 0x7F;
159 
160  /* Set the endpoint type */
161  switch (EpType)
162  {
163  case USB_EPTYPE_CONTROL:
164  _SetEPType(EpID, EP_CONTROL);
165  break;
166 
167  case USB_EPTYPE_BULK:
168  _SetEPType(EpID, EP_BULK);
169  break;
170 
171  case USB_EPTYPE_INT:
172  _SetEPType(EpID, EP_INTERRUPT);
173  break;
174 
175  case USB_EPTYPE_ISOC:
176  _SetEPType(EpID, EP_ISO);
177  break;
178  }
179 
180  if (EpAddr >> 7)
181  {
182  ep = &pudev->dev.in_ep[EpID];
183 
184  /* Initialize the transmit endpoint data toggle bit */
185  _ClearDTG_TX(EpID);
186 
187  if(ep->is_dblbuf == 0)
188  {
189  /* Set the endpoint transmit buffer address */
190  _SetEPTxAddr(EpID, ep->bufaddress);
191 
192  /* Configure the endpoint status as NAK status */
193  _SetEPTxStatus(EpID, EPTX_NAK);
194 
195  /* Control endpoint need toggle data toggle bit */
196  if(EpID == 0) _ToggleDTG_TX(EpID);
197  }
198  else
199  {
200  /* Clear another direction data toggle bit when use double buffer */
201  _ClearDTG_RX(EpID);
202 
203  /* Configure the double buffer endpoint status */
205  _SetEPTxStatus(EpID, EPTX_VALID);
206  }
207  }
208  else
209  {
210  ep = &pudev->dev.out_ep[EpID];
211 
212  _ClearDTG_RX(EpID);
213 
214  if(ep->is_dblbuf == 0)
215  {
216  /*Set the endpoint receive buffer address */
217  _SetEPRxAddr(EpID, ep->bufaddress);
218 
219  /* Configure the endpoint status as NAK */
220  _SetEPRxStatus(EpID, EPRX_NAK);
221  }
222  else
223  {
224  _ClearDTG_TX(EpID);
225 
226  /* Toggle the SW_BUF bit(TX data toggle bit) */
227  _ToggleDTG_TX(EpID);
228 
229  /* Configure the endpoint status as DISABLED in two direction */
232  }
233  }
234 
235  /* Initialize the basic parameters */
236  ep->maxpacket = EpMps;
237  ep->is_stall = 0;
238 
239  /* Initialize the transaction level parameters */
240  ep->xfer_buf = 0;
241  ep->xfer_len = 0;
242  ep->xfer_count = 0;
243 }
244 
251 void USB_EP_DeInit (USB_CORE_HANDLE *pudev, uint8_t EpAddr)
252 {
253  USB_EP *ep;
254  uint8_t EpID = EpAddr & 0x7F;
255 
256  if (EpAddr >> 7)
257  {
258  ep = &pudev->dev.in_ep[EpID];
259 
260  _ClearDTG_TX(EpID);
261 
262  if(ep->is_dblbuf != 0)
263  {
264  /* Clear the data toggle bits of the endpoint */
265  _ClearDTG_RX(EpID);
266 
267  /* Reset value of the data toggle bits for the endpoint IN */
268  _ToggleDTG_TX(EpID);
269 
270  /* Configure the endpoint status as DISABLED */
272  }
273 
274  /* Configure the endpoint status as DISABLED */
276  }
277  else
278  {
279  ep = &pudev->dev.out_ep[EpID];
280 
281  _ClearDTG_RX(EpID);
282 
283  if(ep->is_dblbuf != 0)
284  {
285  /* Clear the data toggle bits of the endpoint */
286  _ClearDTG_TX(EpID);
287 
288  /* Reset value of the data toggle bits for the endpoint OUT */
289  _ToggleDTG_RX(EpID);
290 
291  /* Configure the endpoint status as DISABLED */
293  }
294 
295  /* Configure the endpoint status as DISABLED */
297  }
298 }
299 
300 
310  uint8_t EpAddr,
311  uint8_t *pbuf,
312  uint16_t BufLen)
313 {
314  USB_EP *ep;
315  uint8_t EpID = EpAddr & 0x7F;
316 
317  ep = &pudev->dev.out_ep[EpID];
318 
319  /* Configure the transaction level parameters */
320  ep->xfer_buf = pbuf;
321  ep->xfer_len = BufLen;
322 
323  if (ep->is_dblbuf == 0)
324  {
325  /* Set receive buffer byte count */
326  _SetEPRxCount(EpID, ep->maxpacket);
327  }
328  else
329  {
330  /* Set the double buffer receive byte count */
331  _SetEPDblBuffCount(EpID, DBUF_EP_OUT, ep->maxpacket);
332  }
333 
334  /* Enable endpoint to receive */
335  _SetEPRxStatus(EpID, EPRX_VALID);
336 }
337 
347  uint8_t EpAddr,
348  uint8_t *pbuf,
349  uint16_t BufLen)
350 {
351  USB_EP *ep;
352  __IO uint32_t len = 0;
353  uint8_t EpID = EpAddr & 0x7F;
354 
355  ep = &pudev->dev.in_ep[EpID];
356 
357  /* Configure the transaction level parameters */
358  ep->xfer_buf = pbuf;
359  ep->xfer_len = BufLen;
360  ep->xfer_count = 0;
361 
362  /* Transmit length is more than one packet */
363  if (ep->xfer_len > ep->maxpacket)
364  {
365  len = ep->maxpacket;
366  }
367  else
368  {
369  len = ep->xfer_len;
370  }
371 
372  if (ep->is_dblbuf == 0)
373  {
374  UserCopyToBuffer(ep->xfer_buf, ep->bufaddress, len);
375  _SetEPTxCount(EpID, len);
376  }
377  else
378  {
379  /* Set the Double buffer counter */
380  _SetEPDblBuffCount(EpID, DBUF_EP_IN, len);
381 
382  /* Copy the data to the double buffered endpoint buffer */
383  if (_GetEPxCSR(EpID) & EPTX_DTG)
384  {
385  UserCopyToBuffer(ep->xfer_buf, ep->buf1addr, len);
386  }
387  else
388  {
389  UserCopyToBuffer(ep->xfer_buf, ep->buf0addr, len);
390  }
391 
392  FreeUserBuffer(EpID, DBUF_EP_IN);
393  }
394 
395  /* Enable endpoint to transmit */
396  _SetEPTxStatus(EpID, EPTX_VALID);
397 }
398 
405 void USB_EP_Stall (USB_CORE_HANDLE *pudev, uint8_t EpAddr)
406 {
407  USB_EP *ep;
408  uint8_t EpID = EpAddr & 0x7F;
409 
410  if (EpAddr >> 7)
411  {
412  ep = &pudev->dev.in_ep[EpID];
413  _SetEPTxStatus(EpID, EPTX_STALL);
414  }
415  else
416  {
417  ep = &pudev->dev.out_ep[EpID];
418  _SetEPRxStatus(EpID, EPRX_STALL);
419  }
420 
421  if (EpID == 0)
422  {
423  /* Control endpoint need to be stalled in two directions */
425  }
426 
427  /* Endpoint now is stalled */
428  ep->is_stall = 1;
429 }
430 
437 void USB_EP_ClrStall (USB_CORE_HANDLE *pudev, uint8_t EpAddr)
438 {
439  USB_EP *ep;
440  uint8_t EpID = EpAddr & 0x7F;
441 
442  if (EpAddr >> 7)
443  {
444  ep = &pudev->dev.in_ep[EpID];
445  _ClearDTG_TX(EpID);
446  _SetEPTxStatus(EpID, EPTX_VALID);
447  }
448  else
449  {
450  ep = &pudev->dev.out_ep[EpID];
451  _ClearDTG_RX(EpID);
452  _SetEPRxStatus(EpID, EPRX_VALID);
453  }
454 
455  /* Endpoint now is not stalled */
456  ep->is_stall = 0;
457 }
458 
465 void USB_EP_SetAddress (USB_CORE_HANDLE *pudev, uint8_t Addr)
466 {
467  uint8_t i;
468 
469  /* Set endpoints address */
470  for (i = 0; i < EP_COUNT; i++)
471  {
472  _SetEPAddress(i, i);
473  }
474 
475  /* Set device address and enable USB module */
476  _SetAR(Addr | AR_USBEN);
477 }
478 
485 uint8_t USB_EP_GetStatus (USB_CORE_HANDLE *pudev, uint8_t EpAddr)
486 {
487  if (EpAddr >> 7)
488  {
489  return _GetEPTxStatus((EpAddr & 0x7F));
490  }
491  else
492  {
493  return _GetEPRxStatus(EpAddr);
494  }
495 }
496 
504 uint8_t USB_CtlTx (USB_CORE_HANDLE *pudev,
505  uint8_t *pbuf,
506  uint16_t Len)
507 {
508  pudev->dev.device_cur_state = USB_CTRL_DATA_IN;
509 
510  USB_EP_Tx(pudev, EP0_IN, pbuf, Len);
511 
512  return USB_OK;
513 }
514 
523  uint8_t *pbuf,
524  uint16_t Len)
525 {
526  USB_EP_Tx (pudev, EP0_IN, pbuf, Len);
527 
528  return USB_OK;
529 }
530 
538 uint8_t USB_CtlRx (USB_CORE_HANDLE *pudev,
539  uint8_t *pbuf,
540  uint16_t Len)
541 {
542  pudev->dev.device_cur_state = USB_CTRL_DATA_OUT;
543 
544  USB_EP_Rx(pudev, EP0_OUT, pbuf, Len);
545 
546  return USB_OK;
547 }
548 
557  uint8_t *pbuf,
558  uint16_t Len)
559 {
560  USB_EP_Rx(pudev, EP0_OUT, pbuf, Len);
561 
562  return USB_OK;
563 }
564 
571 {
572  pudev->dev.device_cur_state = USB_CTRL_STATUS_IN;
573 
574  USB_EP_Tx(pudev, EP0_IN, NULL, 0);
575 
576  return USB_OK;
577 }
578 
585 {
586  _Set_Status_Out(EP0);
587 
588  pudev->dev.device_cur_state = USB_CTRL_STATUS_OUT;
589 
590  USB_EP_Rx(pudev, EP0_OUT, NULL, 0);
591 
592  return USB_OK;
593 }
594 
601 uint16_t USB_GetRxCount (USB_CORE_HANDLE *pudev, uint8_t EpID)
602 {
603  return pudev->dev.out_ep[EpID].xfer_count;
604 }
605 
622 /************************ (C) COPYRIGHT 2014 GIGADEVICE *****END OF FILE****/
#define USB_EPTYPE_CONTROL
USB endpoint type.
Definition: usb_core.h:44
void DR_Init(void)
Device register initialization.
Definition: usb_core.c:44
uint8_t USB_CtlTransmitStatus(USB_CORE_HANDLE *pudev)
Transmit status stage on the control pipe.
Definition: usb_core.c:570
#define EP_ISO
Definition: usb_regs.h:217
#define EP_BULK
EP_CTL[1:0] endpoint type control.
Definition: usb_regs.h:215
#define _ToggleDTG_RX(EpID)
Toggle and Clear EPRX_DTG bit in the endpoint control and status register.
Definition: usb_regs.h:414
uint8_t USB_CtlContinueTx(USB_CORE_HANDLE *pudev, uint8_t *pbuf, uint16_t Len)
Continue transmitting data on the control pipe.
Definition: usb_core.c:522
void USB_EP_ClrStall(USB_CORE_HANDLE *pudev, uint8_t EpAddr)
Clear endpoint stalled status.
Definition: usb_core.c:437
#define IER_MASK
Interrupt flag mask which decide what event should be handled by application.
Definition: usb_core.h:38
void USB_EP_Tx(USB_CORE_HANDLE *pudev, uint8_t EpAddr, uint8_t *pbuf, uint16_t BufLen)
Endpoint prepare to transmit data.
Definition: usb_core.c:346
#define EPTX_STALL
Definition: usb_regs.h:230
uint8_t USB_CtlTx(USB_CORE_HANDLE *pudev, uint8_t *pbuf, uint16_t Len)
Transmit data on the control pipe.
Definition: usb_core.c:504
USB endpoint struct.
Definition: usb_core.h:101
#define EPRX_DISABLED
RX_STA[1:0] status for Rx transfer.
Definition: usb_regs.h:238
void USB_EP_Init(USB_CORE_HANDLE *pudev, uint8_t EpAddr, uint8_t EpType, uint16_t EpMps)
Endpoint initialization.
Definition: usb_core.c:152
void USB_EP_BufConfig(USB_CORE_HANDLE *pudev, uint8_t EpAddr, uint8_t EpKind, uint32_t BufAddr)
Configure buffer for endpoint.
Definition: usb_core.c:98
#define EP0_OUT
First bit is direction(0 for Rx and 1 for Tx)
Definition: usb_regs.h:97
#define _Set_Status_Out(EpID)
Set and Clear directly STATUS_OUT state of endpoint.
Definition: usb_regs.h:387
#define EPTX_NAK
Definition: usb_regs.h:231
#define EPRX_STALL
Definition: usb_regs.h:239
#define _SetEPType(EpID, Type)
Endpoint type setting and getting(bits EP_CTL[1:0] in endpoint control and status register) ...
Definition: usb_regs.h:327
uint8_t USB_CtlReceiveStatus(USB_CORE_HANDLE *pudev)
Receive status stage on the control pipe.
Definition: usb_core.c:584
#define EPRX_NAK
Definition: usb_regs.h:240
uint8_t USB_EP_GetStatus(USB_CORE_HANDLE *pudev, uint8_t EpAddr)
Get the endpoint status.
Definition: usb_core.c:485
uint16_t USB_GetRxCount(USB_CORE_HANDLE *pudev, uint8_t EpID)
Get the received data length.
Definition: usb_core.c:601
void FreeUserBuffer(uint8_t EpID, uint8_t Dir)
Free buffer used from application by toggling the SW_BUF byte.
Definition: usb_buf.c:36
#define EPTX_VALID
Definition: usb_regs.h:232
#define _SetEPRxTxStatus(EpID, StateRx, StateTx)
Rx and Tx transfer status setting (bits EPRX_STA[1:0] & EPTX_STA[1:0])
Definition: usb_regs.h:367
#define CTLR_SETRST
Definition: usb_regs.h:153
Device Driver Header file.
#define _SetEPAddress(EpID, Addr)
Set and Get endpoint address.
Definition: usb_regs.h:442
#define _SetEPDoubleBuff(EpID)
Set and Clear directly double buffered feature of endpoint.
Definition: usb_regs.h:396
#define _SetEPRxStatus(EpID, State)
Rx transfer status setting and getting (bits EPRX_STA[1:0])
Definition: usb_regs.h:352
void USB_EP_Stall(USB_CORE_HANDLE *pudev, uint8_t EpAddr)
Set an endpoint to STALL status.
Definition: usb_core.c:405
void USB_EP_SetAddress(USB_CORE_HANDLE *pudev, uint8_t Addr)
Set USB device and endpoints address.
Definition: usb_core.c:465
void USB_EP_DeInit(USB_CORE_HANDLE *pudev, uint8_t EpAddr)
Configure the endpoint when it is disabled.
Definition: usb_core.c:251
#define _ToggleDTG_TX(EpID)
Toggle and Clear EPTX_DTG bit in the endpoint control and status register.
Definition: usb_regs.h:423
#define EP_CONTROL
Definition: usb_regs.h:216
#define _SetEPTxAddr(EpID, Addr)
Set Tx/Rx buffer address.
Definition: usb_regs.h:480
#define EPRX_VALID
Definition: usb_regs.h:241
void USB_EP_Rx(USB_CORE_HANDLE *pudev, uint8_t EpAddr, uint8_t *pbuf, uint16_t BufLen)
Endpoint prepare to receive data.
Definition: usb_core.c:309
#define CTLR_CLOSE
Definition: usb_regs.h:152
#define AR_USBEN
AR device address register bit definitions.
Definition: usb_regs.h:190
uint8_t USB_CtlRx(USB_CORE_HANDLE *pudev, uint8_t *pbuf, uint16_t Len)
Receive data on the control pipe.
Definition: usb_core.c:538
#define EPTX_DTG
Definition: usb_regs.h:203
void UserCopyToBuffer(uint8_t *UsrBuf, uint16_t BufAddr, uint16_t Bytes)
Copy a buffer from user memory area to the allocation buffer area.
Definition: usb_buf.c:55
#define USB_SNG_BUFTYPE
USB endpoint kind.
Definition: usb_core.h:52
#define _SetEPDblBufAddr(EpID, Buf0Addr, Buf1Addr)
Sets a double buffer endpoint addresses.
Definition: usb_regs.h:567
uint8_t USB_CtlContinueRx(USB_CORE_HANDLE *pudev, uint8_t *pbuf, uint16_t Len)
Continue receive data on the contrl pipe.
Definition: usb_core.c:556
#define _SetEPTxCount(EpID, Count)
Set Tx/Rx buffer byte count.
Definition: usb_regs.h:535
#define EP_INTERRUPT
Definition: usb_regs.h:218
void DR_StopDevice(void)
Device register configure when stop device.
Definition: usb_core.c:71
#define _SetEPTxStatus(EpID, State)
Tx transfer status setting and getting (bits EPTX_STA[1:0])
Definition: usb_regs.h:338
#define EPTX_DISABLED
TX_STA[1:0] status for Tx transfer.
Definition: usb_regs.h:229
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