GD32F10x USB-Device: E:/USB Libraries/GD32_USB_Device_Driver/inc/usb_regs.h Source File

GD32F103 Firmware

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GD32F10x USB-Device V1.0.0
GD32F10x USB-Device
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __GD32F10X_USB_REGS_H
 #define __GD32F10X_USB_REGS_H
 
 /* Includes ------------------------------------------------------------------*/
 #include "usb_conf.h"
 
 enum USB_SPEED
 {
     USB_SPEED_LOW,
     USB_SPEED_FULL
 };
 
 typedef enum _DBUF_EP_DIR
 {
     DBUF_EP_IN,
     DBUF_EP_OUT,
     DBUF_EP_ERR,
 }
 DBUF_EP_DIR;
 
 #define REG_BASE                        (0x40005C00L)  
 #define PBA_ADDR                        (0x40006000L)  
 #define CTLR                            ((__IO unsigned *)(REG_BASE + 0x40))  
 #define IFR                             ((__IO unsigned *)(REG_BASE + 0x44))  
 #define SR                              ((__IO unsigned *)(REG_BASE + 0x48))  
 #define AR                              ((__IO unsigned *)(REG_BASE + 0x4C))  
 #define BAR                             ((__IO unsigned *)(REG_BASE + 0x50))  
 #define EP0CSR                          ((__IO unsigned *)(REG_BASE)) 
 #define EP0_OUT                         ((uint8_t)0x00)
 #define EP0_IN                          ((uint8_t)0x80)
 #define EP1_OUT                         ((uint8_t)0x01)
 #define EP1_IN                          ((uint8_t)0x81)
 #define EP2_OUT                         ((uint8_t)0x02)
 #define EP2_IN                          ((uint8_t)0x82)
 #define EP3_OUT                         ((uint8_t)0x03)
 #define EP3_IN                          ((uint8_t)0x83)
 #define EP4_OUT                         ((uint8_t)0x04)
 #define EP4_IN                          ((uint8_t)0x84)
 #define EP5_OUT                         ((uint8_t)0x05)
 #define EP5_IN                          ((uint8_t)0x85)
 #define EP6_OUT                         ((uint8_t)0x06)
 #define EP6_IN                          ((uint8_t)0x86)
 #define EP7_OUT                         ((uint8_t)0x07)
 #define EP7_IN                          ((uint8_t)0x87)
 
 #define EP0                             ((uint8_t)0)
 #define EP1                             ((uint8_t)1) 
 #define EP2                             ((uint8_t)2)
 #define EP3                             ((uint8_t)3)
 #define EP4                             ((uint8_t)4)
 #define EP5                             ((uint8_t)5)
 #define EP6                             ((uint8_t)6)
 #define EP7                             ((uint8_t)7)
 
 #define CTLR_STIE                       (0x8000)  
 #define CTLR_PMOUIE                     (0x4000)  
 #define CTLR_ERRIE                      (0x2000)  
 #define CTLR_WKUPIE                     (0x1000)  
 #define CTLR_SPSIE                      (0x0800)  
 #define CTLR_RSTIE                      (0x0400)  
 #define CTLR_SOFIE                      (0x0200)  
 #define CTLR_ESOFIE                     (0x0100)  
 #define CTLR_RSREQ                      (0x0010)  
 #define CTLR_SETSPS                     (0x0008)  
 #define CTLR_LOWM                       (0x0004)  
 #define CTLR_CLOSE                      (0x0002)  
 #define CTLR_SETRST                     (0x0001)  
 #define IFR_STIF                        (0x8000)  
 #define IFR_PMOUIF                      (0x4000)  
 #define IFR_ERRIF                       (0x2000)  
 #define IFR_WKUPIF                      (0x1000)  
 #define IFR_SPSIF                       (0x0800)  
 #define IFR_RSTIF                       (0x0400)  
 #define IFR_SOFIF                       (0x0200)  
 #define IFR_ESOFIF                      (0x0100)  
 #define IFR_DIR                         (0x0010)  
 #define IFR_EPNUM                       (0x000F)  
 #define CLR_STIF                        (~IFR_STIF)    
 #define CLR_PMOUIF                      (~IFR_PMOUIF)  
 #define CLR_ERRIF                       (~IFR_ERRIF)   
 #define CLR_WKUPIF                      (~IFR_WKUPIF)  
 #define CLR_SPSIF                       (~IFR_SPSIF)   
 #define CLR_RSTIF                       (~IFR_RSTIF)   
 #define CLR_SOFIF                       (~IFR_SOFIF)   
 #define CLR_ESOFIF                      (~IFR_ESOFIF)  
 #define SR_RXDP                         (0x8000)  
 #define SR_RXDM                         (0x4000)  
 #define SR_LOCK                         (0x2000)  
 #define SR_SOFLN                        (0x1800)  
 #define SR_FCNT                         (0x07FF)  
 #define AR_USBEN                        (0x80)  
 #define AR_USBADDR                      (0x7F)  
 #define EPRX_ST                         (0x8000)  
 #define EPRX_DTG                        (0x4000)  
 #define EPRX_STA                        (0x3000)  
 #define EP_SETUP                        (0x0800)  
 #define EP_CTL                          (0x0600)  
 #define EP_KCTL                         (0x0100)  
 #define EPTX_ST                         (0x0080)  
 #define EPTX_DTG                        (0x0040)  
 #define EPTX_STA                        (0x0030)  
 #define EP_AR                           (0x000F)  
 #define EPCSR_MASK                      (EPRX_ST|EP_SETUP|EP_CTL|EP_KCTL|EPTX_ST|EP_AR)
 
 #define EP_BULK                         (0x0000) 
 #define EP_CONTROL                      (0x0200) 
 #define EP_ISO                          (0x0400) 
 #define EP_INTERRUPT                    (0x0600) 
 #define EP_CTL_MASK                     (~EP_CTL & EPCSR_MASK)
 
 #define EPKCTL_MASK                     (~EP_KCTL & EPCSR_MASK)
 
 #define EPTX_DISABLED                   (0x0000) 
 #define EPTX_STALL                      (0x0010) 
 #define EPTX_NAK                        (0x0020) 
 #define EPTX_VALID                      (0x0030) 
 #define EPTX_DTGMASK                    (EPTX_STA | EPCSR_MASK)
 
 #define EPRX_DISABLED                   (0x0000) 
 #define EPRX_STALL                      (0x1000) 
 #define EPRX_NAK                        (0x2000) 
 #define EPRX_VALID                      (0x3000) 
 #define EPRX_DTGMASK                    (EPRX_STA | EPCSR_MASK)
 
 #define EPRXCNTR_BLKSIZ                 (0x8000)
 #define EPRXCNTR_BLKNUM                 (0x7C00)
 #define EPRXCNTR_CNT                    (0x03FF)
 
 #define EPTXCNTR_CNT                    (0x03FF)
 
 #define BLKSIZE_OFFSET                  (0x01)
 #define BLKNUM_OFFSET                   (0x05)
 #define RXCNT_OFFSET                    (0x0A)
 
 #define TXCNT_OFFSET                    (0x0A)
 
 #define BLKSIZE32_MASK                  (0x1f)
 #define BLKSIZE2_MASK                   (0x01)
 
 #define BLKSIZE32_OFFSETMASK            (0x05)
 #define BLKSIZE2_OFFSETMASK             (0x01)
 
 /* Set CTLR */
 #define _SetCTLR(RegValue)              (*CTLR = (uint16_t)RegValue)
 
 /* Get CTLR */
 #define _GetCTLR()                      ((uint16_t) *CTLR)
 
 /* Set IFR */
 #define _SetIFR(RegValue)               (*IFR = (uint16_t)RegValue)
 
 /* Get IFR */
 #define _GetIFR()                       ((uint16_t) *IFR)
 
 /* Set AR */
 #define _SetAR(RegValue)                (*AR = (uint16_t)RegValue)
 
 /* Get AR */
 #define _GetAR()                        ((uint16_t) *AR)
 
 /* Set BAR */
 #define _SetBAR(RegValue)               (*BAR = (uint16_t)(RegValue & 0xFFF8))
 
 /* Get BAR */
 #define _GetBAR()                       ((uint16_t) *BAR)
 
 /* Get SR */
 #define _GetSR()                        ((uint16_t) *SR)
 
 /* Set EPxCSR */
 #define _SetEPxCSR(EpID,RegValue)       (*(EP0CSR + EpID) = (uint16_t)RegValue)
 
 /* Get EPxCSR*/
 #define _GetEPxCSR(EpID)                ((uint16_t)(*(EP0CSR + EpID)))
 
 #define _SetEPType(EpID, Type)          (_SetEPxCSR(EpID, ((_GetEPxCSR(EpID) & EP_CTL_MASK) | Type)))
 
 #define _GetEPType(EpID)                (_GetEPxCSR(EpID) & EP_CTL)
 
 
 #define _SetEPTxStatus(EpID, State) {\
     register uint16_t _RegVal;       \
     _RegVal = _GetEPxCSR(EpID) & EPTX_DTGMASK;\
     _SetEPxCSR(EpID, (_RegVal ^ State));    \
 }
 
 #define _GetEPTxStatus(EpID)            ((uint16_t)_GetEPxCSR(EpID) & EPTX_STA)
 
 #define _SetEPRxStatus(EpID, State) {\
     register uint16_t _RegVal;   \
     _RegVal = _GetEPxCSR(EpID) & EPRX_DTGMASK;\
     _SetEPxCSR(EpID, (_RegVal ^ State)); \
 }
 
 #define _GetEPRxStatus(EpID)            ((uint16_t)_GetEPxCSR(EpID) & EPRX_STA)
 
 #define _SetEPRxTxStatus(EpID, StateRx, StateTx) {\
     register uint16_t _RegVal;   \
     _RegVal = _GetEPxCSR(EpID) & (EPRX_DTGMASK | EPTX_STA) ;\
     _SetEPxCSR(EpID, ((_RegVal ^ StateRx) ^ StateTx));    \
 }
 
 #define _SetEP_KIND(EpID)               (_SetEPxCSR(EpID, ((_GetEPxCSR(EpID) | EP_KCTL) & EPCSR_MASK)))
 
 #define _ClearEP_KIND(EpID)             (_SetEPxCSR(EpID, (_GetEPxCSR(EpID) & EPKCTL_MASK)))
 
 #define _Set_Status_Out(EpID)           _SetEP_KIND(EpID)
 
 #define _Clear_Status_Out(EpID)         _ClearEP_KIND(EpID)
 
 #define _SetEPDoubleBuff(EpID)          _SetEP_KIND(EpID)
 
 #define _ClearEPDoubleBuff(EpID)        _ClearEP_KIND(EpID)
 
 #define _ClearEPRX_ST(EpID)             (_SetEPxCSR(EpID, _GetEPxCSR(EpID) & 0x7FFF & EPCSR_MASK))
 
 #define _ClearEPTX_ST(EpID)             (_SetEPxCSR(EpID, _GetEPxCSR(EpID) & 0xFF7F & EPCSR_MASK))
 
 #define _ToggleDTG_RX(EpID)             (_SetEPxCSR(EpID, EPRX_DTG | (_GetEPxCSR(EpID) & EPCSR_MASK)))
 
 #define _ClearDTG_RX(EpID)              if((_GetEPxCSR(EpID) & EPRX_DTG) != 0) _ToggleDTG_RX(EpID)
 
 #define _ToggleDTG_TX(EpID)             (_SetEPxCSR(EpID, EPTX_DTG | (_GetEPxCSR(EpID) & EPCSR_MASK)))
 
 #define _ClearDTG_TX(EpID)              if((_GetEPxCSR(EpID) & EPTX_DTG) != 0) _ToggleDTG_TX(EpID)
 
 #define _ToggleSWBUF_TX(EpID)           _ToggleDTG_RX(EpID)
 
 #define _ToggleSWBUF_RX(EpID)           _ToggleDTG_TX(EpID)
 
 #define _SetEPAddress(EpID,Addr)        _SetEPxCSR(EpID, (_GetEPxCSR(EpID) & EPCSR_MASK) | Addr)
 
 #define _GetEPAddress(EpID)             ((uint8_t)(_GetEPxCSR(EpID) & EP_AR))
 
 #define _GetEPTXARn(EpID)               ((uint32_t *)((_GetBAR() + EpID * 8) * 2 + PBA_ADDR))
 
 #define _GetEPTXCNTx(EpID)              ((uint32_t *)((_GetBAR() + EpID * 8 + 2) * 2 + PBA_ADDR))
 
 #define _GetEPRXARn(EpID)               ((uint32_t *)((_GetBAR() + EpID * 8 + 4) * 2 + PBA_ADDR))
 
 #define _GetEPRXCNTx(EpID)              ((uint32_t *)((_GetBAR() + EpID * 8 + 6) * 2 + PBA_ADDR))
 
 #define _SetEPTxAddr(EpID, Addr)        (*_GetEPTXARn(EpID) = (Addr & ~((uint16_t)1)))
 #define _SetEPRxAddr(EpID, Addr)        (*_GetEPRXARn(EpID) = (Addr & ~((uint16_t)1)))
 
 #define _GetEPTxAddr(EpID)              ((uint16_t)*_GetEPTXARn(EpID))
 #define _GetEPRxAddr(EpID)              ((uint16_t)*_GetEPRXARn(EpID))
 
 #define _BlocksOf32(pdwReg, Count) {\
     register uint16_t BlockNum = Count >> BLKSIZE32_OFFSETMASK;\
     if((Count & BLKSIZE32_MASK) == 0)\
       BlockNum--;\
     *pdwReg = (uint32_t)((BlockNum << RXCNT_OFFSET) | EPRXCNTR_BLKSIZ);\
 }
 
 #define _BlocksOf2(pdwReg, Count) {\
     register uint16_t BlockNum = Count >> BLKSIZE2_OFFSETMASK;\
     if((Count & BLKSIZE2_MASK) != 0)\
       BlockNum++;\
     *pdwReg = (uint32_t)(BlockNum << RXCNT_OFFSET);\
 }
 
 #define _SetEPRxDblBuf0Count(EpID, Count) {\
     uint32_t *pdwReg = _GetEPTXCNTx(EpID); \
     if(Count > 62) { _BlocksOf32(pdwReg, Count); } \
     else { _BlocksOf32(pdwReg, Count); } \
 }
 
 #define _SetEPTxCount(EpID, Count)      (*_GetEPTXCNTx(EpID) = Count)
 #define _SetEPRxCount(EpID, Count) {\
     uint32_t *pdwReg = _GetEPRXCNTx(EpID); \
     if(Count > 62) { _BlocksOf32(pdwReg, Count); } \
     else { _BlocksOf2(pdwReg, Count); } \
 }
 
 #define _GetEPTxCount(EpID)((uint16_t)  (*_GetEPTXCNTx(EpID)) & EPTXCNTR_CNT)
 #define _GetEPRxCount(EpID)((uint16_t)  (*_GetEPRXCNTx(EpID)) & EPRXCNTR_CNT)
 
 #define _SetEPDblBuf0Addr(EpID, Buf0Addr) {_SetEPTxAddr(EpID, Buf0Addr);}
 #define _SetEPDblBuf1Addr(EpID, Buf1Addr) {_SetEPRxAddr(EpID, Buf1Addr);}
 
 #define _SetEPDblBufAddr(EpID, Buf0Addr, Buf1Addr) { \
     _SetEPDblBuf0Addr(EpID, Buf0Addr);\
     _SetEPDblBuf1Addr(EpID, Buf1Addr);\
 }
 
 #define _GetEPDblBuf0Addr(EpID)         (_GetEPTxAddr(EpID))
 #define _GetEPDblBuf1Addr(EpID)         (_GetEPRxAddr(EpID))
 
 #define _SetEPDblBuf0Count(EpID, Dir, Count)  { \
     if(Dir == DBUF_EP_OUT)\
     {_SetEPRxDblBuf0Count(EpID, Count);} \
     else if(Dir == DBUF_EP_IN)\
     {*_GetEPTXCNTx(EpID) = (uint32_t)Count;} \
 }
 
 #define _SetEPDblBuf1Count(EpID, Dir, Count)  { \
     if(Dir == DBUF_EP_OUT)\
     {_SetEPRxCount(EpID, Count);}\
     else if(Dir == DBUF_EP_IN)\
     {*_GetEPRXCNTx(EpID) = (uint32_t)Count;} \
 }
 
 #define _SetEPDblBuffCount(EpID, Dir, Count) {\
     _SetEPDblBuf0Count(EpID, Dir, Count); \
     _SetEPDblBuf1Count(EpID, Dir, Count); \
 }
 
 #define _GetEPDblBuf0Count(EpID)        (_GetEPTxCount(EpID))
 #define _GetEPDblBuf1Count(EpID)        (_GetEPRxCount(EpID))
 
 #define _SetDouBleBuffEPStall(EpID, Dir) {\
     if (Dir == DBUF_EP_OUT) \
     { \
         _SetEPxCSR(EpID, _GetEPxCSR(EpID) & ~EPRX_STALL); \
     } \
     else if (Dir == DBUF_EP_IN) \
     { \
         _SetEPxCSR(EpID, _GetEPxCSR(EpID) & ~EPTX_STALL); \
     } \
 }
 
 #endif /* __GD32F10X_USB_REGS_H */
 
 /************************ (C) COPYRIGHT 2014 GIGADEVICE *****END OF FILE****/
Generated on Fri Feb 6 2015 14:56:35 for GD32F10x USB-Device by
1.8.8
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