CoffeeLake Intel(R) Firmware Support Package (FSP) Integration Guide
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- PadMode : GPIO_CONFIG
- PanelPowerEnable : FSP_M_TEST_CONFIG
- PavpEnable : FSP_S_CONFIG
- PcdDebugInterfaceFlags : FSP_M_CONFIG
- PcdIsaSerialUartBase : FSP_M_CONFIG
- PcdPciExpressBaseAddress : FSP_T_CONFIG
- PcdPciExpressRegionLength : FSP_T_CONFIG
- PcdSerialDebugBaudRate : FSP_M_CONFIG
- PcdSerialDebugLevel : FSP_M_CONFIG
- PcdSerialIoUart0PinMuxing : FSP_T_CONFIG
- PcdSerialIoUartDebugEnable : FSP_T_CONFIG
- PcdSerialIoUartInputClock : FSP_T_CONFIG
- PcdSerialIoUartNumber : FSP_M_CONFIG , FSP_T_CONFIG
- PchCnviMfUart1Type : FSP_S_CONFIG
- PchCnviMode : FSP_S_CONFIG
- PchCrid : FSP_S_CONFIG
- PchDmiAspm : FSP_S_CONFIG
- PchDmiAspmCtrl : FSP_S_CONFIG
- PchDmiTsawEn : FSP_S_CONFIG
- PchEnableComplianceMode : FSP_S_CONFIG
- PchEnableDbcObs : FSP_S_CONFIG
- PchEspiBmeMasterSlaveEnabled : FSP_S_CONFIG
- PchEspiLgmrEnable : FSP_S_CONFIG
- PchHdaAudioLinkDmic0 : FSP_S_CONFIG
- PchHdaAudioLinkDmic1 : FSP_S_CONFIG
- PchHdaAudioLinkHda : FSP_S_CONFIG
- PchHdaAudioLinkSndw1 : FSP_S_CONFIG
- PchHdaAudioLinkSndw2 : FSP_S_CONFIG
- PchHdaAudioLinkSndw3 : FSP_S_CONFIG
- PchHdaAudioLinkSndw4 : FSP_S_CONFIG
- PchHdaAudioLinkSsp0 : FSP_S_CONFIG
- PchHdaAudioLinkSsp1 : FSP_S_CONFIG
- PchHdaAudioLinkSsp2 : FSP_S_CONFIG
- PchHdaCodecSxWakeCapability : FSP_S_CONFIG
- PchHdaDspEnable : FSP_S_CONFIG
- PchHdaDspUaaCompliance : FSP_S_CONFIG
- PchHdaEnable : FSP_M_CONFIG
- PchHdaIDispCodecDisconnect : FSP_S_CONFIG
- PchHdaIDispLinkFrequency : FSP_S_CONFIG
- PchHdaIDispLinkTmode : FSP_S_CONFIG
- PchHdaLinkFrequency : FSP_S_CONFIG
- PchHdaPme : FSP_S_CONFIG
- PchHdaResetWaitTimer : FSP_S_TEST_CONFIG
- PchHdaSndwBufferRcomp : FSP_S_CONFIG
- PchHdaVcType : FSP_S_CONFIG
- PchHdaVerbTableEntryNum : FSP_S_CONFIG
- PchHdaVerbTablePtr : FSP_S_CONFIG
- PchHotEnable : FSP_S_CONFIG
- PchIoApicEntry24_119 : FSP_S_CONFIG
- PchIoApicId : FSP_S_CONFIG
- PchIshEnable : FSP_M_CONFIG
- PchIshGp0GpioAssign : FSP_S_CONFIG
- PchIshGp1GpioAssign : FSP_S_CONFIG
- PchIshGp2GpioAssign : FSP_S_CONFIG
- PchIshGp3GpioAssign : FSP_S_CONFIG
- PchIshGp4GpioAssign : FSP_S_CONFIG
- PchIshGp5GpioAssign : FSP_S_CONFIG
- PchIshGp6GpioAssign : FSP_S_CONFIG
- PchIshGp7GpioAssign : FSP_S_CONFIG
- PchIshI2c0GpioAssign : FSP_S_CONFIG
- PchIshI2c1GpioAssign : FSP_S_CONFIG
- PchIshI2c2GpioAssign : FSP_S_CONFIG
- PchIshPdtUnlock : FSP_S_CONFIG
- PchIshSpiGpioAssign : FSP_S_CONFIG
- PchIshUart0GpioAssign : FSP_S_CONFIG
- PchIshUart1GpioAssign : FSP_S_CONFIG
- PchLanEnable : FSP_S_CONFIG
- PchLanLtrEnable : FSP_S_CONFIG
- PchLockDownBiosInterface : FSP_S_TEST_CONFIG
- PchLockDownBiosLock : FSP_S_CONFIG
- PchLockDownGlobalSmi : FSP_S_TEST_CONFIG
- PchLockDownRtcMemoryLock : FSP_S_CONFIG
- PchLpcEnhancePort8xhDecoding : FSP_M_CONFIG
- PchMemoryC0TransmitEnable : FSP_S_CONFIG
- PchMemoryPinSelection : FSP_S_CONFIG
- PchMemoryPmsyncEnable : FSP_S_CONFIG
- PchMemoryThrottlingEnable : FSP_S_CONFIG
- PchNumRsvdSmbusAddresses : FSP_M_CONFIG
- PchPcieDeviceOverrideTablePtr : FSP_S_CONFIG
- PchPcieHsioRxSetCtle : FSP_M_CONFIG
- PchPcieHsioRxSetCtleEnable : FSP_M_CONFIG
- PchPcieHsioTxGen1DeEmph : FSP_M_CONFIG
- PchPcieHsioTxGen1DeEmphEnable : FSP_M_CONFIG
- PchPcieHsioTxGen1DownscaleAmp : FSP_M_CONFIG
- PchPcieHsioTxGen1DownscaleAmpEnable : FSP_M_CONFIG
- PchPcieHsioTxGen2DeEmph3p5 : FSP_M_CONFIG
- PchPcieHsioTxGen2DeEmph3p5Enable : FSP_M_CONFIG
- PchPcieHsioTxGen2DeEmph6p0 : FSP_M_CONFIG
- PchPcieHsioTxGen2DeEmph6p0Enable : FSP_M_CONFIG
- PchPcieHsioTxGen2DownscaleAmp : FSP_M_CONFIG
- PchPcieHsioTxGen2DownscaleAmpEnable : FSP_M_CONFIG
- PchPcieHsioTxGen3DownscaleAmp : FSP_M_CONFIG
- PchPcieHsioTxGen3DownscaleAmpEnable : FSP_M_CONFIG
- PchPciePort8xhDecodePortIndex : FSP_S_TEST_CONFIG
- PchPmDeepSxPol : FSP_S_CONFIG
- PchPmDisableDsxAcPresentPulldown : FSP_S_CONFIG
- PchPmDisableEnergyReport : FSP_S_TEST_CONFIG
- PchPmDisableNativePowerButton : FSP_S_CONFIG
- PchPmLanWakeFromDeepSx : FSP_S_CONFIG
- PchPmLpcClockRun : FSP_S_CONFIG
- PchPmMeWakeSts : FSP_S_CONFIG
- PchPmPciePllSsc : FSP_S_CONFIG
- PchPmPcieWakeFromDeepSx : FSP_S_CONFIG
- PchPmPmeB0S5Dis : FSP_S_CONFIG
- PchPmPwrBtnOverridePeriod : FSP_S_CONFIG
- PchPmPwrCycDur : FSP_S_CONFIG
- PchPmSlpAMinAssert : FSP_S_CONFIG
- PchPmSlpLanLowDc : FSP_S_CONFIG
- PchPmSlpS0Enable : FSP_S_CONFIG
- PchPmSlpS0Vm070VSupport : FSP_S_CONFIG
- PchPmSlpS0Vm075VSupport : FSP_S_CONFIG
- PchPmSlpS0VmRuntimeControl : FSP_S_CONFIG
- PchPmSlpS3MinAssert : FSP_S_CONFIG
- PchPmSlpS4MinAssert : FSP_S_CONFIG
- PchPmSlpStrchSusUp : FSP_S_CONFIG
- PchPmSlpSusMinAssert : FSP_S_CONFIG
- PchPmVrAlert : FSP_S_CONFIG
- PchPmWolEnableOverride : FSP_S_CONFIG
- PchPmWolOvrWkSts : FSP_S_CONFIG
- PchPmWoWlanDeepSxEnable : FSP_S_CONFIG
- PchPmWoWlanEnable : FSP_S_CONFIG
- PchPort80Route : FSP_M_CONFIG
- PchPostMemRsvd : FSP_S_CONFIG
- PchPreMemRsvd : FSP_M_CONFIG
- PchProtectedRangeBase : FSP_S_CONFIG
- PchProtectedRangeLimit : FSP_S_CONFIG
- PchPwrOptEnable : FSP_S_CONFIG
- PchReadProtectionEnable : FSP_S_CONFIG
- PchSataHsioRxGen1EqBoostMag : FSP_M_CONFIG
- PchSataHsioRxGen1EqBoostMagEnable : FSP_M_CONFIG
- PchSataHsioRxGen2EqBoostMag : FSP_M_CONFIG
- PchSataHsioRxGen2EqBoostMagEnable : FSP_M_CONFIG
- PchSataHsioRxGen3EqBoostMag : FSP_M_CONFIG
- PchSataHsioRxGen3EqBoostMagEnable : FSP_M_CONFIG
- PchSataHsioTxGen1DeEmph : FSP_M_CONFIG
- PchSataHsioTxGen1DeEmphEnable : FSP_M_CONFIG
- PchSataHsioTxGen1DownscaleAmp : FSP_M_CONFIG
- PchSataHsioTxGen1DownscaleAmpEnable : FSP_M_CONFIG
- PchSataHsioTxGen2DeEmph : FSP_M_CONFIG
- PchSataHsioTxGen2DeEmphEnable : FSP_M_CONFIG
- PchSataHsioTxGen2DownscaleAmp : FSP_M_CONFIG
- PchSataHsioTxGen2DownscaleAmpEnable : FSP_M_CONFIG
- PchSataHsioTxGen3DeEmph : FSP_M_CONFIG
- PchSataHsioTxGen3DeEmphEnable : FSP_M_CONFIG
- PchSataHsioTxGen3DownscaleAmp : FSP_M_CONFIG
- PchSataHsioTxGen3DownscaleAmpEnable : FSP_M_CONFIG
- PchSbAccessUnlock : FSP_S_TEST_CONFIG
- PchSbiUnlock : FSP_S_TEST_CONFIG
- PchScsEmmcHs400DllDataValid : FSP_S_CONFIG
- PchScsEmmcHs400DriverStrength : FSP_S_CONFIG
- PchScsEmmcHs400RxStrobeDll1 : FSP_S_CONFIG
- PchScsEmmcHs400TuningRequired : FSP_S_CONFIG
- PchScsEmmcHs400TxDataDll : FSP_S_CONFIG
- PchSerialIoI2cPadsTermination : FSP_S_CONFIG
- PchSirqEnable : FSP_S_CONFIG
- PchSirqMode : FSP_S_CONFIG
- PchSmbAlertEnable : FSP_M_CONFIG
- PchSmbusIoBase : FSP_M_CONFIG
- PchStartFramePulse : FSP_S_CONFIG
- PchT0Level : FSP_S_CONFIG
- PchT1Level : FSP_S_CONFIG
- PchT2Level : FSP_S_CONFIG
- PchTemperatureHotLevel : FSP_S_CONFIG
- PchTraceHubMemReg0Size : FSP_M_CONFIG
- PchTraceHubMemReg1Size : FSP_M_CONFIG
- PchTraceHubMode : FSP_M_CONFIG
- PchTsmicLock : FSP_S_CONFIG
- PchTTEnable : FSP_S_CONFIG
- PchTTLock : FSP_S_CONFIG
- PchTTState13Enable : FSP_S_CONFIG
- PchUnlockGpioPads : FSP_S_TEST_CONFIG
- PchUsb2PhySusPgEnable : FSP_S_CONFIG
- PchUsbHsioFilterSel : FSP_S_CONFIG
- PchUsbHsioRxTuningEnable : FSP_S_CONFIG
- PchUsbHsioRxTuningParameters : FSP_S_CONFIG
- PchUsbOverCurrentEnable : FSP_S_CONFIG
- PchWriteProtectionEnable : FSP_S_CONFIG
- PchXhciOcLock : FSP_S_TEST_CONFIG
- PcieClkSrcClkReq : FSP_S_CONFIG
- PcieClkSrcUsage : FSP_S_CONFIG
- PcieComplianceTestMode : FSP_S_CONFIG
- PcieDisableRootPortClockGating : FSP_S_CONFIG
- PcieEnablePeerMemoryWrite : FSP_S_CONFIG
- PcieEnablePort8xhDecode : FSP_S_TEST_CONFIG
- PcieEqPh3LaneParamCm : FSP_S_CONFIG
- PcieEqPh3LaneParamCp : FSP_S_CONFIG
- PcieImrEnabled : FSP_M_CONFIG
- PcieImrSize : FSP_M_CONFIG
- PcieRootPortGen2PllL1CgDisable : FSP_S_CONFIG
- PcieRpAcsEnabled : FSP_S_CONFIG
- PcieRpAdvancedErrorReporting : FSP_S_CONFIG
- PcieRpAspm : FSP_S_CONFIG
- PcieRpClkReqDetect : FSP_S_CONFIG
- PcieRpCompletionTimeout : FSP_S_CONFIG
- PcieRpCorrectableErrorReport : FSP_S_CONFIG
- PcieRpDetectTimeoutMs : FSP_S_CONFIG
- PcieRpDpcExtensionsMask : FSP_S_CONFIG
- PcieRpDpcMask : FSP_S_CONFIG
- PcieRpDptp : FSP_S_TEST_CONFIG
- PcieRpEnableCpm : FSP_S_CONFIG
- PcieRpEnableMask : FSP_M_CONFIG
- PcieRpExtSync : FSP_S_CONFIG
- PcieRpFatalErrorReport : FSP_S_CONFIG
- PcieRpFunctionSwap : FSP_S_CONFIG
- PcieRpGen3EqPh3Method : FSP_S_CONFIG
- PcieRpHotPlug : FSP_S_CONFIG
- PcieRpImrEnabled : FSP_S_CONFIG
- PcieRpImrSelection : FSP_S_CONFIG
- PcieRpL1Substates : FSP_S_CONFIG
- PcieRpLtrConfigLock : FSP_S_CONFIG
- PcieRpLtrEnable : FSP_S_CONFIG
- PcieRpLtrMaxNoSnoopLatency : FSP_S_TEST_CONFIG
- PcieRpLtrMaxSnoopLatency : FSP_S_TEST_CONFIG
- PcieRpMaxPayload : FSP_S_CONFIG
- PcieRpNoFatalErrorReport : FSP_S_CONFIG
- PcieRpNonSnoopLatencyOverrideMode : FSP_S_TEST_CONFIG
- PcieRpNonSnoopLatencyOverrideMultiplier : FSP_S_TEST_CONFIG
- PcieRpNonSnoopLatencyOverrideValue : FSP_S_TEST_CONFIG
- PcieRpPcieSpeed : FSP_S_CONFIG
- PcieRpPhysicalSlotNumber : FSP_S_CONFIG
- PcieRpPmSci : FSP_S_CONFIG
- PcieRpPtmMask : FSP_S_CONFIG
- PcieRpSlotImplemented : FSP_S_CONFIG
- PcieRpSlotPowerLimitScale : FSP_S_TEST_CONFIG
- PcieRpSlotPowerLimitValue : FSP_S_TEST_CONFIG
- PcieRpSnoopLatencyOverrideMode : FSP_S_TEST_CONFIG
- PcieRpSnoopLatencyOverrideMultiplier : FSP_S_TEST_CONFIG
- PcieRpSnoopLatencyOverrideValue : FSP_S_TEST_CONFIG
- PcieRpSystemErrorOnCorrectableError : FSP_S_CONFIG
- PcieRpSystemErrorOnFatalError : FSP_S_CONFIG
- PcieRpSystemErrorOnNonFatalError : FSP_S_CONFIG
- PcieRpTransmitterHalfSwing : FSP_S_CONFIG
- PcieRpUnsupportedRequestReport : FSP_S_CONFIG
- PcieRpUptp : FSP_S_TEST_CONFIG
- PcieSwEqCoeffListCm : FSP_S_CONFIG
- PcieSwEqCoeffListCp : FSP_S_CONFIG
- PdEnergyCh0Dimm0 : FSP_M_CONFIG
- PdEnergyCh0Dimm1 : FSP_M_CONFIG
- PdEnergyCh1Dimm0 : FSP_M_CONFIG
- PdEnergyCh1Dimm1 : FSP_M_CONFIG
- PeciC10Reset : FSP_M_CONFIG
- PeciSxReset : FSP_M_CONFIG
- Peg0Enable : FSP_M_CONFIG
- Peg0Gen3EqPh2Enable : FSP_M_TEST_CONFIG
- Peg0Gen3EqPh3Method : FSP_M_TEST_CONFIG
- Peg0MaxLinkSpeed : FSP_M_CONFIG
- Peg0MaxLinkWidth : FSP_M_CONFIG
- Peg0PowerDownUnusedLanes : FSP_M_CONFIG
- Peg1Enable : FSP_M_CONFIG
- Peg1Gen3EqPh2Enable : FSP_M_TEST_CONFIG
- Peg1Gen3EqPh3Method : FSP_M_TEST_CONFIG
- Peg1MaxLinkSpeed : FSP_M_CONFIG
- Peg1MaxLinkWidth : FSP_M_CONFIG
- Peg1PowerDownUnusedLanes : FSP_M_CONFIG
- Peg2Enable : FSP_M_CONFIG
- Peg2Gen3EqPh2Enable : FSP_M_TEST_CONFIG
- Peg2Gen3EqPh3Method : FSP_M_TEST_CONFIG
- Peg2MaxLinkSpeed : FSP_M_CONFIG
- Peg2MaxLinkWidth : FSP_M_CONFIG
- Peg2PowerDownUnusedLanes : FSP_M_CONFIG
- Peg3Enable : FSP_M_CONFIG
- Peg3Gen3EqPh2Enable : FSP_M_TEST_CONFIG
- Peg3Gen3EqPh3Method : FSP_M_TEST_CONFIG
- Peg3MaxLinkSpeed : FSP_M_CONFIG
- Peg3MaxLinkWidth : FSP_M_CONFIG
- Peg3PowerDownUnusedLanes : FSP_M_CONFIG
- PegDataPtr : FSP_M_CONFIG
- PegDeEmphasis : FSP_S_CONFIG
- PegDisableSpreadSpectrumClocking : FSP_M_CONFIG
- PegGen3EndPointHint : FSP_M_TEST_CONFIG
- PegGen3EndPointPreset : FSP_M_TEST_CONFIG
- PegGen3ProgramStaticEq : FSP_M_TEST_CONFIG
- PegGen3RootPortPreset : FSP_M_TEST_CONFIG
- PegGen3Rsvd : FSP_M_TEST_CONFIG
- PegGen3RxCtleOverride : FSP_M_TEST_CONFIG
- PegGen3RxCtlePeaking : FSP_M_CONFIG
- PegGenerateBdatMarginTable : FSP_M_TEST_CONFIG
- PegGpioData : FSP_M_CONFIG
- PegMaxPayload : FSP_S_TEST_CONFIG
- PegPhysicalSlotNumber : FSP_S_CONFIG
- PegRootPortHPE : FSP_M_CONFIG
- PegRxCemLoopbackLane : FSP_M_TEST_CONFIG
- PegRxCemNonProtocolAwareness : FSP_M_TEST_CONFIG
- PegRxCemTestingMode : FSP_M_TEST_CONFIG
- PegSlotPowerLimitScale : FSP_S_CONFIG
- PegSlotPowerLimitValue : FSP_S_CONFIG
- PeiGraphicsPeimInit : FSP_S_CONFIG
- PkgCStateDemotion : FSP_S_TEST_CONFIG
- PkgCStateLimit : FSP_S_TEST_CONFIG
- PkgCStateUnDemotion : FSP_S_TEST_CONFIG
- PlatformDebugConsent : FSP_M_CONFIG
- PlatformMemorySize : FSP_M_CONFIG
- PmcCpuC10GatePinEnable : FSP_S_CONFIG
- PmcDbgMsgEn : FSP_S_CONFIG
- PmcModPhySusPgEnable : FSP_S_CONFIG
- PmcPowerButtonDebounce : FSP_S_CONFIG
- PmgCstCfgCtrlLock : FSP_S_TEST_CONFIG
- PmSupport : FSP_S_TEST_CONFIG
- PortUsb20Enable : FSP_S_CONFIG
- PortUsb30Enable : FSP_S_CONFIG
- PostCodeOutputPort : FSP_M_CONFIG
- PowerConfig : GPIO_CONFIG
- PowerLimit1 : FSP_S_TEST_CONFIG
- PowerLimit1Time : FSP_S_TEST_CONFIG
- PowerLimit2 : FSP_S_TEST_CONFIG
- PowerLimit2Power : FSP_S_TEST_CONFIG
- PowerLimit3 : FSP_S_TEST_CONFIG
- PowerLimit3DutyCycle : FSP_S_TEST_CONFIG
- PowerLimit3Lock : FSP_S_TEST_CONFIG
- PowerLimit3Time : FSP_S_TEST_CONFIG
- PowerLimit4 : FSP_S_TEST_CONFIG
- PowerLimit4Lock : FSP_S_TEST_CONFIG
- PpmIrmSetting : FSP_S_TEST_CONFIG
- PreWake : FSP_S_CONFIG
- PrimaryDisplay : FSP_M_CONFIG
- PrmrrSize : FSP_M_CONFIG
- ProbelessTrace : FSP_M_CONFIG
- ProcessorCharacteristics : SMBIOS_PROCESSOR_INFO
- ProcessorFamily : SMBIOS_PROCESSOR_INFO
- ProcessorId : SMBIOS_PROCESSOR_INFO
- ProcessorManufacturerStrIndex : SMBIOS_PROCESSOR_INFO
- ProcessorTraceEnable : FSP_S_TEST_CONFIG
- ProcessorTraceMemBase : FSP_S_TEST_CONFIG
- ProcessorTraceMemLength : FSP_S_TEST_CONFIG
- ProcessorTraceOutputScheme : FSP_S_TEST_CONFIG
- ProcessorType : SMBIOS_PROCESSOR_INFO
- ProcessorUpgrade : SMBIOS_PROCESSOR_INFO
- ProcessorVersionStrIndex : SMBIOS_PROCESSOR_INFO
- ProcHotLock : FSP_S_TEST_CONFIG
- ProcHotResponse : FSP_S_TEST_CONFIG
- Psi1Threshold : FSP_S_CONFIG
- Psi2Threshold : FSP_S_CONFIG
- Psi3Enable : FSP_S_CONFIG
- Psi3Threshold : FSP_S_CONFIG
- Psi4Enable : FSP_S_CONFIG
- PsmiRegionSize : FSP_M_CONFIG
- PsOnEnable : FSP_S_CONFIG
- PsysOffset : FSP_S_CONFIG
- PsysPmax : FSP_S_TEST_CONFIG
- PsysPowerLimit1 : FSP_S_TEST_CONFIG
- PsysPowerLimit1Power : FSP_S_TEST_CONFIG
- PsysPowerLimit1Time : FSP_S_TEST_CONFIG
- PsysPowerLimit2 : FSP_S_TEST_CONFIG
- PsysPowerLimit2Power : FSP_S_TEST_CONFIG
- PsysSlope : FSP_S_CONFIG
- PwdwnIdleCounter : FSP_M_CONFIG
- PxRcConfig : FSP_S_CONFIG
Generated on Wed Aug 22 2018 17:48:56 for CoffeeLake Intel(R) Firmware Support Package (FSP) Integration Guide by 1.8.10