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CoffeeLake Intel(R) Firmware Support Package (FSP) Integration Guide
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Class List
Here are the classes, structs, unions and interfaces with brief descriptions:
| CAUDIO_AZALIA_VERB_TABLE | Audio Azalia Verb Table structure |
| CAZALIA_HEADER | Azalia Header structure |
| CCHIPSET_INIT_INFO | The ChipsetInit Info structure provides the information of ME ChipsetInit CRC and BIOS ChipsetInit CRC |
| CDIMM_INFO | Memory SMBIOS & OC Memory Data Hob |
| CFIRMWARE_VERSION | Firmware Version Structure |
| CFIRMWARE_VERSION_INFO | Firmware Version Information Structure |
| CFIRMWARE_VERSION_INFO_HOB | Firmware Version Information HOB Structure |
| CFSP_M_CONFIG | Fsp M Configuration |
| CFSP_M_TEST_CONFIG | Fsp M Test Configuration |
| CFSP_S_CONFIG | Fsp S Configuration |
| CFSP_S_TEST_CONFIG | Fsp S Test Configuration |
| CFSP_T_CONFIG | Fsp T Configuration |
| CFSPM_UPD | Fsp M UPD Configuration |
| CFSPS_UPD | Fsp S UPD Configuration |
| CFSPT_CORE_UPD | Fsp T Core UPD |
| CFSPT_UPD | Fsp T UPD Configuration |
| CGPIO_CONFIG | GPIO configuration structure used for pin programming |
| CHOB_USAGE_DATA_HOB | Hob Usage Data Hob |
| CMEMORY_PLATFORM_DATA | Memory Platform Data Hob |
| CSI_PCH_DEVICE_INTERRUPT_CONFIG | The PCH_DEVICE_INTERRUPT_CONFIG block describes interrupt pin, IRQ and interrupt mode for PCH device |
| CSMBIOS_CACHE_INFO | SMBIOS Cache Info HOB Structure |
| CSMBIOS_PROCESSOR_INFO | SMBIOS Processor Info HOB Structure |
| CSMBIOS_STRUCTURE | The Smbios structure header |
Generated on Wed Aug 22 2018 17:48:56 for CoffeeLake Intel(R) Firmware Support Package (FSP) Integration Guide by
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