STM8L15x Standard Peripherals Drivers
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CLK driver modules. More...
Modules | |
Exported_Types | |
CLK_Private_Functions | |
GPIO_Private_Functions | |
Functions | |
void | CLK_AdjustHSICalibrationValue (uint8_t CLK_HSICalibrationValue) |
Adjusts the Internal High Speed oscillator (HSI) calibration value. | |
void | CLK_BEEPClockConfig (CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource) |
Configures the BEEP clock (BEEPCLK). | |
void | CLK_CCOConfig (CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv) |
Selects the clock source to output on CCO pin(PC4). | |
void | CLK_ClearFlag (void) |
Clears the CSS LSE Flag. | |
void | CLK_ClearITPendingBit (CLK_IT_TypeDef CLK_IT) |
Clears the CLK's interrupt pending bits. | |
void | CLK_ClockSecuritySystemEnable (void) |
Enables the Clock Security System. | |
void | CLK_ClockSecuritySytemDeglitchCmd (FunctionalState NewState) |
Enables the Clock Security System deglitcher system. | |
void | CLK_DeInit (void) |
Deinitializes the CLK peripheral registers to their default reset values. | |
uint32_t | CLK_GetClockFreq (void) |
Returns the frequencies of different the SYSCLK. | |
FlagStatus | CLK_GetFlagStatus (CLK_FLAG_TypeDef CLK_FLAG) |
Checks whether the specified CLK flag is set or not. | |
ITStatus | CLK_GetITStatus (CLK_IT_TypeDef CLK_IT) |
Checks whether the specified CLK interrupt has occurred or not. | |
CLK_SYSCLKSource_TypeDef | CLK_GetSYSCLKSource (void) |
Returns the clock source used as system clock. | |
void | CLK_HaltConfig (CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState) |
Configures clock during halt and active halt modes. | |
void | CLK_HSEConfig (CLK_HSE_TypeDef CLK_HSE) |
Configures the External High Speed oscillator (HSE). | |
void | CLK_HSICmd (FunctionalState NewState) |
Enables or disables the Internal High Speed oscillator (HSI). | |
void | CLK_ITConfig (CLK_IT_TypeDef CLK_IT, FunctionalState NewState) |
Enables or disables the specified CLK interrupts. | |
void | CLK_LSEClockSecuritySystemEnable (void) |
Enables the clock CSS on LSE. | |
void | CLK_LSEConfig (CLK_LSE_TypeDef CLK_LSE) |
Configures the External Low Speed oscillator (LSE). | |
void | CLK_LSICmd (FunctionalState NewState) |
Enables or disables the Internal Low Speed oscillator (LSI). | |
void | CLK_MainRegulatorCmd (FunctionalState NewState) |
Configures the main voltage regulator. | |
void | CLK_PeripheralClockConfig (CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState) |
Enables or disables the specified peripheral clock. | |
void | CLK_RTCCLKSwitchOnLSEFailureEnable (void) |
Enables RTC clock switch to LSI in case of LSE failure. | |
void | CLK_RTCClockConfig (CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv) |
Configures the RTC clock (RTCCLK). | |
void | CLK_SYSCLKDivConfig (CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv) |
Configures the System clock (SYSCLK) dividers. | |
void | CLK_SYSCLKSourceConfig (CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource) |
Configures the system clock (SYSCLK). | |
void | CLK_SYSCLKSourceSwitchCmd (FunctionalState NewState) |
Enables or disables the clock switch execution. | |
Variables | |
CONST uint8_t | SYSDivFactor [5] = {1, 2, 4, 8, 16} |
Detailed Description
CLK driver modules.
Function Documentation
void CLK_AdjustHSICalibrationValue | ( | uint8_t | CLK_HSICalibrationValue | ) |
Adjusts the Internal High Speed oscillator (HSI) calibration value.
- Note:
- The calibration is used to compensate for the variations in voltage and temperature that influence the frequency of the internal HSI RC.
- Note:
- Once HSITRIMR register configured, its value is used instead of the HSICALR register values.
Definition at line 182 of file stm8l15x_clk.c.
References CLK.
void CLK_BEEPClockConfig | ( | CLK_BEEPCLKSource_TypeDef | CLK_BEEPCLKSource | ) |
Configures the BEEP clock (BEEPCLK).
Definition at line 629 of file stm8l15x_clk.c.
References CLK, and IS_CLK_CLOCK_BEEP.
void CLK_CCOConfig | ( | CLK_CCOSource_TypeDef | CLK_CCOSource, |
CLK_CCODiv_TypeDef | CLK_CCODiv | ||
) |
Selects the clock source to output on CCO pin(PC4).
- Note:
- PC4 should be configured output push-pull with the speed that matches maximum output speed of the desired clock.
Definition at line 350 of file stm8l15x_clk.c.
References CLK, IS_CLK_OUTPUT, and IS_CLK_OUTPUT_DIVIDER.
void CLK_ClearFlag | ( | void | ) |
Clears the CSS LSE Flag.
Definition at line 1010 of file stm8l15x_clk.c.
References CSSLSE, and CSSLSE_CSR_CSSF.
void CLK_ClearITPendingBit | ( | CLK_IT_TypeDef | CLK_IT | ) |
Clears the CLK's interrupt pending bits.
Definition at line 1083 of file stm8l15x_clk.c.
References CLK, CLK_SWCR_SWIF, CSSLSE, CSSLSE_CSR_CSSF, and IS_CLK_CLEAR_IT.
void CLK_ClockSecuritySystemEnable | ( | void | ) |
Enables the Clock Security System.
- Note:
- If a failure is detected on the HSE oscillator clock, this oscillator is automatically disabled and an interrupt is generated to inform the software about the failure allowing the MCU to perform rescue operations.
- Once CSS is enabled it cannot be disabled until the next reset.
Definition at line 300 of file stm8l15x_clk.c.
References CLK, and CLK_CSSR_CSSEN.
void CLK_ClockSecuritySytemDeglitchCmd | ( | FunctionalState | NewState | ) |
Enables the Clock Security System deglitcher system.
Definition at line 311 of file stm8l15x_clk.c.
References CLK, CLK_CSSR_CSSDGON, DISABLE, and IS_FUNCTIONAL_STATE.
void CLK_DeInit | ( | void | ) |
Deinitializes the CLK peripheral registers to their default reset values.
Definition at line 114 of file stm8l15x_clk.c.
References CLK, CLK_CBEEPR_RESET_VALUE, CLK_CCOR_RESET_VALUE, CLK_CKDIVR_RESET_VALUE, CLK_CRTCR_RESET_VALUE, CLK_CSSR_RESET_VALUE, CLK_ECKCR_RESET_VALUE, CLK_HSICALR_RESET_VALUE, CLK_HSITRIMR_RESET_VALUE, CLK_HSIUNLCKR_RESET_VALUE, CLK_ICKCR_RESET_VALUE, CLK_PCKENR1_RESET_VALUE, CLK_PCKENR2_RESET_VALUE, CLK_PCKENR3_RESET_VALUE, CLK_REGCSR_RESET_VALUE, CLK_SWCR_RESET_VALUE, and CLK_SWR_RESET_VALUE.
uint32_t CLK_GetClockFreq | ( | void | ) |
Returns the frequencies of different the SYSCLK.
- Note:
- The system frequency computed by this function is not the real frequency in the chip. It is calculated based on the predefined constant and the selected clock source:
- If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
- If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
- If SYSCLK source is LSE, function returns values based on LSE_VALUE(***)
- If SYSCLK source is LSI, function returns values based on LSI_VALUE(****)
- (*) HSI_VALUE is a constant defined in stm8l15x.h file (default value 16 MHz) but the real value may vary depending on the variations in voltage and temperature.
- (**) HSE_VALUE is a constant defined in stm8l15x.h file (default value 16 MHz), user has to ensure that HSE_VALUE is same as the real frequency of the crystal used. Otherwise, this function may have wrong result.
- (***) LSI_VALUE is a constant defined in stm8l15x.h file (default value 38 KHz) but the real value may vary depending on the variations in voltage and temperature.
- (****) LSE_VALUE is a constant defined in stm8l15x.h file (default value 32,768 KHz), user has to ensure that LSE_VALUE is same as the real frequency of the crystal used. Otherwise, this function may have wrong result.
- The result of this function could be not correct when using fractional value for HSE crystal.
- Note:
- This function can be used by the user application to compute the baudrate for the communication peripherals or configure other parameters.
- Each time SYSCLK clock changes, this function must be called to update the returned value. Otherwise, any configuration based on this function will be incorrect.
Definition at line 472 of file stm8l15x_clk.c.
References CLK, CLK_CKDIVR_CKM, CLK_SYSCLKSource_HSE, CLK_SYSCLKSource_HSI, CLK_SYSCLKSource_LSI, HSE_VALUE, HSI_VALUE, LSE_VALUE, LSI_VALUE, and SYSDivFactor.
Referenced by I2C_Init(), and USART_Init().
FlagStatus CLK_GetFlagStatus | ( | CLK_FLAG_TypeDef | CLK_FLAG | ) |
Checks whether the specified CLK flag is set or not.
Definition at line 939 of file stm8l15x_clk.c.
References CLK, CSSLSE, IS_CLK_FLAGS, RESET, and SET.
ITStatus CLK_GetITStatus | ( | CLK_IT_TypeDef | CLK_IT | ) |
Checks whether the specified CLK interrupt has occurred or not.
Definition at line 1026 of file stm8l15x_clk.c.
References CLK, CLK_IT_LSECSSF, CLK_IT_SWIF, CSSLSE, IS_CLK_IT, RESET, and SET.
CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource | ( | void | ) |
Returns the clock source used as system clock.
Definition at line 429 of file stm8l15x_clk.c.
References CLK.
void CLK_HaltConfig | ( | CLK_Halt_TypeDef | CLK_Halt, |
FunctionalState | NewState | ||
) |
Configures clock during halt and active halt modes.
Definition at line 801 of file stm8l15x_clk.c.
References CLK, DISABLE, IS_CLK_HALT, and IS_FUNCTIONAL_STATE.
void CLK_HSEConfig | ( | CLK_HSE_TypeDef | CLK_HSE | ) |
Configures the External High Speed oscillator (HSE).
- Note:
- After enabling the HSE (CLK_HSE_ON or CLK_HSE_Bypass), the application software should wait on HSERDY flag to be set indicating that HSE clock is stable and can be used to clock the system.
- HSE state can not be changed if it is used as system clock. In this case, you have to select another source of the system clock then change the HSE state (ex. disable it).
- The HSE is stopped by hardware when entering HALT and active HALT modes.
- Note:
- In case of Enabling HSE Bypass make sure that the HSE clock source is not used by the RTC, output or involved in a switching operation.
Definition at line 243 of file stm8l15x_clk.c.
References CLK, CLK_ECKCR_HSEBYP, CLK_ECKCR_HSEON, and IS_CLK_HSE.
void CLK_HSICmd | ( | FunctionalState | NewState | ) |
Enables or disables the Internal High Speed oscillator (HSI).
- Note:
- The HSI is stopped by hardware when entering Halt and active Halt modes. It is used (enabled by hardware) as system clock source after startup from Reset, wakeup from Halt and active Halt mode when the FHWU bit is set in the ICKCR register, or in case of HSE failure used as system clock (if the Clock Security System CSS is enabled).
- HSI can not be stopped if it is used as active CCO source, as active RTC clock, if the safe oscillator (AUX) is enabled or as system clock source, In this case, you have to select another source of the system clock then stop the HSI.
- After enabling the HSI, the application software should wait on HSIRDY flag to be set indicating that HSI clock is stable and can be used as system clock source.
- Note:
- When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator clock cycles.
Definition at line 154 of file stm8l15x_clk.c.
References CLK, CLK_ICKCR_HSION, DISABLE, and IS_FUNCTIONAL_STATE.
void CLK_ITConfig | ( | CLK_IT_TypeDef | CLK_IT, |
FunctionalState | NewState | ||
) |
Enables or disables the specified CLK interrupts.
Definition at line 869 of file stm8l15x_clk.c.
References CLK, CLK_CSSR_CSSDIE, CLK_IT_LSECSSF, CLK_IT_SWIF, CLK_SWCR_SWIEN, CSSLSE, CSSLSE_CSR_CSSIE, DISABLE, IS_CLK_IT, and IS_FUNCTIONAL_STATE.
void CLK_LSEClockSecuritySystemEnable | ( | void | ) |
Enables the clock CSS on LSE.
- Note:
- Once Enabled, only POR can Disable it.
Definition at line 759 of file stm8l15x_clk.c.
References CSSLSE, and CSSLSE_CSR_CSSEN.
void CLK_LSEConfig | ( | CLK_LSE_TypeDef | CLK_LSE | ) |
Configures the External Low Speed oscillator (LSE).
- Note:
- After enabling the LSE (CLK_LSE_ON or CLK_LSE_Bypass), the application software should wait on LSERDY flag to be set indicating that LSE clock is stable and can be used to clock the RTC.
- Note:
- In case of Enabling LSE Bypass make sure that the LSE clock source is not used by the RTC, output or involved in a switching operation.
Definition at line 274 of file stm8l15x_clk.c.
References CLK, CLK_ECKCR_LSEBYP, CLK_ECKCR_LSEON, and IS_CLK_LSE.
void CLK_LSICmd | ( | FunctionalState | NewState | ) |
Enables or disables the Internal Low Speed oscillator (LSI).
- Note:
- After enabling the LSI, the application software should wait on LSIRDY flag to be set indicating that LSI clock is stable and can be used to clock the IWDG and/or the RTC.
- LSI can not be disabled if used as system clock source, as active CCO source, as BEEP clock source while BEEPAHALT bit is set or, as RTC active clock source.
- Note:
- When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator clock cycles.
Definition at line 206 of file stm8l15x_clk.c.
References CLK, CLK_ICKCR_LSION, DISABLE, and IS_FUNCTIONAL_STATE.
void CLK_MainRegulatorCmd | ( | FunctionalState | NewState | ) |
Configures the main voltage regulator.
Definition at line 825 of file stm8l15x_clk.c.
References CLK, CLK_REGCSR_REGOFF, DISABLE, and IS_FUNCTIONAL_STATE.
void CLK_PeripheralClockConfig | ( | CLK_Peripheral_TypeDef | CLK_Peripheral, |
FunctionalState | NewState | ||
) |
Enables or disables the specified peripheral clock.
- Note:
- After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
Definition at line 671 of file stm8l15x_clk.c.
References CLK, DISABLE, IS_CLK_PERIPHERAL, and IS_FUNCTIONAL_STATE.
void CLK_RTCCLKSwitchOnLSEFailureEnable | ( | void | ) |
Enables RTC clock switch to LSI in case of LSE failure.
- Note:
- Once Enabled, only POR can Disable it.
Definition at line 771 of file stm8l15x_clk.c.
References CSSLSE, and CSSLSE_CSR_SWITCHEN.
void CLK_RTCClockConfig | ( | CLK_RTCCLKSource_TypeDef | CLK_RTCCLKSource, |
CLK_RTCCLKDiv_TypeDef | CLK_RTCCLKDiv | ||
) |
Configures the RTC clock (RTCCLK).
- Note:
- If the LSE or LSI is used as RTC clock source, the RTC continues to work in HALT and Active HALT modes, and can be used as wakeup source. However, when the HSE clock is used as RTC clock source.
- The maximum input clock frequency for RTC is 1MHz (when using HSE/HSI as RTC clock source).
Definition at line 610 of file stm8l15x_clk.c.
References CLK, IS_CLK_CLOCK_RTC, and IS_CLK_CLOCK_RTC_DIV.
void CLK_SYSCLKDivConfig | ( | CLK_SYSCLKDiv_TypeDef | CLK_SYSCLKDiv | ) |
Configures the System clock (SYSCLK) dividers.
Definition at line 522 of file stm8l15x_clk.c.
References CLK, and IS_CLK_SYSTEM_DIVIDER.
void CLK_SYSCLKSourceConfig | ( | CLK_SYSCLKSource_TypeDef | CLK_SYSCLKSource | ) |
Configures the system clock (SYSCLK).
- Note:
- The HSI is used (enabled by hardware) as system clock source after startup from Reset, wake-up from Halt and active Halt modes, or in case of failure of the HSE used as system clock (if the Clock Security System CSS is enabled).
- A switch from one clock source to another occurs only if the target clock source is ready (clock stable after startup delay or PLL locked). You can use CLK_GetSYSCLKSource() function to know which clock is currently used as system clock source.
Definition at line 410 of file stm8l15x_clk.c.
References CLK, and IS_CLK_SOURCE.
void CLK_SYSCLKSourceSwitchCmd | ( | FunctionalState | NewState | ) |
Enables or disables the clock switch execution.
Definition at line 535 of file stm8l15x_clk.c.
References CLK, CLK_SWCR_SWEN, DISABLE, and IS_FUNCTIONAL_STATE.
Variable Documentation
CONST uint8_t SYSDivFactor[5] = {1, 2, 4, 8, 16} |
Holds the different Master clock Divider factors
Definition at line 68 of file stm8l15x_clk.c.
Referenced by CLK_GetClockFreq().