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STM32L4R9I_EVAL BSP User Manual
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stm32l4r9i_eval_ospi_nor.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4r9i_eval_ospi_nor.c 00004 * @author MCD Application Team 00005 * @brief This file includes a standard driver for the MX25UM51245G OSPI 00006 * memory mounted on STM32L4R9I-EVAL board. 00007 @verbatim 00008 ============================================================================== 00009 ##### How to use this driver ##### 00010 ============================================================================== 00011 [..] 00012 (#) This driver is used to drive the MX25UM51245G OSPI external 00013 memory mounted on STM32L4R9I-EVAL evaluation board. 00014 00015 (#) This driver need a specific component driver (MX25UM51245G) to be included with. 00016 00017 (#) Initialization steps: 00018 (++) Initialize the OPSI external memory using the BSP_OSPI_NOR_Init() function. This 00019 function includes the MSP layer hardware resources initialization and the 00020 OSPI interface with the external memory. 00021 00022 (#) OSPI memory operations 00023 (++) OSPI memory can be accessed with read/write operations once it is 00024 initialized. 00025 Read/write operation can be performed with AHB access using the functions 00026 BSP_OSPI_NOR_Read()/BSP_OSPI_NOR_Write(). 00027 (++) The function BSP_OSPI_NOR_GetInfo() returns the configuration of the OSPI memory. 00028 (see the OSPI memory data sheet) 00029 (++) Perform erase block operation using the function BSP_OSPI_NOR_Erase_Block() and by 00030 specifying the block address. You can perform an erase operation of the whole 00031 chip by calling the function BSP_OSPI_NOR_Erase_Chip(). 00032 (++) The function BSP_OSPI_NOR_GetStatus() returns the current status of the OSPI memory. 00033 (see the OSPI memory data sheet) 00034 @endverbatim 00035 ****************************************************************************** 00036 * @attention 00037 * 00038 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00039 * 00040 * Redistribution and use in source and binary forms, with or without modification, 00041 * are permitted provided that the following conditions are met: 00042 * 1. Redistributions of source code must retain the above copyright notice, 00043 * this list of conditions and the following disclaimer. 00044 * 2. Redistributions in binary form must reproduce the above copyright notice, 00045 * this list of conditions and the following disclaimer in the documentation 00046 * and/or other materials provided with the distribution. 00047 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00048 * may be used to endorse or promote products derived from this software 00049 * without specific prior written permission. 00050 * 00051 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00052 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00053 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00054 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00055 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00056 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00057 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00058 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00059 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00060 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00061 * 00062 ****************************************************************************** 00063 */ 00064 00065 /* Includes ------------------------------------------------------------------*/ 00066 #include "stm32l4r9i_eval_ospi_nor.h" 00067 00068 /** @addtogroup BSP 00069 * @{ 00070 */ 00071 00072 /** @addtogroup STM32L4R9I_EVAL 00073 * @{ 00074 */ 00075 00076 /** @defgroup STM32L4R9I_EVAL_OSPI_NOR STM32L4R9I_EVAL OSPI NOR 00077 * @{ 00078 */ 00079 00080 /* Private constants --------------------------------------------------------*/ 00081 /** @defgroup STM32L4R9I_EVAL_OSPI_NOR_Private_Constants Private Constants 00082 * @{ 00083 */ 00084 #define OSPI_NOR_OCTAL_DISABLE 0x0 00085 #define OSPI_NOR_OCTAL_ENABLE 0x1 00086 00087 #define DUMMY_CYCLES_READ_OCTAL MX25LM51245G_DUMMY_CYCLES_READ_OCTAL_66M 00088 #define DUMMY_CYCLES_CR_CFG MX25LM51245G_CR2_DC_66M 00089 /** 00090 * @} 00091 */ 00092 00093 /* Uncomment this line to use the memory in SDR mode */ 00094 //#define BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00095 00096 /* Private variables ---------------------------------------------------------*/ 00097 00098 /** @defgroup STM32L4R9I_EVAL_OSPI_NOR_Private_Variables Private Variables 00099 * @{ 00100 */ 00101 OSPI_HandleTypeDef OSPINORHandle; 00102 00103 /** 00104 * @} 00105 */ 00106 00107 00108 /* Private functions ---------------------------------------------------------*/ 00109 00110 /** @defgroup STM32L4R9I_EVAL_OSPI_NOR_Private_Functions Private Functions 00111 * @{ 00112 */ 00113 static void OSPI_NOR_MspInit (void); 00114 static void OSPI_NOR_MspDeInit (void); 00115 static uint8_t OSPI_NOR_ResetMemory (OSPI_HandleTypeDef *hospi); 00116 static uint8_t OSPI_NOR_WriteEnable (OSPI_HandleTypeDef *hospi); 00117 static uint8_t OSPI_NOR_AutoPollingMemReady(OSPI_HandleTypeDef *hospi, uint32_t Timeout); 00118 static uint8_t OSPI_NOR_OctalMode (OSPI_HandleTypeDef *hospi, uint8_t Operation); 00119 /** 00120 * @} 00121 */ 00122 00123 /* Exported functions ---------------------------------------------------------*/ 00124 00125 /** @addtogroup STM32L4R9I_EVAL_OSPI_NOR_Exported_Functions 00126 * @{ 00127 */ 00128 00129 /** 00130 * @brief Initializes the OSPI interface. 00131 * @retval OSPI memory status 00132 */ 00133 uint8_t BSP_OSPI_NOR_Init(void) 00134 { 00135 OSPINORHandle.Instance = OCTOSPI1; 00136 00137 /* Call the DeInit function to reset the driver */ 00138 if (HAL_OSPI_DeInit(&OSPINORHandle) != HAL_OK) 00139 { 00140 return OSPI_NOR_ERROR; 00141 } 00142 00143 /* System level initialization */ 00144 OSPI_NOR_MspInit(); 00145 00146 /* OctoSPI initialization */ 00147 OSPINORHandle.Init.FifoThreshold = 4; 00148 OSPINORHandle.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE; 00149 OSPINORHandle.Init.DeviceSize = POSITION_VAL(MX25LM51245G_FLASH_SIZE); /* 512 MBits */ 00150 OSPINORHandle.Init.ChipSelectHighTime = 2; 00151 OSPINORHandle.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE; 00152 OSPINORHandle.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0; 00153 OSPINORHandle.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED; 00154 OSPINORHandle.Init.ClockPrescaler = 2; /* OctoSPI clock = 110MHz / ClockPrescaler = 55MHz */ 00155 OSPINORHandle.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE; 00156 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00157 OSPINORHandle.Init.MemoryType = HAL_OSPI_MEMTYPE_MICRON; 00158 OSPINORHandle.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_DISABLE; 00159 #else 00160 OSPINORHandle.Init.MemoryType = HAL_OSPI_MEMTYPE_MACRONIX; 00161 OSPINORHandle.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE; 00162 #endif 00163 OSPINORHandle.Init.ChipSelectBoundary = 0; 00164 00165 if (HAL_OSPI_Init(&OSPINORHandle) != HAL_OK) 00166 { 00167 return OSPI_NOR_ERROR; 00168 } 00169 00170 /* OctoSPI memory reset */ 00171 if (OSPI_NOR_ResetMemory(&OSPINORHandle) != OSPI_NOR_OK) 00172 { 00173 return OSPI_NOR_NOT_SUPPORTED; 00174 } 00175 00176 /* OctoSPI octal enable */ 00177 if (OSPI_NOR_OctalMode(&OSPINORHandle, OSPI_NOR_OCTAL_ENABLE) != OSPI_NOR_OK) 00178 { 00179 return OSPI_NOR_ERROR; 00180 } 00181 00182 return OSPI_NOR_OK; 00183 } 00184 00185 /** 00186 * @brief De-Initializes the OSPI interface. 00187 * @retval OSPI memory status 00188 */ 00189 uint8_t BSP_OSPI_NOR_DeInit(void) 00190 { 00191 OSPINORHandle.Instance = OCTOSPI1; 00192 00193 /* Abort any activity on OctoSPI (eg Memory-mapped mode) */ 00194 if (HAL_OSPI_GetState(&OSPINORHandle) != HAL_OSPI_STATE_READY) 00195 { 00196 if (HAL_OSPI_Abort(&OSPINORHandle) != HAL_OK) 00197 { 00198 return OSPI_NOR_ERROR; 00199 } 00200 } 00201 00202 /* OctoSPI octal mode disable */ 00203 if (OSPI_NOR_OctalMode(&OSPINORHandle, OSPI_NOR_OCTAL_DISABLE) != OSPI_NOR_OK) 00204 { 00205 return OSPI_NOR_ERROR; 00206 } 00207 00208 /* Call the DeInit function to reset the driver */ 00209 if (HAL_OSPI_DeInit(&OSPINORHandle) != HAL_OK) 00210 { 00211 return OSPI_NOR_ERROR; 00212 } 00213 00214 /* System level De-initialization */ 00215 OSPI_NOR_MspDeInit(); 00216 00217 return OSPI_NOR_OK; 00218 } 00219 00220 /** 00221 * @brief Reads an amount of data from the OSPI memory. 00222 * @param pData: Pointer to data to be read 00223 * @param ReadAddr: Read start address 00224 * @param Size: Size of data to read 00225 * @retval OSPI memory status 00226 */ 00227 uint8_t BSP_OSPI_NOR_Read(uint8_t* pData, uint32_t ReadAddr, uint32_t Size) 00228 { 00229 OSPI_RegularCmdTypeDef sCommand; 00230 00231 /* Initialize the read command */ 00232 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00233 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00234 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00235 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00236 sCommand.Address = ReadAddr; 00237 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00238 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00239 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00240 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 00241 sCommand.NbData = Size; 00242 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 00243 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00244 00245 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00246 sCommand.Instruction = OCTAL_IO_READ_CMD; 00247 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00248 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00249 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 00250 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00251 #else 00252 sCommand.Instruction = OCTAL_IO_DTR_READ_CMD; 00253 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00254 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00255 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 00256 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 00257 #endif 00258 00259 /* Configure the command */ 00260 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00261 { 00262 return OSPI_NOR_ERROR; 00263 } 00264 00265 /* Reception of the data */ 00266 if (HAL_OSPI_Receive(&OSPINORHandle, pData, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00267 { 00268 return OSPI_NOR_ERROR; 00269 } 00270 00271 return OSPI_NOR_OK; 00272 } 00273 00274 /** 00275 * @brief Writes an amount of data to the OSPI memory. 00276 * @param pData: Pointer to data to be written 00277 * @param WriteAddr: Write start address 00278 * @param Size: Size of data to write 00279 * @retval OSPI memory status 00280 */ 00281 uint8_t BSP_OSPI_NOR_Write(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) 00282 { 00283 OSPI_RegularCmdTypeDef sCommand; 00284 uint32_t end_addr, current_size, current_addr; 00285 00286 /* Calculation of the size between the write address and the end of the page */ 00287 current_size = MX25LM51245G_PAGE_SIZE - (WriteAddr % MX25LM51245G_PAGE_SIZE); 00288 00289 /* Check if the size of the data is less than the remaining place in the page */ 00290 if (current_size > Size) 00291 { 00292 current_size = Size; 00293 } 00294 00295 /* Initialize the adress variables */ 00296 current_addr = WriteAddr; 00297 end_addr = WriteAddr + Size; 00298 00299 /* Initialize the program command */ 00300 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00301 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00302 sCommand.Instruction = OCTAL_PAGE_PROG_CMD; 00303 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00304 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00305 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00306 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00307 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00308 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 00309 sCommand.DummyCycles = 0; 00310 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00311 00312 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00313 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00314 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00315 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 00316 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00317 #else 00318 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00319 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00320 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 00321 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 00322 #endif 00323 00324 /* Perform the write page by page */ 00325 do 00326 { 00327 sCommand.Address = current_addr; 00328 sCommand.NbData = current_size; 00329 00330 /* Enable write operations */ 00331 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00332 { 00333 return OSPI_NOR_ERROR; 00334 } 00335 00336 /* Configure the command */ 00337 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00338 { 00339 return OSPI_NOR_ERROR; 00340 } 00341 00342 /* Transmission of the data */ 00343 if (HAL_OSPI_Transmit(&OSPINORHandle, pData, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00344 { 00345 return OSPI_NOR_ERROR; 00346 } 00347 00348 /* Configure automatic polling mode to wait for end of program */ 00349 if (OSPI_NOR_AutoPollingMemReady(&OSPINORHandle, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != OSPI_NOR_OK) 00350 { 00351 return OSPI_NOR_ERROR; 00352 } 00353 00354 /* Update the address and size variables for next page programming */ 00355 current_addr += current_size; 00356 pData += current_size; 00357 current_size = ((current_addr + MX25LM51245G_PAGE_SIZE) > end_addr) ? (end_addr - current_addr) : MX25LM51245G_PAGE_SIZE; 00358 } while (current_addr < end_addr); 00359 00360 return OSPI_NOR_OK; 00361 } 00362 00363 /** 00364 * @brief Erases the specified block of the OSPI memory. 00365 * @param BlockAddress: Block address to erase 00366 * @retval OSPI memory status 00367 */ 00368 uint8_t BSP_OSPI_NOR_Erase_Block(uint32_t BlockAddress) 00369 { 00370 OSPI_RegularCmdTypeDef sCommand; 00371 00372 /* Initialize the erase command */ 00373 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00374 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00375 sCommand.Instruction = OCTAL_BLOCK_ERASE_CMD; 00376 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00377 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00378 sCommand.Address = BlockAddress; 00379 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00380 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00381 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00382 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00383 sCommand.DummyCycles = 0; 00384 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00385 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00386 00387 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00388 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00389 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00390 #else 00391 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00392 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00393 #endif 00394 00395 /* Enable write operations */ 00396 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00397 { 00398 return OSPI_NOR_ERROR; 00399 } 00400 00401 /* Send the command */ 00402 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00403 { 00404 return OSPI_NOR_ERROR; 00405 } 00406 00407 /* Configure automatic polling mode to wait for end of erase */ 00408 if (OSPI_NOR_AutoPollingMemReady(&OSPINORHandle, MX25LM51245G_BLOCK_ERASE_MAX_TIME) != OSPI_NOR_OK) 00409 { 00410 return OSPI_NOR_ERROR; 00411 } 00412 00413 return OSPI_NOR_OK; 00414 } 00415 00416 /** 00417 * @brief Erases the specified sector of the OSPI memory. 00418 * @param Sector: Sector address to erase (0 to 255) 00419 * @retval OSPI memory status 00420 * @note This function is non blocking meaning that sector erase 00421 * operation is started but not completed when the function 00422 * returns. Application has to call BSP_QSPI_GetStatus() 00423 * to know when the device is available again (i.e. erase operation 00424 * completed). 00425 */ 00426 uint8_t BSP_OSPI_NOR_Erase_Sector(uint32_t Sector) 00427 { 00428 OSPI_RegularCmdTypeDef sCommand; 00429 00430 if (Sector >= (uint32_t)(MX25LM51245G_FLASH_SIZE/MX25LM51245G_SECTOR_SIZE)) 00431 { 00432 return OSPI_NOR_ERROR; 00433 } 00434 00435 /* Initialize the erase command */ 00436 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00437 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00438 sCommand.Instruction = OCTAL_SECTOR_ERASE_CMD; 00439 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00440 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00441 sCommand.Address = (Sector * MX25LM51245G_SECTOR_SIZE); 00442 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00443 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00444 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00445 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00446 sCommand.DummyCycles = 0; 00447 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00448 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00449 00450 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00451 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00452 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00453 #else 00454 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00455 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00456 #endif 00457 00458 /* Enable write operations */ 00459 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00460 { 00461 return OSPI_NOR_ERROR; 00462 } 00463 00464 /* Send the command */ 00465 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00466 { 00467 return OSPI_NOR_ERROR; 00468 } 00469 00470 return OSPI_NOR_OK; 00471 } 00472 00473 /** 00474 * @brief Erases the entire OSPI memory. 00475 * @retval OSPI memory status 00476 */ 00477 uint8_t BSP_OSPI_NOR_Erase_Chip(void) 00478 { 00479 OSPI_RegularCmdTypeDef sCommand; 00480 00481 /* Initialize the erase command */ 00482 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00483 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00484 sCommand.Instruction = OCTAL_CHIP_ERASE_CMD; 00485 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00486 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00487 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00488 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00489 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00490 sCommand.DummyCycles = 0; 00491 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00492 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00493 00494 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00495 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00496 #else 00497 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00498 #endif 00499 00500 /* Enable write operations */ 00501 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00502 { 00503 return OSPI_NOR_ERROR; 00504 } 00505 00506 /* Send the command */ 00507 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00508 { 00509 return OSPI_NOR_ERROR; 00510 } 00511 00512 /* Configure automatic polling mode to wait for end of erase */ 00513 if (OSPI_NOR_AutoPollingMemReady(&OSPINORHandle, MX25LM51245G_CHIP_ERASE_MAX_TIME) != OSPI_NOR_OK) 00514 { 00515 return OSPI_NOR_ERROR; 00516 } 00517 00518 return OSPI_NOR_OK; 00519 } 00520 00521 /** 00522 * @brief Reads current status of the OSPI memory. 00523 * @retval OSPI memory status 00524 */ 00525 uint8_t BSP_OSPI_NOR_GetStatus(void) 00526 { 00527 OSPI_RegularCmdTypeDef sCommand; 00528 uint8_t reg[2]; 00529 00530 /* Initialize the read security register command */ 00531 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00532 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00533 sCommand.Instruction = OCTAL_READ_SECURITY_REG_CMD; 00534 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00535 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00536 sCommand.Address = 0; 00537 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00538 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00539 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00540 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 00541 sCommand.NbData = 2; 00542 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 00543 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00544 00545 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00546 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00547 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00548 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 00549 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00550 #else 00551 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00552 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00553 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 00554 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 00555 #endif 00556 00557 /* Configure the command */ 00558 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00559 { 00560 return OSPI_NOR_ERROR; 00561 } 00562 00563 /* Reception of the data */ 00564 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00565 { 00566 return OSPI_NOR_ERROR; 00567 } 00568 00569 /* Check the value of the register */ 00570 if ((reg[0] & (MX25LM51245G_SECR_P_FAIL | MX25LM51245G_SECR_E_FAIL)) != 0) 00571 { 00572 return OSPI_NOR_ERROR; 00573 } 00574 else if ((reg[0] & (MX25LM51245G_SECR_PSB | MX25LM51245G_SECR_ESB)) != 0) 00575 { 00576 return OSPI_NOR_SUSPENDED; 00577 } 00578 00579 /* Initialize the read status register command */ 00580 sCommand.Instruction = OCTAL_READ_STATUS_REG_CMD; 00581 00582 /* Configure the command */ 00583 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00584 { 00585 return OSPI_NOR_ERROR; 00586 } 00587 00588 /* Reception of the data */ 00589 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00590 { 00591 return OSPI_NOR_ERROR; 00592 } 00593 00594 /* Check the value of the register */ 00595 if ((reg[0] & MX25LM51245G_SR_WIP) != 0) 00596 { 00597 return OSPI_NOR_BUSY; 00598 } 00599 else 00600 { 00601 return OSPI_NOR_OK; 00602 } 00603 } 00604 00605 /** 00606 * @brief Return the configuration of the OSPI memory. 00607 * @param pInfo: pointer on the configuration structure 00608 * @retval OSPI memory status 00609 */ 00610 uint8_t BSP_OSPI_NOR_GetInfo(OSPI_NOR_Info* pInfo) 00611 { 00612 /* Configure the structure with the memory configuration */ 00613 pInfo->FlashSize = MX25LM51245G_FLASH_SIZE; 00614 pInfo->EraseSectorSize = MX25LM51245G_BLOCK_SIZE; 00615 pInfo->EraseSectorsNumber = (MX25LM51245G_FLASH_SIZE/MX25LM51245G_BLOCK_SIZE); 00616 pInfo->ProgPageSize = MX25LM51245G_PAGE_SIZE; 00617 pInfo->ProgPagesNumber = (MX25LM51245G_FLASH_SIZE/MX25LM51245G_PAGE_SIZE); 00618 00619 return OSPI_NOR_OK; 00620 } 00621 00622 /** 00623 * @brief Configure the OSPI in memory-mapped mode 00624 * @retval OSPI memory status 00625 */ 00626 uint8_t BSP_OSPI_NOR_EnableMemoryMappedMode(void) 00627 { 00628 OSPI_RegularCmdTypeDef sCommand; 00629 OSPI_MemoryMappedTypeDef sMemMappedCfg; 00630 00631 /* Enable write operations */ 00632 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00633 { 00634 return OSPI_NOR_ERROR; 00635 } 00636 00637 /* Configure the command for the read instruction */ 00638 sCommand.OperationType = HAL_OSPI_OPTYPE_READ_CFG; 00639 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00640 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00641 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00642 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00643 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00644 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00645 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 00646 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 00647 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00648 00649 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00650 sCommand.Instruction = OCTAL_IO_READ_CMD; 00651 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00652 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00653 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 00654 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00655 #else 00656 sCommand.Instruction = OCTAL_IO_DTR_READ_CMD; 00657 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00658 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00659 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 00660 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 00661 #endif 00662 00663 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00664 { 00665 return OSPI_NOR_ERROR; 00666 } 00667 00668 /* Configure the command for the write instruction */ 00669 sCommand.OperationType = HAL_OSPI_OPTYPE_WRITE_CFG; 00670 sCommand.Instruction = OCTAL_PAGE_PROG_CMD; 00671 sCommand.DummyCycles = 0; 00672 00673 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00674 { 00675 return OSPI_NOR_ERROR; 00676 } 00677 00678 /* Configure the memory mapped mode */ 00679 sMemMappedCfg.TimeOutActivation = HAL_OSPI_TIMEOUT_COUNTER_DISABLE; 00680 00681 if (HAL_OSPI_MemoryMapped(&OSPINORHandle, &sMemMappedCfg) != HAL_OK) 00682 { 00683 return OSPI_NOR_ERROR; 00684 } 00685 00686 return OSPI_NOR_OK; 00687 } 00688 00689 /** 00690 * @brief This function suspends an ongoing erase command. 00691 * @retval OSPI memory status 00692 */ 00693 uint8_t BSP_OSPI_NOR_SuspendErase(void) 00694 { 00695 OSPI_RegularCmdTypeDef sCommand; 00696 00697 /* Check whether the device is busy (erase operation is 00698 in progress). 00699 */ 00700 if (BSP_OSPI_NOR_GetStatus() == OSPI_NOR_BUSY) 00701 { 00702 /* Initialize the suspend command */ 00703 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00704 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00705 sCommand.Instruction = OCTAL_PROG_ERASE_SUSPEND_CMD; 00706 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00707 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00708 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00709 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00710 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00711 sCommand.DummyCycles = 0; 00712 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00713 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00714 00715 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00716 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00717 #else 00718 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00719 #endif 00720 00721 /* Send the command */ 00722 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00723 { 00724 return OSPI_NOR_ERROR; 00725 } 00726 00727 if (BSP_OSPI_NOR_GetStatus() == OSPI_NOR_SUSPENDED) 00728 { 00729 return OSPI_NOR_OK; 00730 } 00731 00732 return OSPI_NOR_ERROR; 00733 } 00734 00735 return OSPI_NOR_OK; 00736 } 00737 00738 /** 00739 * @brief This function resumes a paused erase command. 00740 * @retval OSPI memory status 00741 */ 00742 uint8_t BSP_OSPI_NOR_ResumeErase(void) 00743 { 00744 OSPI_RegularCmdTypeDef sCommand; 00745 00746 /* Check whether the device is in suspended state */ 00747 if (BSP_OSPI_NOR_GetStatus() == OSPI_NOR_SUSPENDED) 00748 { 00749 /* Initialize the resume command */ 00750 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00751 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00752 sCommand.Instruction = OCTAL_PROG_ERASE_RESUME_CMD; 00753 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00754 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00755 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00756 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00757 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00758 sCommand.DummyCycles = 0; 00759 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00760 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00761 00762 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00763 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00764 #else 00765 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00766 #endif 00767 00768 /* Send the command */ 00769 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00770 { 00771 return OSPI_NOR_ERROR; 00772 } 00773 00774 /* 00775 When this command is executed, the status register write in progress bit is set to 1, and 00776 the flag status register program erase controller bit is set to 0. This command is ignored 00777 if the device is not in a suspended state. 00778 */ 00779 00780 if (BSP_OSPI_NOR_GetStatus() == OSPI_NOR_BUSY) 00781 { 00782 return OSPI_NOR_OK; 00783 } 00784 00785 return OSPI_NOR_ERROR; 00786 } 00787 00788 return OSPI_NOR_OK; 00789 } 00790 00791 /** 00792 * @brief This function enter the OSPI memory in deep power down mode. 00793 * @retval OSPI memory status 00794 */ 00795 uint8_t BSP_OSPI_NOR_EnterDeepPowerDown(void) 00796 { 00797 OSPI_RegularCmdTypeDef sCommand; 00798 00799 /* Initialize the deep power down command */ 00800 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00801 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00802 sCommand.Instruction = OCTAL_ENTER_DEEP_POWER_DOWN_CMD; 00803 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00804 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00805 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00806 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00807 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00808 sCommand.DummyCycles = 0; 00809 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00810 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00811 00812 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00813 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00814 #else 00815 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00816 #endif 00817 00818 /* Send the command */ 00819 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00820 { 00821 return OSPI_NOR_ERROR; 00822 } 00823 00824 /* --- Memory takes 10us max to enter deep power down --- */ 00825 00826 return OSPI_NOR_OK; 00827 } 00828 00829 /** 00830 * @brief This function leave the OSPI memory from deep power down mode. 00831 * @retval OSPI memory status 00832 */ 00833 uint8_t BSP_OSPI_NOR_LeaveDeepPowerDown(void) 00834 { 00835 OSPI_RegularCmdTypeDef sCommand; 00836 00837 /* Initialize the nop command */ 00838 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00839 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00840 sCommand.Instruction = OCTAL_NO_OPERATION_CMD; 00841 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00842 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00843 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00844 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00845 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00846 sCommand.DummyCycles = 0; 00847 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00848 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00849 00850 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00851 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00852 #else 00853 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00854 #endif 00855 00856 /* Send the command */ 00857 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00858 { 00859 return OSPI_NOR_ERROR; 00860 } 00861 00862 /* --- A NOP command is sent to the memory, as the nCS should be low for at least 20 ns --- */ 00863 /* --- Memory takes 30us min to leave deep power down --- */ 00864 00865 return OSPI_NOR_OK; 00866 } 00867 /** 00868 * @} 00869 */ 00870 00871 /** @addtogroup STM32L4R9I_EVAL_OSPI_NOR_Private_Functions 00872 * @{ 00873 */ 00874 00875 /** 00876 * @brief Initializes the OSPI MSP. 00877 * @retval None 00878 */ 00879 static void OSPI_NOR_MspInit(void) 00880 { 00881 GPIO_InitTypeDef GPIO_InitStruct; 00882 00883 /* Enable the OctoSPI memory interface clock */ 00884 __HAL_RCC_OSPIM_CLK_ENABLE(); 00885 __HAL_RCC_OSPI1_CLK_ENABLE(); 00886 00887 /* Reset the OctoSPI memory interface */ 00888 __HAL_RCC_OSPI1_FORCE_RESET(); 00889 __HAL_RCC_OSPI1_RELEASE_RESET(); 00890 00891 /* Enable GPIO clocks */ 00892 /* IOSV bit MUST be set to access GPIO port G[2:15] */ 00893 __HAL_RCC_PWR_CLK_ENABLE(); 00894 SET_BIT(PWR->CR2, PWR_CR2_IOSV); 00895 00896 __HAL_RCC_GPIOA_CLK_ENABLE(); 00897 __HAL_RCC_GPIOB_CLK_ENABLE(); 00898 __HAL_RCC_GPIOC_CLK_ENABLE(); 00899 __HAL_RCC_GPIOG_CLK_ENABLE(); 00900 __HAL_RCC_GPIOH_CLK_ENABLE(); 00901 00902 /* OctoSPI CS GPIO pin configuration */ 00903 GPIO_InitStruct.Pin = GPIO_PIN_2; 00904 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 00905 GPIO_InitStruct.Pull = GPIO_PULLUP; 00906 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 00907 GPIO_InitStruct.Alternate = GPIO_AF10_OCTOSPIM_P1; 00908 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 00909 00910 /* OctoSPI DQS GPIO pins configuration */ 00911 GPIO_InitStruct.Pin = GPIO_PIN_2; 00912 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 00913 00914 /* OctoSPI CLK, D2 and D3 GPIO pins configuration */ 00915 GPIO_InitStruct.Pin = (GPIO_PIN_3 | GPIO_PIN_6 | GPIO_PIN_7); 00916 GPIO_InitStruct.Pull = GPIO_NOPULL; 00917 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 00918 00919 /* OctoSPI D0 and D1 GPIO pins configuration */ 00920 GPIO_InitStruct.Pin = (GPIO_PIN_0 | GPIO_PIN_1); 00921 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 00922 00923 /* OctoSPI D6 and D7 GPIO pins configuration */ 00924 GPIO_InitStruct.Pin = (GPIO_PIN_3 | GPIO_PIN_4); 00925 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 00926 00927 /* OctoSPI D5 GPIO pins configuration */ 00928 GPIO_InitStruct.Pin = (GPIO_PIN_11); 00929 GPIO_InitStruct.Alternate = GPIO_AF3_OCTOSPIM_P1; 00930 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 00931 00932 /* OctoSPI D4 GPIO pins configuration */ 00933 GPIO_InitStruct.Pin = (GPIO_PIN_2); 00934 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); 00935 } 00936 00937 /** 00938 * @brief De-Initializes the OSPI MSP. 00939 * @retval None 00940 */ 00941 static void OSPI_NOR_MspDeInit(void) 00942 { 00943 GPIO_InitTypeDef GPIO_InitStruct; 00944 00945 /* OctoSPI CLK, CS, D0-D7, DQS GPIO pins de-configuration */ 00946 HAL_GPIO_DeInit(GPIOA, (GPIO_PIN_6 | GPIO_PIN_7)); 00947 HAL_GPIO_DeInit(GPIOB, (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2)); 00948 HAL_GPIO_DeInit(GPIOC, (GPIO_PIN_3 | GPIO_PIN_4)); 00949 HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11); 00950 HAL_GPIO_DeInit(GPIOH, GPIO_PIN_2); 00951 00952 /* Set GPIOA pin 2 in pull up mode (optimum default setting) */ 00953 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 00954 GPIO_InitStruct.Pin = GPIO_PIN_2; 00955 GPIO_InitStruct.Pull = GPIO_NOPULL; 00956 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 00957 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 00958 00959 /* Set GPIOA pin 3 in no pull, low state (optimum default setting) */ 00960 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 00961 GPIO_InitStruct.Pull = GPIO_NOPULL; 00962 GPIO_InitStruct.Pin = GPIO_PIN_3; 00963 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 00964 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_3, GPIO_PIN_RESET); 00965 00966 /* Reset the OctoSPI memory interface */ 00967 __HAL_RCC_OSPI1_FORCE_RESET(); 00968 __HAL_RCC_OSPI1_RELEASE_RESET(); 00969 00970 /* Disable the OctoSPI memory interface clock */ 00971 __HAL_RCC_OSPI1_CLK_DISABLE(); 00972 } 00973 00974 /** 00975 * @brief This function reset the OSPI memory. 00976 * @param hospi: OSPI handle 00977 * @retval None 00978 */ 00979 static uint8_t OSPI_NOR_ResetMemory(OSPI_HandleTypeDef *hospi) 00980 { 00981 OSPI_RegularCmdTypeDef sCommand; 00982 OSPI_AutoPollingTypeDef sConfig; 00983 00984 /* Initialize the reset enable command */ 00985 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00986 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00987 sCommand.Instruction = RESET_ENABLE_CMD; 00988 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE; 00989 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS; 00990 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00991 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00992 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00993 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00994 sCommand.DummyCycles = 0; 00995 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00996 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00997 00998 /* Send the command */ 00999 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01000 { 01001 return OSPI_NOR_ERROR; 01002 } 01003 01004 /* Send the reset memory command */ 01005 sCommand.Instruction = RESET_MEMORY_CMD; 01006 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01007 { 01008 return OSPI_NOR_ERROR; 01009 } 01010 01011 /* Configure automatic polling mode to wait the memory is ready */ 01012 sCommand.Instruction = READ_STATUS_REG_CMD; 01013 sCommand.DataMode = HAL_OSPI_DATA_1_LINE; 01014 sCommand.NbData = 1; 01015 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01016 01017 sConfig.Match = 0; 01018 sConfig.Mask = MX25LM51245G_SR_WIP; 01019 sConfig.MatchMode = HAL_OSPI_MATCH_MODE_AND; 01020 sConfig.Interval = 0x10; 01021 sConfig.AutomaticStop = HAL_OSPI_AUTOMATIC_STOP_ENABLE; 01022 01023 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01024 { 01025 return OSPI_NOR_ERROR; 01026 } 01027 01028 if (HAL_OSPI_AutoPolling(&OSPINORHandle, &sConfig, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01029 { 01030 return OSPI_NOR_ERROR; 01031 } 01032 01033 return OSPI_NOR_OK; 01034 } 01035 01036 /** 01037 * @brief This function send a Write Enable and wait it is effective. 01038 * @param hospi: OSPI handle 01039 * @retval None 01040 */ 01041 static uint8_t OSPI_NOR_WriteEnable(OSPI_HandleTypeDef *hospi) 01042 { 01043 OSPI_RegularCmdTypeDef sCommand; 01044 OSPI_AutoPollingTypeDef sConfig; 01045 uint8_t reg[2]; 01046 01047 /* Enable write operations */ 01048 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 01049 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 01050 sCommand.Instruction = OCTAL_WRITE_ENABLE_CMD; 01051 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 01052 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 01053 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 01054 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 01055 sCommand.DataMode = HAL_OSPI_DATA_NONE; 01056 sCommand.DummyCycles = 0; 01057 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01058 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 01059 01060 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01061 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 01062 #else 01063 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 01064 #endif 01065 01066 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01067 { 01068 return OSPI_NOR_ERROR; 01069 } 01070 01071 /* Configure automatic polling mode to wait for write enabling */ 01072 sConfig.Match = MX25LM51245G_SR_WEL; 01073 sConfig.Mask = MX25LM51245G_SR_WEL; 01074 sConfig.MatchMode = HAL_OSPI_MATCH_MODE_AND; 01075 sConfig.Interval = 0x10; 01076 sConfig.AutomaticStop = HAL_OSPI_AUTOMATIC_STOP_ENABLE; 01077 01078 sCommand.Instruction = OCTAL_READ_STATUS_REG_CMD; 01079 sCommand.Address = 0x0; 01080 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 01081 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 01082 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 01083 sCommand.NbData = 2; 01084 01085 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01086 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 01087 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01088 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01089 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 01090 #else 01091 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 01092 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 01093 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 01094 sCommand.DummyCycles = 4; 01095 #endif 01096 01097 do 01098 { 01099 HAL_Delay(1); /* sConfig.Interval(0x10) / Clock(55 MHz) = 0.29 ms */ 01100 01101 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01102 { 01103 return OSPI_NOR_ERROR; 01104 } 01105 01106 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01107 { 01108 return OSPI_NOR_ERROR; 01109 } 01110 }while((reg[0] & sConfig.Mask ) != sConfig.Match); 01111 01112 return OSPI_NOR_OK; 01113 } 01114 01115 /** 01116 * @brief This function read the SR of the memory and wait the EOP. 01117 * @param hospi: OSPI handle 01118 * @param Timeout: Timeout for auto-polling 01119 * @retval None 01120 */ 01121 static uint8_t OSPI_NOR_AutoPollingMemReady(OSPI_HandleTypeDef *hospi, uint32_t Timeout) 01122 { 01123 OSPI_RegularCmdTypeDef sCommand; 01124 OSPI_AutoPollingTypeDef sConfig; 01125 uint8_t reg[2]; 01126 01127 /* Configure automatic polling mode to wait for memory ready */ 01128 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 01129 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 01130 sCommand.Instruction = OCTAL_READ_STATUS_REG_CMD; 01131 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 01132 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 01133 sCommand.Address = 0; 01134 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 01135 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 01136 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 01137 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 01138 sCommand.NbData = 2; 01139 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 01140 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 01141 01142 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01143 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 01144 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 01145 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01146 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01147 #else 01148 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 01149 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 01150 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 01151 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 01152 #endif 01153 01154 sConfig.Match = 0; 01155 sConfig.Mask = MX25LM51245G_SR_WIP; 01156 sConfig.MatchMode = HAL_OSPI_MATCH_MODE_AND; 01157 sConfig.Interval = 0x10; 01158 sConfig.AutomaticStop = HAL_OSPI_AUTOMATIC_STOP_ENABLE; 01159 01160 do 01161 { 01162 HAL_Delay(1); /* sConfig.Interval(0x10) / Clock(55 MHz) = 0.29 ms */ 01163 01164 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01165 { 01166 return OSPI_NOR_ERROR; 01167 } 01168 01169 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01170 { 01171 return OSPI_NOR_ERROR; 01172 } 01173 }while((reg[0] & sConfig.Mask ) != sConfig.Match); 01174 01175 return OSPI_NOR_OK; 01176 } 01177 01178 /** 01179 * @brief This function enables/disables the octal mode of the memory. 01180 * @param hospi: OSPI handle 01181 * @param Operation: Octal operation mode enable/disable 01182 * @retval None 01183 */ 01184 static uint8_t OSPI_NOR_OctalMode(OSPI_HandleTypeDef *hospi, uint8_t Operation) 01185 { 01186 OSPI_RegularCmdTypeDef sCommand; 01187 OSPI_AutoPollingTypeDef sConfig; 01188 uint8_t reg[2]; 01189 01190 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 01191 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 01192 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 01193 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 01194 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 01195 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 01196 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01197 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01198 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 01199 01200 sConfig.MatchMode = HAL_OSPI_MATCH_MODE_AND; 01201 sConfig.Interval = 0x10; 01202 sConfig.AutomaticStop = HAL_OSPI_AUTOMATIC_STOP_ENABLE; 01203 01204 /* Activate/deactivate the Octal mode */ 01205 if (Operation == OSPI_NOR_OCTAL_ENABLE) 01206 { 01207 /* Enable write operations */ 01208 sCommand.Instruction = WRITE_ENABLE_CMD; 01209 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE; 01210 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS; 01211 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 01212 sCommand.DataMode = HAL_OSPI_DATA_NONE; 01213 sCommand.DummyCycles = 0; 01214 01215 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01216 { 01217 return OSPI_NOR_ERROR; 01218 } 01219 01220 /* Configure automatic polling mode to wait for write enabling */ 01221 sConfig.Match = MX25LM51245G_SR_WEL; 01222 sConfig.Mask = MX25LM51245G_SR_WEL; 01223 01224 sCommand.Instruction = READ_STATUS_REG_CMD; 01225 sCommand.DataMode = HAL_OSPI_DATA_1_LINE; 01226 sCommand.NbData = 1; 01227 01228 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01229 { 01230 return OSPI_NOR_ERROR; 01231 } 01232 01233 if (HAL_OSPI_AutoPolling(&OSPINORHandle, &sConfig, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01234 { 01235 return OSPI_NOR_ERROR; 01236 } 01237 01238 /* Write Configuration register 2 (with new dummy cycles) */ 01239 sCommand.Instruction = WRITE_CFG_REG_2_CMD; 01240 sCommand.Address = MX25LM51245G_CR2_REG3_ADDR; 01241 sCommand.AddressMode = HAL_OSPI_ADDRESS_1_LINE; 01242 reg[0] = DUMMY_CYCLES_CR_CFG; 01243 01244 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01245 { 01246 return OSPI_NOR_ERROR; 01247 } 01248 01249 if (HAL_OSPI_Transmit(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01250 { 01251 return OSPI_NOR_ERROR; 01252 } 01253 01254 /* Enable write operations */ 01255 sCommand.Instruction = WRITE_ENABLE_CMD; 01256 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 01257 sCommand.DataMode = HAL_OSPI_DATA_NONE; 01258 01259 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01260 { 01261 return OSPI_NOR_ERROR; 01262 } 01263 01264 /* Configure automatic polling mode to wait for write enabling */ 01265 sCommand.Instruction = READ_STATUS_REG_CMD; 01266 sCommand.DataMode = HAL_OSPI_DATA_1_LINE; 01267 01268 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01269 { 01270 return OSPI_NOR_ERROR; 01271 } 01272 01273 if (HAL_OSPI_AutoPolling(&OSPINORHandle, &sConfig, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01274 { 01275 return OSPI_NOR_ERROR; 01276 } 01277 01278 /* Write Configuration register 2 (with Octal I/O SPI protocol) */ 01279 sCommand.Instruction = WRITE_CFG_REG_2_CMD; 01280 sCommand.Address = MX25LM51245G_CR2_REG1_ADDR; 01281 sCommand.AddressMode = HAL_OSPI_ADDRESS_1_LINE; 01282 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01283 reg[0] = MX25LM51245G_CR2_SOPI; 01284 #else 01285 reg[0] = MX25LM51245G_CR2_DOPI; 01286 #endif 01287 01288 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01289 { 01290 return OSPI_NOR_ERROR; 01291 } 01292 01293 if (HAL_OSPI_Transmit(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01294 { 01295 return OSPI_NOR_ERROR; 01296 } 01297 01298 /* Wait that the configuration is effective and check that memory is ready */ 01299 HAL_Delay(MX25LM51245G_WRITE_REG_MAX_TIME); 01300 01301 if (OSPI_NOR_AutoPollingMemReady(&OSPINORHandle, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != OSPI_NOR_OK) 01302 { 01303 return OSPI_NOR_ERROR; 01304 } 01305 01306 /* Check the configuration has been correctly done */ 01307 sCommand.Instruction = OCTAL_READ_CFG_REG_2_CMD; 01308 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 01309 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 01310 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 01311 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 01312 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 01313 sCommand.NbData = 2; 01314 reg[0] = 0; 01315 01316 #if !defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01317 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 01318 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 01319 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 01320 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 01321 #endif 01322 01323 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01324 { 01325 return OSPI_NOR_ERROR; 01326 } 01327 01328 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01329 { 01330 return OSPI_NOR_ERROR; 01331 } 01332 01333 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01334 if (reg[0] != MX25LM51245G_CR2_SOPI) 01335 #else 01336 if (reg[0] != MX25LM51245G_CR2_DOPI) 01337 #endif 01338 { 01339 return OSPI_NOR_ERROR; 01340 } 01341 } 01342 else 01343 { 01344 /* Enable write operations */ 01345 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 01346 { 01347 return OSPI_NOR_ERROR; 01348 } 01349 01350 /* Write Configuration register 2 (with Octal I/O SPI protocol) */ 01351 sCommand.Instruction = OCTAL_WRITE_CFG_REG_2_CMD; 01352 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 01353 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 01354 sCommand.Address = MX25LM51245G_CR2_REG1_ADDR; 01355 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 01356 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 01357 sCommand.NbData = 2; 01358 sCommand.DummyCycles = 0; 01359 reg[0] = 0; 01360 reg[1] = 0; 01361 01362 #if !defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01363 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 01364 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 01365 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 01366 #endif 01367 01368 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01369 { 01370 return OSPI_NOR_ERROR; 01371 } 01372 01373 if (HAL_OSPI_Transmit(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01374 { 01375 return OSPI_NOR_ERROR; 01376 } 01377 01378 /* Wait that the configuration is effective and check that memory is ready */ 01379 HAL_Delay(MX25LM51245G_WRITE_REG_MAX_TIME); 01380 01381 sCommand.Instruction = READ_STATUS_REG_CMD; 01382 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE; 01383 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS; 01384 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 01385 sCommand.DataMode = HAL_OSPI_DATA_1_LINE; 01386 sCommand.NbData = 1; 01387 sCommand.DummyCycles = 0; 01388 01389 #if !defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01390 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 01391 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 01392 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01393 #endif 01394 01395 sConfig.Match = 0; 01396 sConfig.Mask = MX25LM51245G_SR_WIP; 01397 01398 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01399 { 01400 return OSPI_NOR_ERROR; 01401 } 01402 01403 if (HAL_OSPI_AutoPolling(&OSPINORHandle, &sConfig, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01404 { 01405 return OSPI_NOR_ERROR; 01406 } 01407 01408 /* Check the configuration has been correctly done */ 01409 sCommand.Instruction = READ_CFG_REG_2_CMD; 01410 sCommand.Address = MX25LM51245G_CR2_REG1_ADDR; 01411 sCommand.AddressMode = HAL_OSPI_ADDRESS_1_LINE; 01412 01413 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01414 { 01415 return OSPI_NOR_ERROR; 01416 } 01417 01418 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01419 { 01420 return OSPI_NOR_ERROR; 01421 } 01422 01423 if (reg[0] != 0) 01424 { 01425 return OSPI_NOR_ERROR; 01426 } 01427 } 01428 01429 return OSPI_NOR_OK; 01430 } 01431 01432 /** 01433 * @} 01434 */ 01435 01436 /** 01437 * @} 01438 */ 01439 01440 /** 01441 * @} 01442 */ 01443 01444 /** 01445 * @} 01446 */ 01447 01448 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 01449
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