|
|
UINT32 | Signature |
| | Offset 0x0780.
|
| |
|
UINT8 | ChapDeviceEnable |
| | Offset 0x0784 - Enable/Disable Device 7 Enable: Device 7 enabled, Disable (Default): Device 7 disabled $EN_DIS.
|
| |
|
UINT8 | SkipPamLock |
| | Offset 0x0785 - Skip PAM register lock Enable: PAM register will not be locked by RC, platform code should lock it, Disable(Default): PAM registers will be locked by RC $EN_DIS.
|
| |
|
UINT8 | EdramTestMode |
| | Offset 0x0786 - EDRAM Test Mode Enable: PAM register will not be locked by RC, platform code should lock it, Disable(Default): PAM registers will be locked by RC 0: EDRAM SW disable, 1: EDRAM SW Enable, 2: EDRAM HW mode.
|
| |
|
UINT8 | DmiExtSync |
| | Offset 0x0787 - DMI Extended Sync Control Enable: Enable DMI Extended Sync Control, Disable(Default): Disable DMI Extended Sync Control $EN_DIS.
|
| |
|
UINT8 | DmiIot |
| | Offset 0x0788 - DMI IOT Control Enable: Enable DMI IOT Control, Disable(Default): Disable DMI IOT Control $EN_DIS.
|
| |
|
UINT8 | PegMaxPayload [3] |
| | Offset 0x0789 - PEG Max Payload size per root port 0xFF(Default):Auto, 0x1: Force 128B, 0x2: Force 256B 0xFF: Auto, 0x1: Force 128B, 0x2: Force 256B.
|
| |
|
UINT8 | RenderStandby |
| | Offset 0x078C - Enable/Disable IGFX RenderStandby Enable(Default): Enable IGFX RenderStandby, Disable: Disable IGFX RenderStandby $EN_DIS.
|
| |
|
UINT8 | PmSupport |
| | Offset 0x078D - Enable/Disable IGFX PmSupport Enable(Default): Enable IGFX PmSupport, Disable: Disable IGFX PmSupport $EN_DIS.
|
| |
|
UINT8 | CdynmaxClampEnable |
| | Offset 0x078E - Enable/Disable CdynmaxClamp Enable(Default): Enable CdynmaxClamp, Disable: Disable CdynmaxClamp $EN_DIS.
|
| |
|
UINT8 | VtdDisable |
| | Offset 0x078F - Disable VT-d 0=Enable/FALSE(VT-d disabled), 1=Disable/TRUE (VT-d enabled) $EN_DIS.
|
| |
|
UINT8 | GtFreqMax |
| | Offset 0x0790 - GT Frequency Limit 0xFF: Auto(Default), 2: 100 Mhz, 3: 150 Mhz, 4: 200 Mhz, 5: 250 Mhz, 6: 300 Mhz, 7: 350 Mhz, 8: 400 Mhz, 9: 450 Mhz, 0xA: 500 Mhz, 0xB: 550 Mhz, 0xC: 600 Mhz, 0xD: 650 Mhz, 0xE: 700 Mhz, 0xF: 750 Mhz, 0x10: 800 Mhz, 0x11: 850 Mhz, 0x12:900 Mhz, 0x13: 950 Mhz, 0x14: 1000 Mhz, 0x15: 1050 Mhz, 0x16: 1100 Mhz, 0x17: 1150 Mhz, 0x18: 1200 Mhz 0xFF: Auto(Default), 2: 100 Mhz, 3: 150 Mhz, 4: 200 Mhz, 5: 250 Mhz, 6: 300 Mhz, 7: 350 Mhz, 8: 400 Mhz, 9: 450 Mhz, 0xA: 500 Mhz, 0xB: 550 Mhz, 0xC: 600 Mhz, 0xD: 650 Mhz, 0xE: 700 Mhz, 0xF: 750 Mhz, 0x10: 800 Mhz, 0x11: 850 Mhz, 0x12:900 Mhz, 0x13: 950 Mhz, 0x14: 1000 Mhz, 0x15: 1050 Mhz, 0x16: 1100 Mhz, 0x17: 1150 Mhz, 0x18: 1200 Mhz.
|
| |
|
UINT8 | SaPostMemTestRsvd [11] |
| | Offset 0x0791 - SaPostMemTestRsvd Reserved for SA Post-Mem Test $EN_DIS.
|
| |
| UINT8 | OneCoreRatioLimit |
| | Offset 0x079C - 1-Core Ratio Limit 1-Core Ratio Limit: LFM to Fused max, For overclocking part: LFM to 255. More...
|
| |
| UINT8 | TwoCoreRatioLimit |
| | Offset 0x079D - 2-Core Ratio Limit 2-Core Ratio Limit: LFM to Fused max, For overclocking part: LFM to 255. More...
|
| |
| UINT8 | ThreeCoreRatioLimit |
| | Offset 0x079E - 3-Core Ratio Limit 3-Core Ratio Limit: LFM to Fused max, For overclocking part: LFM to 255. More...
|
| |
| UINT8 | FourCoreRatioLimit |
| | Offset 0x079F - 4-Core Ratio Limit 4-Core Ratio Limit: LFM to Fused max, For overclocking part: LFM to 255. More...
|
| |
|
UINT8 | UnusedUpdSpace22 |
| | Offset 0x07A0.
|
| |
| UINT8 | Hwp |
| | Offset 0x07A1 - Enable or Disable HWP Enable or Disable HWP(Hardware P states) Support. More...
|
| |
| UINT8 | HdcControl |
| | Offset 0x07A2 - Hardware Duty Cycle Control Hardware Duty Cycle Control configuration. More...
|
| |
| UINT8 | PowerLimit1Time |
| | Offset 0x07A3 - Package Long duration turbo mode time Package Long duration turbo mode time window in seconds. More...
|
| |
| UINT8 | PowerLimit2 |
| | Offset 0x07A4 - Short Duration Turbo Mode Enable or Disable short duration Turbo Mode. More...
|
| |
|
UINT8 | TurboPowerLimitLock |
| | Offset 0x07A5 - Turbo settings Lock Lock all Turbo settings Enable/Disable; 0: Disable , 1: Enable $EN_DIS.
|
| |
| UINT8 | PowerLimit3Time |
| | Offset 0x07A6 - Package PL3 time window Package PL3 time window range for this policy in milliseconds. More...
|
| |
|
UINT8 | PowerLimit3DutyCycle |
| | Offset 0x07A7 - Package PL3 Duty Cycle Package PL3 Duty Cycle; Valid Range is 0 to 100.
|
| |
|
UINT8 | PowerLimit3Lock |
| | Offset 0x07A8 - Package PL3 Lock Package PL3 Lock Enable/Disable; 0: Disable ; 1: Enable $EN_DIS.
|
| |
|
UINT8 | PowerLimit4Lock |
| | Offset 0x07A9 - Package PL4 Lock Package PL4 Lock Enable/Disable; 0: Disable ; 1: Enable $EN_DIS.
|
| |
| UINT8 | TccActivationOffset |
| | Offset 0x07AA - TCC Activation Offset TCC Activation Offset. More...
|
| |
| UINT8 | TccOffsetClamp |
| | Offset 0x07AB - Tcc Offset Clamp Enable/Disable Tcc Offset Clamp for Runtime Average Temperature Limit (RATL) allows CPU to throttle below P1.For SKL Y SKU, the recommended default for this policy is 1: Enabled, For all other SKUs the recommended default are 0: Disabled. More...
|
| |
| UINT8 | TccOffsetLock |
| | Offset 0x07AC - Tcc Offset Lock Tcc Offset Lock for Runtime Average Temperature Limit (RATL) to lock temperature target; 0: Disabled; 1: Enabled. More...
|
| |
| UINT8 | NumberOfEntries |
| | Offset 0x07AD - Custom Ratio State Entries The number of custom ratio state entries, ranges from 0 to 40 for a valid custom ratio table.Sets the number of custom P-states. More...
|
| |
| UINT8 | Custom1PowerLimit1Time |
| | Offset 0x07AE - Custom Short term Power Limit time window Short term Power Limit time window value for custom CTDP level 1. More...
|
| |
| UINT8 | Custom1TurboActivationRatio |
| | Offset 0x07AF - Custom Turbo Activation Ratio Turbo Activation Ratio for custom cTDP level 1. More...
|
| |
| UINT8 | Custom1ConfigTdpControl |
| | Offset 0x07B0 - Custom Config Tdp Control Config Tdp Control (0/1/2) value for custom cTDP level 1. More...
|
| |
| UINT8 | Custom2PowerLimit1Time |
| | Offset 0x07B1 - Custom Short term Power Limit time window Short term Power Limit time window value for custom CTDP level 2. More...
|
| |
| UINT8 | Custom2TurboActivationRatio |
| | Offset 0x07B2 - Custom Turbo Activation Ratio Turbo Activation Ratio for custom cTDP level 2. More...
|
| |
| UINT8 | Custom2ConfigTdpControl |
| | Offset 0x07B3 - Custom Config Tdp Control Config Tdp Control (0/1/2) value for custom cTDP level 1. More...
|
| |
| UINT8 | Custom3PowerLimit1Time |
| | Offset 0x07B4 - Custom Short term Power Limit time window Short term Power Limit time window value for custom CTDP level 3. More...
|
| |
| UINT8 | Custom3TurboActivationRatio |
| | Offset 0x07B5 - Custom Turbo Activation Ratio Turbo Activation Ratio for custom cTDP level 3. More...
|
| |
| UINT8 | Custom3ConfigTdpControl |
| | Offset 0x07B6 - Custom Config Tdp Control Config Tdp Control (0/1/2) value for custom cTDP level 1. More...
|
| |
|
UINT8 | ConfigTdpLock |
| | Offset 0x07B7 - ConfigTdp mode settings Lock Lock the ConfigTdp mode settings from runtime changes; 0: Disable; 1: Enable $EN_DIS.
|
| |
| UINT8 | ConfigTdpBios |
| | Offset 0x07B8 - Load Configurable TDP SSDT Configure whether to load Configurable TDP SSDT; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | PsysPowerLimit1 |
| | Offset 0x07B9 - PL1 Enable value PL1 Enable value to limit average platform power. More...
|
| |
|
UINT8 | PsysPowerLimit1Time |
| | Offset 0x07BA - PL1 timewindow PL1 timewindow in seconds.Valid values(Unit in seconds) 0 to 8 , 10 , 12 ,14 , 16 , 20 , 24 , 28 , 32 , 40 , 48 , 56 , 64 , 80 , 96 , 112 , 128.
|
| |
| UINT8 | PsysPowerLimit2 |
| | Offset 0x07BB - PL2 Enable Value PL2 Enable activates the PL2 value to limit average platform power. More...
|
| |
|
UINT8 | UnusedUpdSpace23 [2] |
| | Offset 0x07BC.
|
| |
| UINT8 | MlcStreamerPrefetcher |
| | Offset 0x07BE - Enable or Disable MLC Streamer Prefetcher Enable or Disable MLC Streamer Prefetcher; 0: Disable; 1: Enable. More...
|
| |
|
UINT8 | MlcSpatialPrefetcher |
| | Offset 0x07BF - Enable or Disable MLC Spatial Prefetcher Enable or Disable MLC Spatial Prefetcher; 0: Disable; 1: Enable $EN_DIS.
|
| |
| UINT8 | MonitorMwaitEnable |
| | Offset 0x07C0 - Enable or Disable Monitor /MWAIT instructions Enable or Disable Monitor /MWAIT instructions; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | MachineCheckEnable |
| | Offset 0x07C1 - Enable or Disable initialization of machine check registers Enable or Disable initialization of machine check registers; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | DebugInterfaceEnable |
| | Offset 0x07C2 - Enable or Disable processor debug features Enable or Disable processor debug features; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | DebugInterfaceLockEnable |
| | Offset 0x07C3 - Lock or Unlock debug interface features Lock or Unlock debug interface features; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | ApIdleManner |
| | Offset 0x07C4 - AP Idle Manner of waiting for SIPI AP Idle Manner of waiting for SIPI; 1: HALT loop; 2: MWAIT loop; 3: RUN loop. More...
|
| |
| UINT8 | ApHandoffManner |
| | Offset 0x07C5 - Settings for AP Handoff to OS Settings for AP Handoff to OS; 1: HALT loop; 2: MWAIT loop. More...
|
| |
|
UINT8 | UnusedUpdSpace24 [2] |
| | Offset 0x07C6.
|
| |
| UINT8 | ProcTraceOutputScheme |
| | Offset 0x07C8 - Control on Processor Trace output scheme Control on Processor Trace output scheme; 0: Single Range Output; 1: ToPA Output. More...
|
| |
| UINT8 | ProcTraceEnable |
| | Offset 0x07C9 - Enable or Disable Processor Trace feature Enable or Disable Processor Trace feature; 0: Disable; 1: Enable. More...
|
| |
|
UINT8 | ProcTraceMemSize |
| | Offset 0x07CA - Memory region allocation for Processor Trace Memory region allocation for Processor Trace, Total Memory required is up to requested value * 2 (for memory alignment) * 8 active threads, to enable Processor Trace, PcdFspReservedMemoryLength must be increased by the total memory required, and PlatformMemorySize policy must also be increased by the total memory required over 32MB, Valid Values are 0 - 4KB , 0x1 - 8KB , 0x2 - 16KB , 0x3 - 32KB , 0x4 - 64KB , 0x5 - 128KB , 0x6 - 256KB , 0x7 - 512KB , 0x8 - 1MB , 0x9 - 2MB , 0xA - 4MB , 0xB - 8MB , 0xC - 16MB , 0xD - 32MB , 0xE - 64MB , 0xF - 128MB , 0xFF: Disable.
|
| |
|
UINT8 | UnusedUpdSpace25 |
| | Offset 0x07CB.
|
| |
|
UINT8 | VoltageOptimization |
| | Offset 0x07CC - Enable or Disable Voltage Optimization feature Enable or Disable Voltage Optimization feature 0: Disable; 1: Enable $EN_DIS.
|
| |
| UINT8 | Eist |
| | Offset 0x07CD - Enable or Disable Intel SpeedStep Technology Enable or Disable Intel SpeedStep Technology. More...
|
| |
| UINT8 | EnergyEfficientPState |
| | Offset 0x07CE - Enable or Disable Energy Efficient P-state Enable or Disable Energy Efficient P-state will be applied in Turbo mode. More...
|
| |
| UINT8 | EnergyEfficientTurbo |
| | Offset 0x07CF - Enable or Disable Energy Efficient Turbo Enable or Disable Energy Efficient Turbo, will be applied in Turbo mode. More...
|
| |
| UINT8 | TStates |
| | Offset 0x07D0 - Enable or Disable T states Enable or Disable T states; 0: Disable; 1: Enable. More...
|
| |
|
UINT8 | BiProcHot |
| | Offset 0x07D1 - Enable or Disable Bi-Directional PROCHOT# Enable or Disable Bi-Directional PROCHOT#; 0: Disable; 1: Enable $EN_DIS.
|
| |
| UINT8 | DisableProcHotOut |
| | Offset 0x07D2 - Enable or Disable PROCHOT# signal being driven externally Enable or Disable PROCHOT# signal being driven externally; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | ProcHotResponse |
| | Offset 0x07D3 - Enable or Disable PROCHOT# Response Enable or Disable PROCHOT# Response; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | DisableVrThermalAlert |
| | Offset 0x07D4 - Enable or Disable VR Thermal Alert Enable or Disable VR Thermal Alert; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | AutoThermalReporting |
| | Offset 0x07D5 - Enable or Disable Thermal Reporting Enable or Disable Thermal Reporting through ACPI tables; 0: Disable; 1: Enable. More...
|
| |
|
UINT8 | ThermalMonitor |
| | Offset 0x07D6 - Enable or Disable Thermal Monitor Enable or Disable Thermal Monitor; 0: Disable; 1: Enable $EN_DIS.
|
| |
| UINT8 | Cx |
| | Offset 0x07D7 - Enable or Disable CPU power states (C-states) Enable or Disable CPU power states (C-states). More...
|
| |
| UINT8 | PmgCstCfgCtrlLock |
| | Offset 0x07D8 - Configure C-State Configuration Lock Configure C-State Configuration Lock; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | C1e |
| | Offset 0x07D9 - Enable or Disable Enhanced C-states Enable or Disable Enhanced C-states. More...
|
| |
| UINT8 | PkgCStateDemotion |
| | Offset 0x07DA - Enable or Disable Package C-State Demotion Enable or Disable Package C-State Demotion. More...
|
| |
| UINT8 | PkgCStateUnDemotion |
| | Offset 0x07DB - Enable or Disable Package C-State UnDemotion Enable or Disable Package C-State UnDemotion. More...
|
| |
| UINT8 | CStatePreWake |
| | Offset 0x07DC - Enable or Disable CState-Pre wake Enable or Disable CState-Pre wake. More...
|
| |
| UINT8 | TimedMwait |
| | Offset 0x07DD - Enable or Disable TimedMwait Support. More...
|
| |
| UINT8 | CstCfgCtrIoMwaitRedirection |
| | Offset 0x07DE - Enable or Disable IO to MWAIT redirection Enable or Disable IO to MWAIT redirection; 0: Disable; 1: Enable. More...
|
| |
| UINT8 | PkgCStateLimit |
| | Offset 0x07DF - Set the Max Pkg Cstate Set the Max Pkg Cstate. More...
|
| |
|
UINT8 | CstateLatencyControl0TimeUnit |
| | Offset 0x07E0 - TimeUnit for C-State Latency Control0 TimeUnit for C-State Latency Control0; Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns.
|
| |
|
UINT8 | CstateLatencyControl1TimeUnit |
| | Offset 0x07E1 - TimeUnit for C-State Latency Control1 TimeUnit for C-State Latency Control1;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns.
|
| |
|
UINT8 | CstateLatencyControl2TimeUnit |
| | Offset 0x07E2 - TimeUnit for C-State Latency Control2 TimeUnit for C-State Latency Control2;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns.
|
| |
|
UINT8 | CstateLatencyControl3TimeUnit |
| | Offset 0x07E3 - TimeUnit for C-State Latency Control3 TimeUnit for C-State Latency Control3;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns.
|
| |
|
UINT8 | CstateLatencyControl4TimeUnit |
| | Offset 0x07E4 - TimeUnit for C-State Latency Control4 TimeUnit for C-State Latency Control4;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns.
|
| |
|
UINT8 | CstateLatencyControl5TimeUnit |
| | Offset 0x07E5 - TimeUnit for C-State Latency Control5 TimeUnit for C-State Latency Control5;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns.
|
| |
|
UINT8 | PpmIrmSetting |
| | Offset 0x07E6 - Interrupt Redirection Mode Select Interrupt Redirection Mode Select.0: Fixed priority; 1: Round robin;2: Hash vector;4: PAIR with fixed priority;5: PAIR with round robin;6: PAIR with hash vector;7: No change.
|
| |
|
UINT8 | ProcHotLock |
| | Offset 0x07E7 - Lock prochot configuration Lock prochot configuration Enable/Disable; 0: Disable; 1: Enable $EN_DIS.
|
| |
|
UINT8 | ConfigTdpLevel |
| | Offset 0x07E8 - Configuration for boot TDP selection Configuration for boot TDP selection; 0: TDP Nominal; 1: TDP Down; 2: TDP Up; 0xFF: Deactivate 0:TDP Nominal, 1:TDP Down, 2:TDP Up, 0xFF:Deactivate.
|
| |
| UINT8 | RaceToHalt |
| | Offset 0x07E9 - Race To Halt Enable/Disable Race To Halt feature. More...
|
| |
|
UINT16 | MaxRatio |
| | Offset 0x07EA - Max P-State Ratio Max P-State Ratio , Valid Range 0 to 0x7F.
|
| |
| UINT16 | StateRatio [40] |
| | Offset 0x07EC - Maximum P-state ratio to use in the custom P-state table Maximum P-state ratio to use in the custom P-state table. More...
|
| |
|
UINT16 | CstateLatencyControl0Irtl |
| | Offset 0x083C - Interrupt Response Time Limit of C-State LatencyContol0 Interrupt Response Time Limit of C-State LatencyContol0.Range of value 0 to 0x3FF, Default is 0x4E, Server Platform is 0x4B.
|
| |
|
UINT16 | CstateLatencyControl1Irtl |
| | Offset 0x083E - Interrupt Response Time Limit of C-State LatencyContol1 Interrupt Response Time Limit of C-State LatencyContol1.Range of value 0 to 0x3FF, Default is 0x76, Server Platform is 0x6B.
|
| |
|
UINT16 | CstateLatencyControl2Irtl |
| | Offset 0x0840 - Interrupt Response Time Limit of C-State LatencyContol2 Interrupt Response Time Limit of C-State LatencyContol2.Range of value 0 to 0x3FF.
|
| |
|
UINT16 | CstateLatencyControl3Irtl |
| | Offset 0x0842 - Interrupt Response Time Limit of C-State LatencyContol3 Interrupt Response Time Limit of C-State LatencyContol3.Range of value 0 to 0x3FF.
|
| |
|
UINT16 | CstateLatencyControl4Irtl |
| | Offset 0x0844 - Interrupt Response Time Limit of C-State LatencyContol4 Interrupt Response Time Limit of C-State LatencyContol4.Range of value 0 to 0x3FF.
|
| |
|
UINT16 | CstateLatencyControl5Irtl |
| | Offset 0x0846 - Interrupt Response Time Limit of C-State LatencyContol5 Interrupt Response Time Limit of C-State LatencyContol5.Range of value 0 to 0x3FF.
|
| |
| UINT32 | PowerLimit1 |
| | Offset 0x0848 - Package Long duration turbo mode power limit Package Long duration turbo mode power limit. More...
|
| |
| UINT32 | PowerLimit2Power |
| | Offset 0x084C - Package Short duration turbo mode power limit Package Short duration turbo mode power limit. More...
|
| |
| UINT32 | PowerLimit3 |
| | Offset 0x0850 - Package PL3 power limit Package PL3 power limit. More...
|
| |
| UINT32 | PowerLimit4 |
| | Offset 0x0854 - Package PL4 power limit Package PL4 power limit. More...
|
| |
| UINT32 | TccOffsetTimeWindowForRatl |
| | Offset 0x0858 - Tcc Offset Time Window for RATL Package PL4 power limit. More...
|
| |
| UINT32 | Custom1PowerLimit1 |
| | Offset 0x085C - Short term Power Limit value for custom cTDP level 1 Short term Power Limit value for custom cTDP level 1. More...
|
| |
| UINT32 | Custom1PowerLimit2 |
| | Offset 0x0860 - Long term Power Limit value for custom cTDP level 1 Long term Power Limit value for custom cTDP level 1. More...
|
| |
| UINT32 | Custom2PowerLimit1 |
| | Offset 0x0864 - Short term Power Limit value for custom cTDP level 2 Short term Power Limit value for custom cTDP level 2. More...
|
| |
| UINT32 | Custom2PowerLimit2 |
| | Offset 0x0868 - Long term Power Limit value for custom cTDP level 2 Long term Power Limit value for custom cTDP level 2. More...
|
| |
| UINT32 | Custom3PowerLimit1 |
| | Offset 0x086C - Short term Power Limit value for custom cTDP level 3 Short term Power Limit value for custom cTDP level 3. More...
|
| |
| UINT32 | Custom3PowerLimit2 |
| | Offset 0x0870 - Long term Power Limit value for custom cTDP level 3 Long term Power Limit value for custom cTDP level 3. More...
|
| |
| UINT32 | PsysPowerLimit1Power |
| | Offset 0x0874 - Platform PL1 power Platform PL1 power. More...
|
| |
| UINT32 | PsysPowerLimit2Power |
| | Offset 0x0878 - Platform PL2 power Platform PL2 power. More...
|
| |
| UINT16 | PsysPmax |
| | Offset 0x087C - Platform Power Pmax PCODE MMIO Mailbox: Platform Power Pmax. More...
|
| |
|
UINT16 | CpuS3ResumeDataSize |
| | Offset 0x087E - CpuS3ResumeDataSize Size of CPU S3 Resume Data.
|
| |
|
UINT32 | CpuS3ResumeData |
| | Offset 0x0880 - CpuS3ResumeData Pointer to CPU S3 Resume Data.
|
| |
| UINT8 | FiveCoreRatioLimit |
| | Offset 0x0884 - 5-Core Ratio Limit 5-Core Ratio Limit: LFM to Fused max, For overclocking part: LFM to 255. More...
|
| |
| UINT8 | SixCoreRatioLimit |
| | Offset 0x0885 - 6-Core Ratio Limit 6-Core Ratio Limit: LFM to Fused max, For overclocking part: LFM to 255. More...
|
| |
| UINT8 | SevenCoreRatioLimit |
| | Offset 0x0886 - 7-Core Ratio Limit 7-Core Ratio Limit: LFM to Fused max, For overclocking part: LFM to 255. More...
|
| |
| UINT8 | EightCoreRatioLimit |
| | Offset 0x0887 - 8-Core Ratio Limit 8-Core Ratio Limit: LFM to Fused max, For overclocking part: LFM to 255. More...
|
| |
| UINT8 | ThreeStrikeCounterDisable |
| | Offset 0x0888 - Set Three Strike Counter Disable False (default): Three Strike counter will be incremented and True: Prevents Three Strike counter from incrementing; 0: False; 1: True. More...
|
| |
|
UINT8 | ReservedCpuPostMemTest [1] |
| | Offset 0x0889 - ReservedCpuPostMemTest Reserved for CPU Post-Mem Test $EN_DIS.
|
| |
|
UINT8 | SgxSinitDataFromTpm |
| | Offset 0x088A - SgxSinitDataFromTpm SgxSinitDataFromTpm default values.
|
| |
| UINT8 | EndOfPostMessage |
| | Offset 0x088B - End of Post message Test, Send End of Post message. More...
|
| |
|
UINT8 | DisableD0I3SettingForHeci |
| | Offset 0x088C - D0I3 Setting for HECI Disable Test, 0: disable, 1: enable, Setting this option disables setting D0I3 bit for all HECI devices $EN_DIS.
|
| |
| UINT8 | PchLockDownGlobalSmi |
| | Offset 0x088D - Enable LOCKDOWN SMI Enable SMI_LOCK bit to prevent writes to the Global SMI Enable bit. More...
|
| |
| UINT16 | PchHdaResetWaitTimer |
| | Offset 0x088E - HD Audio Reset Wait Timer The delay timer after Azalia reset, the value is number of microseconds. More...
|
| |
| UINT8 | PchLockDownBiosInterface |
| | Offset 0x0890 - Enable LOCKDOWN BIOS Interface Enable BIOS Interface Lock Down bit to prevent writes to the Backup Control Register. More...
|
| |
| UINT8 | PchLockDownRtcLock |
| | Offset 0x0891 - RTC CMOS RAM LOCK Enable RTC lower and upper 128 byte Lock bits to lock Bytes 38h-3Fh in the upper and and lower 128-byte bank of RTC RAM. More...
|
| |
| UINT8 | PchSbiUnlock |
| | Offset 0x0892 - PCH Sbi lock bit This unlock the SBI lock bit to allow SBI after post time. More...
|
| |
| UINT8 | PchSbAccessUnlock |
| | Offset 0x0893 - PCH Psf lock bit The PSF registers will be locked before 3rd party code execution. More...
|
| |
|
UINT16 | PcieRpLtrMaxSnoopLatency [24] |
| | Offset 0x0894 - PCIE RP Ltr Max Snoop Latency Latency Tolerance Reporting, Max Snoop Latency.
|
| |
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UINT16 | PcieRpLtrMaxNoSnoopLatency [24] |
| | Offset 0x08C4 - PCIE RP Ltr Max No Snoop Latency Latency Tolerance Reporting, Max Non-Snoop Latency.
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UINT8 | PcieRpSnoopLatencyOverrideMode [24] |
| | Offset 0x08F4 - PCIE RP Snoop Latency Override Mode Latency Tolerance Reporting, Snoop Latency Override Mode.
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UINT8 | PcieRpSnoopLatencyOverrideMultiplier [24] |
| | Offset 0x090C - PCIE RP Snoop Latency Override Multiplier Latency Tolerance Reporting, Snoop Latency Override Multiplier.
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UINT16 | PcieRpSnoopLatencyOverrideValue [24] |
| | Offset 0x0924 - PCIE RP Snoop Latency Override Value Latency Tolerance Reporting, Snoop Latency Override Value.
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UINT8 | PcieRpNonSnoopLatencyOverrideMode [24] |
| | Offset 0x0954 - PCIE RP Non Snoop Latency Override Mode Latency Tolerance Reporting, Non-Snoop Latency Override Mode.
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UINT8 | PcieRpNonSnoopLatencyOverrideMultiplier [24] |
| | Offset 0x096C - PCIE RP Non Snoop Latency Override Multiplier Latency Tolerance Reporting, Non-Snoop Latency Override Multiplier.
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UINT16 | PcieRpNonSnoopLatencyOverrideValue [24] |
| | Offset 0x0984 - PCIE RP Non Snoop Latency Override Value Latency Tolerance Reporting, Non-Snoop Latency Override Value.
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| UINT8 | PcieRpSlotPowerLimitScale [24] |
| | Offset 0x09B4 - PCIE RP Slot Power Limit Scale Specifies scale used for slot power limit value. More...
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| UINT16 | PcieRpSlotPowerLimitValue [24] |
| | Offset 0x09CC - PCIE RP Slot Power Limit Value Specifies upper limit on power supplie by slot. More...
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| UINT8 | PcieRpUptp [24] |
| | Offset 0x09FC - PCIE RP Upstream Port Transmiter Preset Used during Gen3 Link Equalization. More...
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| UINT8 | PcieRpDptp [24] |
| | Offset 0x0A14 - PCIE RP Downstream Port Transmiter Preset Used during Gen3 Link Equalization. More...
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| UINT8 | PcieEnablePort8xhDecode |
| | Offset 0x0A2C - PCIE RP Enable Port8xh Decode This member describes whether PCIE root port Port 8xh Decode is enabled. More...
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UINT8 | PchPciePort8xhDecodePortIndex |
| | Offset 0x0A2D - PCIE Port8xh Decode Port Index The Index of PCIe Port that is selected for Port8xh Decode (0 Based).
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| UINT8 | PchPmDisableEnergyReport |
| | Offset 0x0A2E - PCH Pm Disable Energy Report Disable/Enable PCH to CPU enery report feature. More...
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UINT8 | PchPmPmcReadDisable |
| | Offset 0x0A2F - PCH Pm Pmc Read Disable Deprecated $EN_DIS.
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| UINT8 | SataTestMode |
| | Offset 0x0A30 - PCH Sata Test Mode Allow entrance to the PCH SATA test modes. More...
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UINT8 | ReservedFspsTestUpd [15] |
| | Offset 0x0A31.
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1.8.10