Kabylake Intel(R) Firmware Support Package (FSP) Integration Guide: CpuConfigFspData.h Source File

Kabylake Intel Firmware

previous page next page
Kabylake Intel(R) Firmware Support Package (FSP) Integration Guide
CpuConfigFspData.h
Go to the documentation of this file.
1 /** @file
2  FSP CPU Data Config Block.
3 
4  @copyright
5  INTEL CONFIDENTIAL
6  Copyright 2016 Intel Corporation.
7 
8  The source code contained or described herein and all documents related to the
9  source code ("Material") are owned by Intel Corporation or its suppliers or
10  licensors. Title to the Material remains with Intel Corporation or its suppliers
11  and licensors. The Material may contain trade secrets and proprietary and
12  confidential information of Intel Corporation and its suppliers and licensors,
13  and is protected by worldwide copyright and trade secret laws and treaty
14  provisions. No part of the Material may be used, copied, reproduced, modified,
15  published, uploaded, posted, transmitted, distributed, or disclosed in any way
16  without Intel's prior express written permission.
17 
18  No license under any patent, copyright, trade secret or other intellectual
19  property right is granted to or conferred upon you by disclosure or delivery
20  of the Materials, either expressly, by implication, inducement, estoppel or
21  otherwise. Any license under such intellectual property rights must be
22  express and approved by Intel in writing.
23 
24  Unless otherwise agreed by Intel in writing, you may not remove or alter
25  this notice or any other notice embedded in Materials by Intel or
26  Intel's suppliers or licensors in any way.
27 
28  This file contains an 'Intel Peripheral Driver' and is uniquely identified as
29  "Intel Reference Module" and is licensed for Intel CPUs and chipsets under
30  the terms of your license agreement with Intel or your vendor. This file may
31  be modified by the user, subject to additional terms of the license agreement.
32 
33 @par Specification Reference:
34 **/
35 #ifndef _CPU_CONFIG_FSP_DATA_H_
36 #define _CPU_CONFIG_FSP_DATA_H_
37 
38 #pragma pack (push,1)
39 typedef union {
40  struct {
41  /**
42  Enable or Disable Advanced Encryption Standard (AES) feature.
43  For some countries, this should be disabled for legal reasons.
44  - 0: Disable
45  - <b>1: Enable</b>
46  **/
47  UINT32 AesEnable : 1;
48  /**
49  Processor Early Power On Configuration FCLK setting.
50  - <b>0: 800 MHz (ULT/ULX)</b>.
51  - <b>1: 1 GHz (DT/Halo)</b>. Not supported on ULT/ULX.
52  - 2: 400 MHz.
53  - 3: Reserved.
54  **/
55  UINT32 FClkFrequency : 2;
56  UINT32 EnableRsr : 1; ///< Enable or Disable RSR feature; 0: Disable; <b>1: Enable </b>
57  /**
58  Policies to obtain CPU temperature.
59  - <b>0: ACPI thermal management uses EC reported temperature values</b>.
60  - 1: ACPI thermal management uses DTS SMM mechanism to obtain CPU temperature values.
61  - 2: ACPI Thermal Management uses EC reported temperature values and DTS SMM is used to handle Out of Spec condition.
62  **/
63  UINT32 EnableDts : 2;
64  UINT32 SmmbaseSwSmiNumber : 8; ///< Software SMI number for handler to save CPU information in SMRAM.
65  /**
66  Enable or Disable Virtual Machine Extensions (VMX) feature.
67  - 0: Disable
68  - <b>1: Enable</b>
69  **/
70  UINT32 VmxEnable : 1;
71  /**
72  Enable or Disable Trusted Execution Technology (TXT) feature.
73  - 0: Disable
74  - <b>1: Enable</b>
75  **/
76  UINT32 TxtEnable : 1;
77  UINT32 SkipMpInit : 1; ///< For Fsp only, Silicon Initialization will skip MP Initialization (including BSP) if enabled. For non-FSP, this should always be 0.
78  UINT32 RsvdBits : 15; ///< Reserved for future use
79  UINT32 Reserved;
80  } Bits;
81  UINT32 Uint32[2];
82  } CPU_CONFIG_FSP_DATA;
83 
84 #pragma pack (pop)
85 
86 #endif // _CPU_CONFIG_FSP_DATA_H_
Generated on Thu Jun 28 2018 21:44:49 for Kabylake Intel(R) Firmware Support Package (FSP) Integration Guide by   doxygen 1.8.10
previous page start next page