STM32F0xx Standard Peripherals Firmware Library: TIM_OC_Active

STM32F0xx Standard Peripherals Library

TIM_OC_Active
  ******************** (C) COPYRIGHT 2014 STMicroelectronics *******************
  * @file    TIM/TIM_OCActive/readme.txt 
  * @author  MCD Application Team
  * @version V1.4.0
  * @date    24-July-2014
  * @brief   Description of the TIM OC Active example.
  ******************************************************************************
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  *        http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
   
Example Description

This example shows how to configure the TIM peripheral to generate four different signals with four different delays.

The TIM3CLK frequency is set to SystemCoreClock (Hz), and the objective is to get TIM3 counter clock at 1 KHz so the Prescaler is computed as following:

  • Prescaler = (TIM3CLK / TIM3 counter clock) - 1

SystemCoreClock is set to 48 MHz for STM32F0xx Devices.

The TIM3 CCR1 register value is equal to 1000: TIM3_CH1 delay = CCR1_Val/TIM3 counter clock = 1000 ms so the TIM3 Channel 1 generates a signal with a delay equal to 1000 ms.

The TIM3 CCR2 register value is equal to 500: TIM3_CH2 delay = CCR2_Val/TIM3 counter clock = 500 ms so the TIM3 Channel 2 generates a signal with a delay equal to 500 ms.

The TIM3 CCR3 register value is equal to 250: TIM3_CH3 delay = CCR3_Val/TIM3 counter clock = 250 ms so the TIM3 Channel 3 generates a signal with a delay equal to 250 ms.

The TIM3 CCR4 register value is equal to 125: TIM3_CH4 delay = CCR4_Val/TIM3 counter clock = 125 ms so the TIM3 Channel 4 generates a signal with a delay equal to 125 ms.

The delay correspond to the time difference between PG.06 and TIM3_CHx signal rising edges.

Directory contents
Note:
The "system_stm32f0xx.c" is generated by an automatic clock configuration tool and can be easily customized to meet user application requirements. To select different clock setup, use the "STM32F0xx_Clock_Configuration_VX.Y.Z.xls" provided with the AN4055 package available on ST Microcontrollers
Hardware and Software environment
  • This example runs on STM32F0xx devices.
  • This example has been tested with STMicroelectronics STM32F0Discovery and STM32072B-EVAL including respectively STM32F051R8T6 and STM32F072VBT6 devices and can be easily tailored to any other supported device and development board.
  • STM32F0Discovery board Set-up
    • Connect the following pins to an oscilloscope to monitor the different waveforms:
      • Use LED1 connected to PC.10
      • PA.06 (TIM3_CH1)
      • PA.07 (TIM3_CH2)
      • PB.00 (TIM3_CH3)
      • PB.01 (TIM3_CH4)
  • STM32072B-EVAL Set-up
    • Connect the following pins to an oscilloscope to monitor the different waveforms:
      • Use LED1 connected to PD.08
      • PA.06 (TIM3_CH1)
      • PA.07 (TIM3_CH2)
      • PB.00 (TIM3_CH3)
      • PB.01 (TIM3_CH4)
How to use it ?

In order to make the program work, you must do the following :

  • Copy all source files from this example folder to the template folder under Project
  • Open your preferred toolchain
  • If the used device is STM32F051R8T6 choose STM32F051 project
    • Add the following files to the project source list
      • Utilities\STM32_EVAL\STM320518_EVAL\stm320518_eval.c
  • If the used device is STM32F072VBT6 choose STM32F072 project
    • Add the following files to the project source list
      • Utilities\STM32_EVAL\STM32072B_EVAL\stm32072b_eval.c
  • Rebuild all files and load your image into target memory
  • Run the example

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