TIM Complementary Signals example

  ******************** (C) COPYRIGHT 2014 STMicroelectronics *******************
  * @file    TIM/TIM_ComplementarySignals/readme.txt 
  * @author  MCD Application Team
  * @version V1.4.0
  * @date    24-July-2014
  * @brief   Description of the TIM Complementary Signals example.
  ******************************************************************************
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  *        http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
   

Example Description

This example shows how to configure the TIM1 peripheral to generate three complementary TIM1 signals, to insert a defined dead time value, to use the break feature and to lock the desired parameters.

TIM1CLK is fixed to SystemCoreClock, the TIM1 Prescaler is equal to 0 so the TIM1 counter clock used is SystemCoreClock (48MHz).

The objective is to generate PWM signal at 17.57 KHz:

• TIM1_Period = (SystemCoreClock / 17570) - 1

The Three Duty cycles are computed as the following description: The channel 1 duty cycle is set to 50% so channel 1N is set to 50%. The channel 2 duty cycle is set to 25% so channel 2N is set to 75%. The channel 3 duty cycle is set to 12.5% so channel 3N is set to 87.5%. The Timer pulse is calculated as follows:

• ChannelxPulse = DutyCycle * (TIM1_Period - 1) / 100

A dead time equal to 11/SystemCoreClock is inserted between the different complementary signals, and the Lock level 1 is selected. The break Polarity is used at High level.

The TIM1 waveform can be displayed using an oscilloscope.

Directory contents

• TIM/TIM_ComplementarySignals/stm32f0xx_conf.h Library Configuration file
• TIM/TIM_ComplementarySignals/stm32f0xx_it.c Interrupt handlers
• TIM/TIL_ComplementarySignals/stm32f0xx_it.h Interrupt handlers header file
• TIM/TIM_ComplementarySignals/main.c Main program
• TIM/TIM_ComplementarySignals/main.h Header for main.c module
• TIM/TIM_ComplementarySignals/system_stm32f0xx.c STM32F0xx system source file

Note:

The "system_stm32f0xx.c" is generated by an automatic clock configuration tool and can be easily customized to meet user application requirements. To select different clock setup, use the "STM32F0xx_Clock_Configuration_VX.Y.Z.xls" provided with the AN4055 package available on ST Microcontrollers

Hardware and Software environment

• This example runs on STM32F0xx devices.

• This example has been tested with STMicroelectronics STM32F0Discovery and STM32072B-EVAL including respectively STM32F051R8T6 and STM32F072VBT6 devices and can be easily tailored to any other supported device and development board.

• STM32F0Discovery board Set-up
  • Connect the TIM1 pins to an oscilloscope to monitor the different waveforms:
    • TIM1_CH1 pin (PA.08)
    • TIM1_CH1N pin (PA.07)
    • TIM1_CH2 pin (PA.09)
    • TIM1_CH2N pin (PB.00)
    • TIM1_CH3 pin (PA.10)
    • TIM1_CH3N pin (PB.01)
  • Connect the TIM1 break pin TIM1_BKIN pin (PB.12) to the GND. To generate a break event, switch this pin level from 0V to 3.3V.
• STM32072B-EVAL Set-up
  • Connect the TIM1 pins to an oscilloscope to monitor the different waveforms:
    • TIM1_CH1 pin (PA.08)
    • TIM1_CH1N pin (PA.07)
    • TIM1_CH2 pin (PA.09)
    • TIM1_CH2N pin (PB.00)
    • TIM1_CH3 pin (PA.10)
    • TIM1_CH3N pin (PB.01)
  • Connect the TIM1 break pin TIM1_BKIN pin (PB.12) to the GND. To generate a break event, switch this pin level from 0V to 3.3V.

How to use it ?

In order to make the program work, you must do the following :

• Copy all source files from this example folder to the template folder under Project
• Open your preferred toolchain
• Select the appropriate workspace
• Rebuild all files and load your image into target memory
• Run the example

© COPYRIGHT STMicroelectronics