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STM32F0xx Standard Peripherals Firmware Library
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STM32F0xx_StdPeriph_Examples/TIM/TIM_SynchronizationMode/main.c
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00001 /** 00002 ****************************************************************************** 00003 * @file TIM/TIM_SynchronizationMode/main.c 00004 * @author MCD Application Team 00005 * @version V1.4.0 00006 * @date 24-July-2014 00007 * @brief Main program body 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "main.h" 00030 00031 /** @addtogroup STM32F0xx_StdPeriph_Examples 00032 * @{ 00033 */ 00034 00035 /** @addtogroup TIM_SynchronizationMode 00036 * @{ 00037 */ 00038 00039 /* Private typedef -----------------------------------------------------------*/ 00040 /* Private define ------------------------------------------------------------*/ 00041 /* Private macro -------------------------------------------------------------*/ 00042 /* Private variables ---------------------------------------------------------*/ 00043 /* Private function prototypes -----------------------------------------------*/ 00044 static void TIM_Config(void); 00045 00046 /* Private functions ---------------------------------------------------------*/ 00047 00048 /** 00049 * @brief Main program. 00050 * @param None 00051 * @retval None 00052 */ 00053 int main(void) 00054 { 00055 /*!< At this stage the microcontroller clock setting is already configured, 00056 this is done through SystemInit() function which is called from startup 00057 file (startup_stm32f0xx.s) before to branch to application main. 00058 To reconfigure the default setting of SystemInit() function, refer to 00059 system_stm32f0xx.c file 00060 */ 00061 00062 /* TIM2/3 Configuration */ 00063 TIM_Config(); 00064 00065 /* Infinite loop */ 00066 while (1) 00067 { 00068 } 00069 } 00070 00071 /** 00072 * @brief Configure the TIM2/3 Pins. 00073 * @param None 00074 * @retval None 00075 */ 00076 static void TIM_Config(void) 00077 { 00078 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; 00079 TIM_OCInitTypeDef TIM_OCInitStructure; 00080 GPIO_InitTypeDef GPIO_InitStructure; 00081 00082 /* TIM2 and TIM3 clock enable */ 00083 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 , ENABLE); 00084 00085 /* GPIOA and GPIOB clocks enable */ 00086 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB, ENABLE); 00087 00088 /* GPIOB Configuration: PB4(TIM3 CH1) as alternate function push-pull ------*/ 00089 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; 00090 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; 00091 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 00092 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; 00093 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; 00094 GPIO_Init(GPIOB, &GPIO_InitStructure); 00095 00096 /* Connect TIM pins to AF1 */ 00097 GPIO_PinAFConfig(GPIOB, GPIO_PinSource4, GPIO_AF_1); 00098 00099 /* GPIOA Configuration: PA5(TIM2 CH1) as alternate function push-pull ------*/ 00100 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5; 00101 GPIO_Init(GPIOA, &GPIO_InitStructure); 00102 00103 /* Connect TIM pins to AF2 */ 00104 GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_2); 00105 00106 /* Timers synchronisation in cascade mode ---------------------------- 00107 1/TIM2 is configured as Master Timer: 00108 - PWM Mode is used 00109 - The TIM2 Update event is used as Trigger Output 00110 00111 2/TIM3 is slave for TIM2, 00112 - PWM Mode is used 00113 - The ITR1(TIM2) is used as input trigger 00114 - Gated mode is used, so start and stop of slave counter are controlled 00115 by the Master trigger output signal(TIM2 update event). 00116 00117 In this example TIM2 input clock (TIM2CLK) is set to APB1 clock (PCLK1). 00118 TIM2CLK = PCLK1 00119 PCLK1 = HCLK 00120 => TIM2CLK = HCLK = SystemCoreClock = 48 MHz 00121 00122 The TIM2 is running at: 00123 TIM2 frequency = (TIM2 counter clock)/ (TIM2 period + 1) = 187.5 KHz 00124 and duty cycle = TIM2_CCR1/(TIM2_ARR + 1) = 25%. 00125 00126 The slave Timer TIM3 is running at TIM2 clock: 00127 (TIM2 frequency)/ (TIM3 period + 1) = 46.87 KHz 00128 and duty cycle equal = TIM3_CCR1/(TIM3_ARR + 1) = 25% 00129 00130 The Master Timer TIM2 is running at TIM2 counter clock: 00131 TIM2 frequency = (TIM2 counter clock)/ (TIM2 period + 1) = 187.5 KHz 00132 and the duty cycle = TIM2_CCR1/(TIM2_ARR + 1) = 25%. 00133 00134 00135 Note: 00136 SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f0xx.c file. 00137 Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate() 00138 function to update SystemCoreClock variable value. Otherwise, any configuration 00139 based on this variable will be incorrect. 00140 --------------------------------------------------------------------------- */ 00141 00142 /* Time base configuration */ 00143 TIM_TimeBaseStructure.TIM_Period = 255; 00144 TIM_TimeBaseStructure.TIM_Prescaler = 0; 00145 TIM_TimeBaseStructure.TIM_ClockDivision = 0; 00146 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; 00147 TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); 00148 00149 TIM_TimeBaseStructure.TIM_Period = 3; 00150 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); 00151 00152 /* Master Configuration in PWM1 Mode */ 00153 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; 00154 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; 00155 TIM_OCInitStructure.TIM_Pulse = 64; 00156 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; 00157 00158 TIM_OC1Init(TIM2, &TIM_OCInitStructure); 00159 00160 /* Select the Master Slave Mode */ 00161 TIM_SelectMasterSlaveMode(TIM2, TIM_MasterSlaveMode_Enable); 00162 00163 /* Master Mode selection */ 00164 TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update); 00165 00166 /* Slaves Configuration: PWM1 Mode */ 00167 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; 00168 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; 00169 TIM_OCInitStructure.TIM_Pulse = 1; 00170 00171 TIM_OC1Init(TIM3, &TIM_OCInitStructure); 00172 00173 /* Slave Mode selection: TIM3 */ 00174 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated); 00175 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR1); 00176 00177 /* TIM enable counter */ 00178 TIM_Cmd(TIM3, ENABLE); 00179 TIM_Cmd(TIM2, ENABLE); 00180 00181 } 00182 00183 #ifdef USE_FULL_ASSERT 00184 00185 /** 00186 * @brief Reports the name of the source file and the source line number 00187 * where the assert_param error has occurred. 00188 * @param file: pointer to the source file name 00189 * @param line: assert_param error line source number 00190 * @retval None 00191 */ 00192 void assert_failed(uint8_t* file, uint32_t line) 00193 { 00194 /* User can add his own implementation to report the file name and line number, 00195 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 00196 00197 /* Infinite loop */ 00198 while (1) 00199 { 00200 } 00201 } 00202 #endif 00203 00204 /** 00205 * @} 00206 */ 00207 00208 /** 00209 * @} 00210 */ 00211 00212 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/