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STM32F0xx Standard Peripherals Firmware Library
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STM32F0xx_StdPeriph_Examples/TIM/TIM_DMABurst/main.c
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00001 /** 00002 ****************************************************************************** 00003 * @file TIM/TIM_DMABurst/main.c 00004 * @author MCD Application Team 00005 * @version V1.4.0 00006 * @date 24-July-2014 00007 * @brief Main program body 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "main.h" 00030 00031 /** @addtogroup STM32F0xx_StdPeriph_Examples 00032 * @{ 00033 */ 00034 00035 /** @addtogroup TIM_DMABurst 00036 * @{ 00037 */ 00038 00039 /* Private typedef -----------------------------------------------------------*/ 00040 #define TIM1_DMAR_ADDRESS ((uint32_t)0x40012C4C) /* TIM DMAR address */ 00041 00042 /* Private macro -------------------------------------------------------------*/ 00043 /* Private variables ---------------------------------------------------------*/ 00044 TIM_OCInitTypeDef TIM_OCInitStructure; 00045 uint16_t SRC_Buffer[3] = {0x0FFF, 0x0000, 0x0555}; 00046 /* Private function prototypes -----------------------------------------------*/ 00047 static void TIM_Config(void); 00048 static void DMA_Config(void); 00049 00050 /* Private functions ---------------------------------------------------------*/ 00051 00052 /** 00053 * @brief Main program. 00054 * @param None 00055 * @retval None 00056 */ 00057 int main(void) 00058 { 00059 /*!< At this stage the microcontroller clock setting is already configured, 00060 this is done through SystemInit() function which is called from startup 00061 file (startup_stm32f0xx.s) before to branch to application main. 00062 To reconfigure the default setting of SystemInit() function, refer to 00063 system_stm32f0xx.c file 00064 */ 00065 00066 /* TIM1 Configuration */ 00067 TIM_Config(); 00068 00069 /* DMA1 Configuration */ 00070 DMA_Config(); 00071 00072 /* Wait until DMA2 Stream5 end of Transfer */ 00073 while (!DMA_GetFlagStatus(DMA1_FLAG_TC5)) 00074 { 00075 } 00076 00077 /* Infinite loop */ 00078 while(1) 00079 { 00080 } 00081 } 00082 00083 /** 00084 * @brief Configure the TIM1 Pins. 00085 * @param None 00086 * @retval None 00087 */ 00088 static void TIM_Config(void) 00089 { 00090 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; 00091 GPIO_InitTypeDef GPIO_InitStructure; 00092 00093 /* TIM1 clock enable */ 00094 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); 00095 00096 /* GPIOA clock enable */ 00097 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); 00098 00099 /* DMA2 clock enable */ 00100 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); 00101 00102 /* GPIOA Configuration: PA8(TIM1 CH1) as alternate function push-pull ------*/ 00103 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; 00104 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; 00105 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 00106 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; 00107 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; 00108 GPIO_Init(GPIOA, &GPIO_InitStructure); 00109 00110 /* Connect TIM pins to AF2 */ 00111 GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF_2); 00112 00113 /* Time base configuration */ 00114 /* ----------------------------------------------------------------------- 00115 TIM1 Configuration: generate 1 PWM signal using the DMA burst mode: 00116 00117 TIM1 input clock (TIM1CLK) is set to APB2 clock (PCLK2) 00118 TIM1CLK = PCLK2 00119 PCLK2 = HCLK 00120 => TIM1CLK = HCLK = SystemCoreClock 00121 00122 To get TIM1 counter clock at 24 MHz, the prescaler is computed as follows: 00123 Prescaler = (TIM1CLK / TIM1 counter clock) - 1 00124 Prescaler = (SystemCoreClock /24 MHz) - 1 00125 00126 TIM1 Frequency = TIM1 counter clock/(ARR + 1) 00127 = 24 MHz / 4096 = 5.85 KHz 00128 TIM1 Channel1 duty cycle = (TIM1_CCR1/ TIM1_ARR)* 100 = 33.33% 00129 00130 Note: 00131 SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f0xx.c file. 00132 Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate() 00133 function to update SystemCoreClock variable value. Otherwise, any configuration 00134 based on this variable will be incorrect. 00135 ----------------------------------------------------------------------- */ 00136 TIM_TimeBaseStructure.TIM_Period = 0xFFFF; 00137 TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t) (SystemCoreClock / 24000000) - 1; 00138 TIM_TimeBaseStructure.TIM_ClockDivision = 0x0; 00139 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; 00140 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); 00141 00142 /* TIM Configuration in PWM Mode */ 00143 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; 00144 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; 00145 TIM_OCInitStructure.TIM_Pulse = 0xFFF; 00146 TIM_OC1Init(TIM1, &TIM_OCInitStructure); 00147 00148 /* TIM1 DMAR Base register and DMA Burst Length Config */ 00149 TIM_DMAConfig(TIM1, TIM_DMABase_ARR, TIM_DMABurstLength_3Transfers); 00150 00151 /* TIM1 DMA Update enable */ 00152 TIM_DMACmd(TIM1, TIM_DMA_Update, ENABLE); 00153 00154 /* TIM1 enable */ 00155 TIM_Cmd(TIM1, ENABLE); 00156 00157 /* TIM1 PWM Outputs Enable */ 00158 TIM_CtrlPWMOutputs(TIM1, ENABLE); 00159 00160 } 00161 00162 /** 00163 * @brief Configure DMA1. 00164 * @param None 00165 * @retval None 00166 */ 00167 static void DMA_Config(void) 00168 { 00169 DMA_InitTypeDef DMA_InitStructure; 00170 00171 /* DeInitialize the DMA1 Stream5 */ 00172 DMA_DeInit(DMA1_Channel5); 00173 00174 DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)TIM1_DMAR_ADDRESS; 00175 DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SRC_Buffer; 00176 DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; 00177 DMA_InitStructure.DMA_BufferSize = 3; 00178 DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; 00179 DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; 00180 DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; 00181 DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; 00182 DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; 00183 DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; 00184 DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; 00185 DMA_Init(DMA1_Channel5, &DMA_InitStructure); 00186 00187 /* Enable DMA1 Stream5 */ 00188 DMA_Cmd(DMA1_Channel5, ENABLE); 00189 00190 } 00191 00192 #ifdef USE_FULL_ASSERT 00193 00194 /** 00195 * @brief Reports the name of the source file and the source line number 00196 * where the assert_param error has occurred. 00197 * @param file: pointer to the source file name 00198 * @param line: assert_param error line source number 00199 * @retval None 00200 */ 00201 void assert_failed(uint8_t* file, uint32_t line) 00202 { 00203 /* User can add his own implementation to report the file name and line number, 00204 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 00205 00206 /* Infinite loop */ 00207 while (1) 00208 { 00209 } 00210 } 00211 #endif 00212 00213 /** 00214 * @} 00215 */ 00216 00217 /** 00218 * @} 00219 */ 00220 00221 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/