STM32F0xx Standard Peripherals Firmware Library: stm32f0xx_it.c Source File

00001 /**
00002   ******************************************************************************
00003   * @file    TIM/TIM_6Steps/stm32f0xx_it.c 
00004   * @author  MCD Application Team
00005   * @version V1.4.0
00006   * @date    24-July-2014
00007   * @brief   Main Interrupt Service Routines.
00008   *          This file provides template for all exceptions handler and 
00009   *          peripherals interrupt service routine.
00010   ******************************************************************************
00011   * @attention
00012   *
00013   * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
00014   *
00015   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00016   * You may not use this file except in compliance with the License.
00017   * You may obtain a copy of the License at:
00018   *
00019   *        http://www.st.com/software_license_agreement_liberty_v2
00020   *
00021   * Unless required by applicable law or agreed to in writing, software 
00022   * distributed under the License is distributed on an "AS IS" BASIS, 
00023   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00024   * See the License for the specific language governing permissions and
00025   * limitations under the License.
00026   *
00027   ******************************************************************************
00028   */
00029 
00030 /* Includes ------------------------------------------------------------------*/
00031 #include "stm32f0xx_it.h"
00032 
00033 /** @addtogroup STM32F0xx_StdPeriph_Examples
00034   * @{
00035   */
00036 
00037 /** @addtogroup TIM_6Steps
00038   * @{
00039   */
00040 
00041 /* Private typedef -----------------------------------------------------------*/
00042 /* Private define ------------------------------------------------------------*/
00043 /* Private macro -------------------------------------------------------------*/
00044 /* Private variables ---------------------------------------------------------*/
00045 __IO uint32_t step = 1;
00046 
00047 /* Private function prototypes -----------------------------------------------*/
00048 /* Private functions ---------------------------------------------------------*/
00049 
00050 /******************************************************************************/
00051 /*            Cortex-M0 Processor Exceptions Handlers                         */
00052 /******************************************************************************/
00053 
00054 /**
00055   * @brief  This function handles NMI exception.
00056   * @param  None
00057   * @retval None
00058   */
00059 void NMI_Handler(void)
00060 {
00061 }
00062 
00063 /**
00064   * @brief  This function handles Hard Fault exception.
00065   * @param  None
00066   * @retval None
00067   */
00068 void HardFault_Handler(void)
00069 {
00070   /* Go to infinite loop when Hard Fault exception occurs */
00071   while (1)
00072   {
00073   }
00074 }
00075 
00076 /**
00077   * @brief  This function handles SVCall exception.
00078   * @param  None
00079   * @retval None
00080   */
00081 void SVC_Handler(void)
00082 {
00083 }
00084 
00085 /**
00086   * @brief  This function handles PendSVC exception.
00087   * @param  None
00088   * @retval None
00089   */
00090 void PendSV_Handler(void)
00091 {
00092 }
00093 
00094 /**
00095   * @brief  This function handles SysTick Handler.
00096   * @param  None
00097   * @retval None
00098   */
00099 void SysTick_Handler(void)
00100 {
00101   /* Generate TIM1 COM event by software */
00102   TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
00103 }
00104 
00105 /******************************************************************************/
00106 /*                 STM32F0xx Peripherals Interrupt Handlers                   */
00107 /*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
00108 /*  available peripheral interrupt handler's name please refer to the startup */
00109 /*  file (startup_stm32f0xx.s).                                               */
00110 /******************************************************************************/
00111 /**
00112   * @brief  This function handles TIM1 Break, Update, Trigger and Commutation interrupt request.
00113   * @param  None
00114   * @retval None
00115   */
00116 void TIM1_BRK_UP_TRG_COM_IRQHandler(void)
00117 {
00118   /* Clear TIM1 COM pending bit */
00119   TIM_ClearITPendingBit(TIM1, TIM_IT_COM);
00120 
00121   if (step == 1)
00122   {
00123     /* Next step: Step 2 Configuration -------------------------------------- */
00124     /*  Channel3 configuration */
00125     TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
00126     TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
00127 
00128     /*  Channel1 configuration */
00129     TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
00130     TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
00131     TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
00132 
00133     /*  Channel2 configuration */
00134     TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1 );
00135     TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
00136     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);
00137     step++;
00138   }
00139   else if (step == 2)
00140   {
00141     /* Next step: Step 3 Configuration -------------------------------------- */
00142     /*  Channel2 configuration */
00143     TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1);
00144     TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
00145     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);
00146     
00147     /*  Channel3 configuration */
00148     TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
00149     TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
00150      TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
00151 
00152     /*  Channel1 configuration */
00153     TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
00154     TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
00155     step++;
00156   }
00157   else if (step == 3)
00158   {
00159     /* Next step: Step 4 Configuration -------------------------------------- */
00160     /*  Channel3 configuration */
00161     TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
00162     TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
00163     TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
00164 
00165     /*  Channel2 configuration */
00166     TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
00167     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
00168 
00169     /*  Channel1 configuration */
00170     TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
00171     TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
00172     TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
00173     step++;
00174   }
00175   else if (step == 4)
00176   {
00177     /* Next step: Step 5 Configuration -------------------------------------- */
00178     /*  Channel3 configuration */
00179     TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
00180     TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
00181 
00182     /*  Channel1 configuration */
00183     TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
00184     TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
00185     TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
00186 
00187     /*  Channel2 configuration */
00188     TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1);
00189     TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
00190     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
00191     step++;
00192   }
00193   else if (step == 5)
00194   {
00195     /* Next step: Step 6 Configuration -------------------------------------- */
00196     /*  Channel3 configuration */
00197     TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
00198     TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
00199     TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);
00200 
00201     /*  Channel1 configuration */
00202     TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
00203     TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
00204 
00205     /*  Channel2 configuration */
00206     TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1);
00207     TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
00208     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
00209     step++;
00210   }
00211   else
00212   {
00213     /* Next step: Step 1 Configuration -------------------------------------- */
00214     /*  Channel1 configuration */
00215     TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
00216     TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
00217     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
00218 
00219     /*  Channel3 configuration */
00220     TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
00221     TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
00222     TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);
00223 
00224     /*  Channel2 configuration */
00225     TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
00226     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
00227     step = 1;
00228   }
00229 }
00230 
00231 /**
00232   * @brief  This function handles PPP interrupt request.
00233   * @param  None
00234   * @retval None
00235   */
00236 /*void PPP_IRQHandler(void)
00237 {
00238 }*/
00239 
00240 /**
00241   * @}
00242   */
00243 
00244 /**
00245   * @}
00246   */
00247 
00248 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/