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STM8S/A Standard Peripherals Drivers
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stm8s_tim2.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8s_tim2.c 00004 * @author MCD Application Team 00005 * @version V2.2.0 00006 * @date 30-September-2014 00007 * @brief This file contains all the functions for the TIM2 peripheral. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm8s_tim2.h" 00030 00031 /** @addtogroup STM8S_StdPeriph_Driver 00032 * @{ 00033 */ 00034 /* Private typedef -----------------------------------------------------------*/ 00035 /* Private define ------------------------------------------------------------*/ 00036 /* Private macro -------------------------------------------------------------*/ 00037 /* Private variables ---------------------------------------------------------*/ 00038 /* Private function prototypes -----------------------------------------------*/ 00039 static void TI1_Config(uint8_t TIM2_ICPolarity, uint8_t TIM2_ICSelection, uint8_t TIM2_ICFilter); 00040 static void TI2_Config(uint8_t TIM2_ICPolarity, uint8_t TIM2_ICSelection, uint8_t TIM2_ICFilter); 00041 static void TI3_Config(uint8_t TIM2_ICPolarity, uint8_t TIM2_ICSelection, uint8_t TIM2_ICFilter); 00042 /** 00043 * @addtogroup TIM2_Public_Functions 00044 * @{ 00045 */ 00046 00047 /** 00048 * @brief Deinitializes the TIM2 peripheral registers to their default reset values. 00049 * @param None 00050 * @retval None 00051 */ 00052 void TIM2_DeInit(void) 00053 { 00054 TIM2->CR1 = (uint8_t)TIM2_CR1_RESET_VALUE; 00055 TIM2->IER = (uint8_t)TIM2_IER_RESET_VALUE; 00056 TIM2->SR2 = (uint8_t)TIM2_SR2_RESET_VALUE; 00057 00058 /* Disable channels */ 00059 TIM2->CCER1 = (uint8_t)TIM2_CCER1_RESET_VALUE; 00060 TIM2->CCER2 = (uint8_t)TIM2_CCER2_RESET_VALUE; 00061 00062 00063 /* Then reset channel registers: it also works if lock level is equal to 2 or 3 */ 00064 TIM2->CCER1 = (uint8_t)TIM2_CCER1_RESET_VALUE; 00065 TIM2->CCER2 = (uint8_t)TIM2_CCER2_RESET_VALUE; 00066 TIM2->CCMR1 = (uint8_t)TIM2_CCMR1_RESET_VALUE; 00067 TIM2->CCMR2 = (uint8_t)TIM2_CCMR2_RESET_VALUE; 00068 TIM2->CCMR3 = (uint8_t)TIM2_CCMR3_RESET_VALUE; 00069 TIM2->CNTRH = (uint8_t)TIM2_CNTRH_RESET_VALUE; 00070 TIM2->CNTRL = (uint8_t)TIM2_CNTRL_RESET_VALUE; 00071 TIM2->PSCR = (uint8_t)TIM2_PSCR_RESET_VALUE; 00072 TIM2->ARRH = (uint8_t)TIM2_ARRH_RESET_VALUE; 00073 TIM2->ARRL = (uint8_t)TIM2_ARRL_RESET_VALUE; 00074 TIM2->CCR1H = (uint8_t)TIM2_CCR1H_RESET_VALUE; 00075 TIM2->CCR1L = (uint8_t)TIM2_CCR1L_RESET_VALUE; 00076 TIM2->CCR2H = (uint8_t)TIM2_CCR2H_RESET_VALUE; 00077 TIM2->CCR2L = (uint8_t)TIM2_CCR2L_RESET_VALUE; 00078 TIM2->CCR3H = (uint8_t)TIM2_CCR3H_RESET_VALUE; 00079 TIM2->CCR3L = (uint8_t)TIM2_CCR3L_RESET_VALUE; 00080 TIM2->SR1 = (uint8_t)TIM2_SR1_RESET_VALUE; 00081 } 00082 00083 /** 00084 * @brief Initializes the TIM2 Time Base Unit according to the specified parameters. 00085 * @param TIM2_Prescaler specifies the Prescaler from TIM2_Prescaler_TypeDef. 00086 * @param TIM2_Period specifies the Period value. 00087 * @retval None 00088 */ 00089 void TIM2_TimeBaseInit( TIM2_Prescaler_TypeDef TIM2_Prescaler, 00090 uint16_t TIM2_Period) 00091 { 00092 /* Set the Prescaler value */ 00093 TIM2->PSCR = (uint8_t)(TIM2_Prescaler); 00094 /* Set the Autoreload value */ 00095 TIM2->ARRH = (uint8_t)(TIM2_Period >> 8); 00096 TIM2->ARRL = (uint8_t)(TIM2_Period); 00097 } 00098 00099 00100 /** 00101 * @brief Initializes the TIM2 Channel1 according to the specified parameters. 00102 * @param TIM2_OCMode specifies the Output Compare mode from @ref TIM2_OCMode_TypeDef. 00103 * @param TIM2_OutputState specifies the Output State from @ref TIM2_OutputState_TypeDef. 00104 * @param TIM2_Pulse specifies the Pulse width value. 00105 * @param TIM2_OCPolarity specifies the Output Compare Polarity from @ref TIM2_OCPolarity_TypeDef. 00106 * @retval None 00107 */ 00108 void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode, 00109 TIM2_OutputState_TypeDef TIM2_OutputState, 00110 uint16_t TIM2_Pulse, 00111 TIM2_OCPolarity_TypeDef TIM2_OCPolarity) 00112 { 00113 /* Check the parameters */ 00114 assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode)); 00115 assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState)); 00116 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity)); 00117 00118 /* Disable the Channel 1: Reset the CCE Bit, Set the Output State , the Output Polarity */ 00119 TIM2->CCER1 &= (uint8_t)(~( TIM2_CCER1_CC1E | TIM2_CCER1_CC1P)); 00120 /* Set the Output State & Set the Output Polarity */ 00121 TIM2->CCER1 |= (uint8_t)((uint8_t)(TIM2_OutputState & TIM2_CCER1_CC1E ) | 00122 (uint8_t)(TIM2_OCPolarity & TIM2_CCER1_CC1P)); 00123 00124 /* Reset the Output Compare Bits & Set the Ouput Compare Mode */ 00125 TIM2->CCMR1 = (uint8_t)((uint8_t)(TIM2->CCMR1 & (uint8_t)(~TIM2_CCMR_OCM)) | 00126 (uint8_t)TIM2_OCMode); 00127 00128 /* Set the Pulse value */ 00129 TIM2->CCR1H = (uint8_t)(TIM2_Pulse >> 8); 00130 TIM2->CCR1L = (uint8_t)(TIM2_Pulse); 00131 } 00132 00133 00134 /** 00135 * @brief Initializes the TIM2 Channel2 according to the specified parameters. 00136 * @param TIM2_OCMode specifies the Output Compare mode from @ref TIM2_OCMode_TypeDef. 00137 * @param TIM2_OutputState specifies the Output State from @ref TIM2_OutputState_TypeDef. 00138 * @param TIM2_Pulse specifies the Pulse width value. 00139 * @param TIM2_OCPolarity specifies the Output Compare Polarity from @ref TIM2_OCPolarity_TypeDef. 00140 * @retval None 00141 */ 00142 void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode, 00143 TIM2_OutputState_TypeDef TIM2_OutputState, 00144 uint16_t TIM2_Pulse, 00145 TIM2_OCPolarity_TypeDef TIM2_OCPolarity) 00146 { 00147 /* Check the parameters */ 00148 assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode)); 00149 assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState)); 00150 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity)); 00151 00152 00153 /* Disable the Channel 1: Reset the CCE Bit, Set the Output State, the Output Polarity */ 00154 TIM2->CCER1 &= (uint8_t)(~( TIM2_CCER1_CC2E | TIM2_CCER1_CC2P )); 00155 /* Set the Output State & Set the Output Polarity */ 00156 TIM2->CCER1 |= (uint8_t)((uint8_t)(TIM2_OutputState & TIM2_CCER1_CC2E ) | 00157 (uint8_t)(TIM2_OCPolarity & TIM2_CCER1_CC2P)); 00158 00159 00160 /* Reset the Output Compare Bits & Set the Output Compare Mode */ 00161 TIM2->CCMR2 = (uint8_t)((uint8_t)(TIM2->CCMR2 & (uint8_t)(~TIM2_CCMR_OCM)) | 00162 (uint8_t)TIM2_OCMode); 00163 00164 00165 /* Set the Pulse value */ 00166 TIM2->CCR2H = (uint8_t)(TIM2_Pulse >> 8); 00167 TIM2->CCR2L = (uint8_t)(TIM2_Pulse); 00168 } 00169 00170 00171 /** 00172 * @brief Initializes the TIM2 Channel3 according to the specified parameters. 00173 * @param TIM2_OCMode specifies the Output Compare mode from @ref TIM2_OCMode_TypeDef. 00174 * @param TIM2_OutputState specifies the Output State from @ref TIM2_OutputState_TypeDef. 00175 * @param TIM2_Pulse specifies the Pulse width value. 00176 * @param TIM2_OCPolarity specifies the Output Compare Polarity from @ref TIM2_OCPolarity_TypeDef. 00177 * @retval None 00178 */ 00179 void TIM2_OC3Init(TIM2_OCMode_TypeDef TIM2_OCMode, 00180 TIM2_OutputState_TypeDef TIM2_OutputState, 00181 uint16_t TIM2_Pulse, 00182 TIM2_OCPolarity_TypeDef TIM2_OCPolarity) 00183 { 00184 /* Check the parameters */ 00185 assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode)); 00186 assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState)); 00187 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity)); 00188 /* Disable the Channel 1: Reset the CCE Bit, Set the Output State, the Output Polarity */ 00189 TIM2->CCER2 &= (uint8_t)(~( TIM2_CCER2_CC3E | TIM2_CCER2_CC3P)); 00190 /* Set the Output State & Set the Output Polarity */ 00191 TIM2->CCER2 |= (uint8_t)((uint8_t)(TIM2_OutputState & TIM2_CCER2_CC3E) | 00192 (uint8_t)(TIM2_OCPolarity & TIM2_CCER2_CC3P)); 00193 00194 /* Reset the Output Compare Bits & Set the Output Compare Mode */ 00195 TIM2->CCMR3 = (uint8_t)((uint8_t)(TIM2->CCMR3 & (uint8_t)(~TIM2_CCMR_OCM)) | 00196 (uint8_t)TIM2_OCMode); 00197 00198 /* Set the Pulse value */ 00199 TIM2->CCR3H = (uint8_t)(TIM2_Pulse >> 8); 00200 TIM2->CCR3L = (uint8_t)(TIM2_Pulse); 00201 } 00202 00203 /** 00204 * @brief Initializes the TIM2 peripheral according to the specified parameters. 00205 * @param TIM2_Channel specifies the Input Capture Channel from @ref TIM2_Channel_TypeDef. 00206 * @param TIM2_ICPolarity specifies the Input Capture Polarity from @ref TIM2_ICPolarity_TypeDef. 00207 * @param TIM2_ICSelection specifies the Input Capture Selection from @ref TIM2_ICSelection_TypeDef. 00208 * @param TIM2_ICPrescaler specifies the Input Capture Prescaler from @ref TIM2_ICPSC_TypeDef. 00209 * @param TIM2_ICFilter specifies the Input Capture Filter value (value can be an integer from 0x00 to 0x0F). 00210 * @retval None 00211 */ 00212 void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel, 00213 TIM2_ICPolarity_TypeDef TIM2_ICPolarity, 00214 TIM2_ICSelection_TypeDef TIM2_ICSelection, 00215 TIM2_ICPSC_TypeDef TIM2_ICPrescaler, 00216 uint8_t TIM2_ICFilter) 00217 { 00218 /* Check the parameters */ 00219 assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel)); 00220 assert_param(IS_TIM2_IC_POLARITY_OK(TIM2_ICPolarity)); 00221 assert_param(IS_TIM2_IC_SELECTION_OK(TIM2_ICSelection)); 00222 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_ICPrescaler)); 00223 assert_param(IS_TIM2_IC_FILTER_OK(TIM2_ICFilter)); 00224 00225 if (TIM2_Channel == TIM2_CHANNEL_1) 00226 { 00227 /* TI1 Configuration */ 00228 TI1_Config((uint8_t)TIM2_ICPolarity, 00229 (uint8_t)TIM2_ICSelection, 00230 (uint8_t)TIM2_ICFilter); 00231 00232 /* Set the Input Capture Prescaler value */ 00233 TIM2_SetIC1Prescaler(TIM2_ICPrescaler); 00234 } 00235 else if (TIM2_Channel == TIM2_CHANNEL_2) 00236 { 00237 /* TI2 Configuration */ 00238 TI2_Config((uint8_t)TIM2_ICPolarity, 00239 (uint8_t)TIM2_ICSelection, 00240 (uint8_t)TIM2_ICFilter); 00241 00242 /* Set the Input Capture Prescaler value */ 00243 TIM2_SetIC2Prescaler(TIM2_ICPrescaler); 00244 } 00245 else 00246 { 00247 /* TI3 Configuration */ 00248 TI3_Config((uint8_t)TIM2_ICPolarity, 00249 (uint8_t)TIM2_ICSelection, 00250 (uint8_t)TIM2_ICFilter); 00251 00252 /* Set the Input Capture Prescaler value */ 00253 TIM2_SetIC3Prescaler(TIM2_ICPrescaler); 00254 } 00255 } 00256 00257 /** 00258 * @brief Configures the TIM2 peripheral in PWM Input Mode according to the specified parameters. 00259 * @param TIM2_Channel specifies the Input Capture Channel from @ref TIM2_Channel_TypeDef. 00260 * @param TIM2_ICPolarity specifies the Input Capture Polarity from @ref TIM2_ICPolarity_TypeDef. 00261 * @param TIM2_ICSelection specifies the Input Capture Selection from @ref TIM2_ICSelection_TypeDef. 00262 * @param TIM2_ICPrescaler specifies the Input Capture Prescaler from @ref TIM2_ICPSC_TypeDef. 00263 * @param TIM2_ICFilter specifies the Input Capture Filter value (value can be an integer from 0x00 to 0x0F). 00264 * @retval None 00265 */ 00266 void TIM2_PWMIConfig(TIM2_Channel_TypeDef TIM2_Channel, 00267 TIM2_ICPolarity_TypeDef TIM2_ICPolarity, 00268 TIM2_ICSelection_TypeDef TIM2_ICSelection, 00269 TIM2_ICPSC_TypeDef TIM2_ICPrescaler, 00270 uint8_t TIM2_ICFilter) 00271 { 00272 uint8_t icpolarity = (uint8_t)TIM2_ICPOLARITY_RISING; 00273 uint8_t icselection = (uint8_t)TIM2_ICSELECTION_DIRECTTI; 00274 00275 /* Check the parameters */ 00276 assert_param(IS_TIM2_PWMI_CHANNEL_OK(TIM2_Channel)); 00277 assert_param(IS_TIM2_IC_POLARITY_OK(TIM2_ICPolarity)); 00278 assert_param(IS_TIM2_IC_SELECTION_OK(TIM2_ICSelection)); 00279 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_ICPrescaler)); 00280 00281 /* Select the Opposite Input Polarity */ 00282 if (TIM2_ICPolarity != TIM2_ICPOLARITY_FALLING) 00283 { 00284 icpolarity = (uint8_t)TIM2_ICPOLARITY_FALLING; 00285 } 00286 else 00287 { 00288 icpolarity = (uint8_t)TIM2_ICPOLARITY_RISING; 00289 } 00290 00291 /* Select the Opposite Input */ 00292 if (TIM2_ICSelection == TIM2_ICSELECTION_DIRECTTI) 00293 { 00294 icselection = (uint8_t)TIM2_ICSELECTION_INDIRECTTI; 00295 } 00296 else 00297 { 00298 icselection = (uint8_t)TIM2_ICSELECTION_DIRECTTI; 00299 } 00300 00301 if (TIM2_Channel == TIM2_CHANNEL_1) 00302 { 00303 /* TI1 Configuration */ 00304 TI1_Config((uint8_t)TIM2_ICPolarity, (uint8_t)TIM2_ICSelection, 00305 (uint8_t)TIM2_ICFilter); 00306 00307 /* Set the Input Capture Prescaler value */ 00308 TIM2_SetIC1Prescaler(TIM2_ICPrescaler); 00309 00310 /* TI2 Configuration */ 00311 TI2_Config(icpolarity, icselection, TIM2_ICFilter); 00312 00313 /* Set the Input Capture Prescaler value */ 00314 TIM2_SetIC2Prescaler(TIM2_ICPrescaler); 00315 } 00316 else 00317 { 00318 /* TI2 Configuration */ 00319 TI2_Config((uint8_t)TIM2_ICPolarity, (uint8_t)TIM2_ICSelection, 00320 (uint8_t)TIM2_ICFilter); 00321 00322 /* Set the Input Capture Prescaler value */ 00323 TIM2_SetIC2Prescaler(TIM2_ICPrescaler); 00324 00325 /* TI1 Configuration */ 00326 TI1_Config((uint8_t)icpolarity, icselection, (uint8_t)TIM2_ICFilter); 00327 00328 /* Set the Input Capture Prescaler value */ 00329 TIM2_SetIC1Prescaler(TIM2_ICPrescaler); 00330 } 00331 } 00332 00333 /** 00334 * @brief Enables or disables the TIM2 peripheral. 00335 * @param NewState new state of the TIM2 peripheral. This parameter can 00336 * be ENABLE or DISABLE. 00337 * @retval None 00338 */ 00339 void TIM2_Cmd(FunctionalState NewState) 00340 { 00341 /* Check the parameters */ 00342 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00343 00344 /* set or Reset the CEN Bit */ 00345 if (NewState != DISABLE) 00346 { 00347 TIM2->CR1 |= (uint8_t)TIM2_CR1_CEN; 00348 } 00349 else 00350 { 00351 TIM2->CR1 &= (uint8_t)(~TIM2_CR1_CEN); 00352 } 00353 } 00354 00355 /** 00356 * @brief Enables or disables the specified TIM2 interrupts. 00357 * @param NewState new state of the TIM2 peripheral. 00358 * This parameter can be: ENABLE or DISABLE. 00359 * @param TIM2_IT specifies the TIM2 interrupts sources to be enabled or disabled. 00360 * This parameter can be any combination of the following values: 00361 * - TIM2_IT_UPDATE: TIM2 update Interrupt source 00362 * - TIM2_IT_CC1: TIM2 Capture Compare 1 Interrupt source 00363 * - TIM2_IT_CC2: TIM2 Capture Compare 2 Interrupt source 00364 * - TIM2_IT_CC3: TIM2 Capture Compare 3 Interrupt source 00365 * @param NewState new state of the TIM2 peripheral. 00366 * @retval None 00367 */ 00368 void TIM2_ITConfig(TIM2_IT_TypeDef TIM2_IT, FunctionalState NewState) 00369 { 00370 /* Check the parameters */ 00371 assert_param(IS_TIM2_IT_OK(TIM2_IT)); 00372 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00373 00374 if (NewState != DISABLE) 00375 { 00376 /* Enable the Interrupt sources */ 00377 TIM2->IER |= (uint8_t)TIM2_IT; 00378 } 00379 else 00380 { 00381 /* Disable the Interrupt sources */ 00382 TIM2->IER &= (uint8_t)(~TIM2_IT); 00383 } 00384 } 00385 00386 /** 00387 * @brief Enables or Disables the TIM2 Update event. 00388 * @param NewState new state of the TIM2 peripheral Preload register. This parameter can 00389 * be ENABLE or DISABLE. 00390 * @retval None 00391 */ 00392 void TIM2_UpdateDisableConfig(FunctionalState NewState) 00393 { 00394 /* Check the parameters */ 00395 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00396 00397 /* Set or Reset the UDIS Bit */ 00398 if (NewState != DISABLE) 00399 { 00400 TIM2->CR1 |= (uint8_t)TIM2_CR1_UDIS; 00401 } 00402 else 00403 { 00404 TIM2->CR1 &= (uint8_t)(~TIM2_CR1_UDIS); 00405 } 00406 } 00407 00408 /** 00409 * @brief Selects the TIM2 Update Request Interrupt source. 00410 * @param TIM2_UpdateSource specifies the Update source. 00411 * This parameter can be one of the following values 00412 * - TIM2_UPDATESOURCE_REGULAR 00413 * - TIM2_UPDATESOURCE_GLOBAL 00414 * @retval None 00415 */ 00416 void TIM2_UpdateRequestConfig(TIM2_UpdateSource_TypeDef TIM2_UpdateSource) 00417 { 00418 /* Check the parameters */ 00419 assert_param(IS_TIM2_UPDATE_SOURCE_OK(TIM2_UpdateSource)); 00420 00421 /* Set or Reset the URS Bit */ 00422 if (TIM2_UpdateSource != TIM2_UPDATESOURCE_GLOBAL) 00423 { 00424 TIM2->CR1 |= (uint8_t)TIM2_CR1_URS; 00425 } 00426 else 00427 { 00428 TIM2->CR1 &= (uint8_t)(~TIM2_CR1_URS); 00429 } 00430 } 00431 00432 /** 00433 * @brief Selects the TIM2�s One Pulse Mode. 00434 * @param TIM2_OPMode specifies the OPM Mode to be used. 00435 * This parameter can be one of the following values 00436 * - TIM2_OPMODE_SINGLE 00437 * - TIM2_OPMODE_REPETITIVE 00438 * @retval None 00439 */ 00440 void TIM2_SelectOnePulseMode(TIM2_OPMode_TypeDef TIM2_OPMode) 00441 { 00442 /* Check the parameters */ 00443 assert_param(IS_TIM2_OPM_MODE_OK(TIM2_OPMode)); 00444 00445 /* Set or Reset the OPM Bit */ 00446 if (TIM2_OPMode != TIM2_OPMODE_REPETITIVE) 00447 { 00448 TIM2->CR1 |= (uint8_t)TIM2_CR1_OPM; 00449 } 00450 else 00451 { 00452 TIM2->CR1 &= (uint8_t)(~TIM2_CR1_OPM); 00453 } 00454 } 00455 00456 /** 00457 * @brief Configures the TIM2 Prescaler. 00458 * @param Prescaler specifies the Prescaler Register value 00459 * This parameter can be one of the following values 00460 * - TIM2_PRESCALER_1 00461 * - TIM2_PRESCALER_2 00462 * - TIM2_PRESCALER_4 00463 * - TIM2_PRESCALER_8 00464 * - TIM2_PRESCALER_16 00465 * - TIM2_PRESCALER_32 00466 * - TIM2_PRESCALER_64 00467 * - TIM2_PRESCALER_128 00468 * - TIM2_PRESCALER_256 00469 * - TIM2_PRESCALER_512 00470 * - TIM2_PRESCALER_1024 00471 * - TIM2_PRESCALER_2048 00472 * - TIM2_PRESCALER_4096 00473 * - TIM2_PRESCALER_8192 00474 * - TIM2_PRESCALER_16384 00475 * - TIM2_PRESCALER_32768 00476 * @param TIM2_PSCReloadMode specifies the TIM2 Prescaler Reload mode. 00477 * This parameter can be one of the following values 00478 * - TIM2_PSCRELOADMODE_IMMEDIATE: The Prescaler is loaded 00479 * immediately. 00480 * - TIM2_PSCRELOADMODE_UPDATE: The Prescaler is loaded at 00481 * the update event. 00482 * @retval None 00483 */ 00484 void TIM2_PrescalerConfig(TIM2_Prescaler_TypeDef Prescaler, 00485 TIM2_PSCReloadMode_TypeDef TIM2_PSCReloadMode) 00486 { 00487 /* Check the parameters */ 00488 assert_param(IS_TIM2_PRESCALER_RELOAD_OK(TIM2_PSCReloadMode)); 00489 assert_param(IS_TIM2_PRESCALER_OK(Prescaler)); 00490 00491 /* Set the Prescaler value */ 00492 TIM2->PSCR = (uint8_t)Prescaler; 00493 00494 /* Set or reset the UG Bit */ 00495 TIM2->EGR = (uint8_t)TIM2_PSCReloadMode; 00496 } 00497 00498 /** 00499 * @brief Forces the TIM2 Channel1 output waveform to active or inactive level. 00500 * @param TIM2_ForcedAction specifies the forced Action to be set to the output waveform. 00501 * This parameter can be one of the following values: 00502 * - TIM2_FORCEDACTION_ACTIVE: Force active level on OC1REF 00503 * - TIM2_FORCEDACTION_INACTIVE: Force inactive level on 00504 * OC1REF. 00505 * @retval None 00506 */ 00507 void TIM2_ForcedOC1Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction) 00508 { 00509 /* Check the parameters */ 00510 assert_param(IS_TIM2_FORCED_ACTION_OK(TIM2_ForcedAction)); 00511 00512 /* Reset the OCM Bits & Configure the Forced output Mode */ 00513 TIM2->CCMR1 = (uint8_t)((uint8_t)(TIM2->CCMR1 & (uint8_t)(~TIM2_CCMR_OCM)) 00514 | (uint8_t)TIM2_ForcedAction); 00515 } 00516 00517 /** 00518 * @brief Forces the TIM2 Channel2 output waveform to active or inactive level. 00519 * @param TIM2_ForcedAction specifies the forced Action to be set to the output waveform. 00520 * This parameter can be one of the following values: 00521 * - TIM2_FORCEDACTION_ACTIVE: Force active level on OC2REF 00522 * - TIM2_FORCEDACTION_INACTIVE: Force inactive level on 00523 * OC2REF. 00524 * @retval None 00525 */ 00526 void TIM2_ForcedOC2Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction) 00527 { 00528 /* Check the parameters */ 00529 assert_param(IS_TIM2_FORCED_ACTION_OK(TIM2_ForcedAction)); 00530 00531 /* Reset the OCM Bits & Configure the Forced output Mode */ 00532 TIM2->CCMR2 = (uint8_t)((uint8_t)(TIM2->CCMR2 & (uint8_t)(~TIM2_CCMR_OCM)) 00533 | (uint8_t)TIM2_ForcedAction); 00534 } 00535 00536 /** 00537 * @brief Forces the TIM2 Channel3 output waveform to active or inactive level. 00538 * @param TIM2_ForcedAction specifies the forced Action to be set to the output waveform. 00539 * This parameter can be one of the following values: 00540 * - TIM2_FORCEDACTION_ACTIVE: Force active level on OC3REF 00541 * - TIM2_FORCEDACTION_INACTIVE: Force inactive level on 00542 * OC3REF. 00543 * @retval None 00544 */ 00545 void TIM2_ForcedOC3Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction) 00546 { 00547 /* Check the parameters */ 00548 assert_param(IS_TIM2_FORCED_ACTION_OK(TIM2_ForcedAction)); 00549 00550 /* Reset the OCM Bits & Configure the Forced output Mode */ 00551 TIM2->CCMR3 = (uint8_t)((uint8_t)(TIM2->CCMR3 & (uint8_t)(~TIM2_CCMR_OCM)) 00552 | (uint8_t)TIM2_ForcedAction); 00553 } 00554 00555 /** 00556 * @brief Enables or disables TIM2 peripheral Preload register on ARR. 00557 * @param NewState new state of the TIM2 peripheral Preload register. 00558 * This parameter can be ENABLE or DISABLE. 00559 * @retval None 00560 */ 00561 void TIM2_ARRPreloadConfig(FunctionalState NewState) 00562 { 00563 /* Check the parameters */ 00564 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00565 00566 /* Set or Reset the ARPE Bit */ 00567 if (NewState != DISABLE) 00568 { 00569 TIM2->CR1 |= (uint8_t)TIM2_CR1_ARPE; 00570 } 00571 else 00572 { 00573 TIM2->CR1 &= (uint8_t)(~TIM2_CR1_ARPE); 00574 } 00575 } 00576 00577 /** 00578 * @brief Enables or disables the TIM2 peripheral Preload Register on CCR1. 00579 * @param NewState new state of the Capture Compare Preload register. 00580 * This parameter can be ENABLE or DISABLE. 00581 * @retval None 00582 */ 00583 void TIM2_OC1PreloadConfig(FunctionalState NewState) 00584 { 00585 /* Check the parameters */ 00586 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00587 00588 /* Set or Reset the OC1PE Bit */ 00589 if (NewState != DISABLE) 00590 { 00591 TIM2->CCMR1 |= (uint8_t)TIM2_CCMR_OCxPE; 00592 } 00593 else 00594 { 00595 TIM2->CCMR1 &= (uint8_t)(~TIM2_CCMR_OCxPE); 00596 } 00597 } 00598 00599 /** 00600 * @brief Enables or disables the TIM2 peripheral Preload Register on CCR2. 00601 * @param NewState new state of the Capture Compare Preload register. 00602 * This parameter can be ENABLE or DISABLE. 00603 * @retval None 00604 */ 00605 void TIM2_OC2PreloadConfig(FunctionalState NewState) 00606 { 00607 /* Check the parameters */ 00608 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00609 00610 /* Set or Reset the OC2PE Bit */ 00611 if (NewState != DISABLE) 00612 { 00613 TIM2->CCMR2 |= (uint8_t)TIM2_CCMR_OCxPE; 00614 } 00615 else 00616 { 00617 TIM2->CCMR2 &= (uint8_t)(~TIM2_CCMR_OCxPE); 00618 } 00619 } 00620 00621 /** 00622 * @brief Enables or disables the TIM2 peripheral Preload Register on CCR3. 00623 * @param NewState new state of the Capture Compare Preload register. 00624 * This parameter can be ENABLE or DISABLE. 00625 * @retval None 00626 */ 00627 void TIM2_OC3PreloadConfig(FunctionalState NewState) 00628 { 00629 /* Check the parameters */ 00630 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00631 00632 /* Set or Reset the OC3PE Bit */ 00633 if (NewState != DISABLE) 00634 { 00635 TIM2->CCMR3 |= (uint8_t)TIM2_CCMR_OCxPE; 00636 } 00637 else 00638 { 00639 TIM2->CCMR3 &= (uint8_t)(~TIM2_CCMR_OCxPE); 00640 } 00641 } 00642 00643 /** 00644 * @brief Configures the TIM2 event to be generated by software. 00645 * @param TIM2_EventSource specifies the event source. 00646 * This parameter can be one of the following values: 00647 * - TIM2_EVENTSOURCE_UPDATE: TIM2 update Event source 00648 * - TIM2_EVENTSOURCE_CC1: TIM2 Capture Compare 1 Event source 00649 * - TIM2_EVENTSOURCE_CC2: TIM2 Capture Compare 2 Event source 00650 * - TIM2_EVENTSOURCE_CC3: TIM2 Capture Compare 3 Event source 00651 * @retval None 00652 */ 00653 void TIM2_GenerateEvent(TIM2_EventSource_TypeDef TIM2_EventSource) 00654 { 00655 /* Check the parameters */ 00656 assert_param(IS_TIM2_EVENT_SOURCE_OK(TIM2_EventSource)); 00657 00658 /* Set the event sources */ 00659 TIM2->EGR = (uint8_t)TIM2_EventSource; 00660 } 00661 00662 /** 00663 * @brief Configures the TIM2 Channel 1 polarity. 00664 * @param TIM2_OCPolarity specifies the OC1 Polarity. 00665 * This parameter can be one of the following values: 00666 * - TIM2_OCPOLARITY_LOW: Output Compare active low 00667 * - TIM2_OCPOLARITY_HIGH: Output Compare active high 00668 * @retval None 00669 */ 00670 void TIM2_OC1PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity) 00671 { 00672 /* Check the parameters */ 00673 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity)); 00674 00675 /* Set or Reset the CC1P Bit */ 00676 if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH) 00677 { 00678 TIM2->CCER1 |= (uint8_t)TIM2_CCER1_CC1P; 00679 } 00680 else 00681 { 00682 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC1P); 00683 } 00684 } 00685 00686 /** 00687 * @brief Configures the TIM2 Channel 2 polarity. 00688 * @param TIM2_OCPolarity specifies the OC2 Polarity. 00689 * This parameter can be one of the following values: 00690 * - TIM2_OCPOLARITY_LOW: Output Compare active low 00691 * - TIM2_OCPOLARITY_HIGH: Output Compare active high 00692 * @retval None 00693 */ 00694 void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity) 00695 { 00696 /* Check the parameters */ 00697 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity)); 00698 00699 /* Set or Reset the CC2P Bit */ 00700 if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH) 00701 { 00702 TIM2->CCER1 |= TIM2_CCER1_CC2P; 00703 } 00704 else 00705 { 00706 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC2P); 00707 } 00708 } 00709 00710 /** 00711 * @brief Configures the TIM2 Channel 3 polarity. 00712 * @param TIM2_OCPolarity specifies the OC3 Polarity. 00713 * This parameter can be one of the following values: 00714 * - TIM2_OCPOLARITY_LOW: Output Compare active low 00715 * - TIM2_OCPOLARITY_HIGH: Output Compare active high 00716 * @retval None 00717 */ 00718 void TIM2_OC3PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity) 00719 { 00720 /* Check the parameters */ 00721 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity)); 00722 00723 /* Set or Reset the CC3P Bit */ 00724 if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH) 00725 { 00726 TIM2->CCER2 |= (uint8_t)TIM2_CCER2_CC3P; 00727 } 00728 else 00729 { 00730 TIM2->CCER2 &= (uint8_t)(~TIM2_CCER2_CC3P); 00731 } 00732 } 00733 00734 /** 00735 * @brief Enables or disables the TIM2 Capture Compare Channel x. 00736 * @param TIM2_Channel specifies the TIM2 Channel. 00737 * This parameter can be one of the following values: 00738 * - TIM2_CHANNEL_1: TIM2 Channel1 00739 * - TIM2_CHANNEL_2: TIM2 Channel2 00740 * - TIM2_CHANNEL_3: TIM2 Channel3 00741 * @param NewState specifies the TIM2 Channel CCxE bit new state. 00742 * This parameter can be: ENABLE or DISABLE. 00743 * @retval None 00744 */ 00745 void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState) 00746 { 00747 /* Check the parameters */ 00748 assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel)); 00749 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00750 00751 if (TIM2_Channel == TIM2_CHANNEL_1) 00752 { 00753 /* Set or Reset the CC1E Bit */ 00754 if (NewState != DISABLE) 00755 { 00756 TIM2->CCER1 |= (uint8_t)TIM2_CCER1_CC1E; 00757 } 00758 else 00759 { 00760 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC1E); 00761 } 00762 00763 } 00764 else if (TIM2_Channel == TIM2_CHANNEL_2) 00765 { 00766 /* Set or Reset the CC2E Bit */ 00767 if (NewState != DISABLE) 00768 { 00769 TIM2->CCER1 |= (uint8_t)TIM2_CCER1_CC2E; 00770 } 00771 else 00772 { 00773 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC2E); 00774 } 00775 } 00776 else 00777 { 00778 /* Set or Reset the CC3E Bit */ 00779 if (NewState != DISABLE) 00780 { 00781 TIM2->CCER2 |= (uint8_t)TIM2_CCER2_CC3E; 00782 } 00783 else 00784 { 00785 TIM2->CCER2 &= (uint8_t)(~TIM2_CCER2_CC3E); 00786 } 00787 } 00788 } 00789 00790 /** 00791 * @brief Selects the TIM2 Output Compare Mode. This function disables the 00792 * selected channel before changing the Output Compare Mode. User has to 00793 * enable this channel using TIM2_CCxCmd and TIM2_CCxNCmd functions. 00794 * @param TIM2_Channel specifies the TIM2 Channel. 00795 * This parameter can be one of the following values: 00796 * - TIM2_CHANNEL_1: TIM2 Channel1 00797 * - TIM2_CHANNEL_2: TIM2 Channel2 00798 * - TIM2_CHANNEL_3: TIM2 Channel3 00799 * @param TIM2_OCMode specifies the TIM2 Output Compare Mode. 00800 * This paramter can be one of the following values: 00801 * - TIM2_OCMODE_TIMING 00802 * - TIM2_OCMODE_ACTIVE 00803 * - TIM2_OCMODE_TOGGLE 00804 * - TIM2_OCMODE_PWM1 00805 * - TIM2_OCMODE_PWM2 00806 * - TIM2_FORCEDACTION_ACTIVE 00807 * - TIM2_FORCEDACTION_INACTIVE 00808 * @retval None 00809 */ 00810 void TIM2_SelectOCxM(TIM2_Channel_TypeDef TIM2_Channel, TIM2_OCMode_TypeDef TIM2_OCMode) 00811 { 00812 /* Check the parameters */ 00813 assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel)); 00814 assert_param(IS_TIM2_OCM_OK(TIM2_OCMode)); 00815 00816 if (TIM2_Channel == TIM2_CHANNEL_1) 00817 { 00818 /* Disable the Channel 1: Reset the CCE Bit */ 00819 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC1E); 00820 00821 /* Reset the Output Compare Bits & Set the Output Compare Mode */ 00822 TIM2->CCMR1 = (uint8_t)((uint8_t)(TIM2->CCMR1 & (uint8_t)(~TIM2_CCMR_OCM)) 00823 | (uint8_t)TIM2_OCMode); 00824 } 00825 else if (TIM2_Channel == TIM2_CHANNEL_2) 00826 { 00827 /* Disable the Channel 2: Reset the CCE Bit */ 00828 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC2E); 00829 00830 /* Reset the Output Compare Bits & Set the Output Compare Mode */ 00831 TIM2->CCMR2 = (uint8_t)((uint8_t)(TIM2->CCMR2 & (uint8_t)(~TIM2_CCMR_OCM)) 00832 | (uint8_t)TIM2_OCMode); 00833 } 00834 else 00835 { 00836 /* Disable the Channel 3: Reset the CCE Bit */ 00837 TIM2->CCER2 &= (uint8_t)(~TIM2_CCER2_CC3E); 00838 00839 /* Reset the Output Compare Bits & Set the Output Compare Mode */ 00840 TIM2->CCMR3 = (uint8_t)((uint8_t)(TIM2->CCMR3 & (uint8_t)(~TIM2_CCMR_OCM)) 00841 | (uint8_t)TIM2_OCMode); 00842 } 00843 } 00844 00845 /** 00846 * @brief Sets the TIM2 Counter Register value. 00847 * @param Counter specifies the Counter register new value. 00848 * This parameter is between 0x0000 and 0xFFFF. 00849 * @retval None 00850 */ 00851 void TIM2_SetCounter(uint16_t Counter) 00852 { 00853 /* Set the Counter Register value */ 00854 TIM2->CNTRH = (uint8_t)(Counter >> 8); 00855 TIM2->CNTRL = (uint8_t)(Counter); 00856 } 00857 00858 /** 00859 * @brief Sets the TIM2 Autoreload Register value. 00860 * @param Autoreload specifies the Autoreload register new value. 00861 * This parameter is between 0x0000 and 0xFFFF. 00862 * @retval None 00863 */ 00864 void TIM2_SetAutoreload(uint16_t Autoreload) 00865 { 00866 /* Set the Autoreload Register value */ 00867 TIM2->ARRH = (uint8_t)(Autoreload >> 8); 00868 TIM2->ARRL = (uint8_t)(Autoreload); 00869 } 00870 00871 /** 00872 * @brief Sets the TIM2 Capture Compare1 Register value. 00873 * @param Compare1 specifies the Capture Compare1 register new value. 00874 * This parameter is between 0x0000 and 0xFFFF. 00875 * @retval None 00876 */ 00877 void TIM2_SetCompare1(uint16_t Compare1) 00878 { 00879 /* Set the Capture Compare1 Register value */ 00880 TIM2->CCR1H = (uint8_t)(Compare1 >> 8); 00881 TIM2->CCR1L = (uint8_t)(Compare1); 00882 } 00883 00884 /** 00885 * @brief Sets the TIM2 Capture Compare2 Register value. 00886 * @param Compare2 specifies the Capture Compare2 register new value. 00887 * This parameter is between 0x0000 and 0xFFFF. 00888 * @retval None 00889 */ 00890 void TIM2_SetCompare2(uint16_t Compare2) 00891 { 00892 /* Set the Capture Compare2 Register value */ 00893 TIM2->CCR2H = (uint8_t)(Compare2 >> 8); 00894 TIM2->CCR2L = (uint8_t)(Compare2); 00895 } 00896 00897 /** 00898 * @brief Sets the TIM2 Capture Compare3 Register value. 00899 * @param Compare3 specifies the Capture Compare3 register new value. 00900 * This parameter is between 0x0000 and 0xFFFF. 00901 * @retval None 00902 */ 00903 void TIM2_SetCompare3(uint16_t Compare3) 00904 { 00905 /* Set the Capture Compare3 Register value */ 00906 TIM2->CCR3H = (uint8_t)(Compare3 >> 8); 00907 TIM2->CCR3L = (uint8_t)(Compare3); 00908 } 00909 00910 /** 00911 * @brief Sets the TIM2 Input Capture 1 Prescaler. 00912 * @param TIM2_IC1Prescaler specifies the Input Capture prescaler new value 00913 * This parameter can be one of the following values: 00914 * - TIM2_ICPSC_DIV1: no prescaler 00915 * - TIM2_ICPSC_DIV2: capture is done once every 2 events 00916 * - TIM2_ICPSC_DIV4: capture is done once every 4 events 00917 * - TIM2_ICPSC_DIV8: capture is done once every 8 events 00918 * @retval None 00919 */ 00920 void TIM2_SetIC1Prescaler(TIM2_ICPSC_TypeDef TIM2_IC1Prescaler) 00921 { 00922 /* Check the parameters */ 00923 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_IC1Prescaler)); 00924 00925 /* Reset the IC1PSC Bits &Set the IC1PSC value */ 00926 TIM2->CCMR1 = (uint8_t)((uint8_t)(TIM2->CCMR1 & (uint8_t)(~TIM2_CCMR_ICxPSC)) 00927 | (uint8_t)TIM2_IC1Prescaler); 00928 } 00929 00930 /** 00931 * @brief Sets the TIM2 Input Capture 2 prescaler. 00932 * @param TIM2_IC2Prescaler specifies the Input Capture prescaler new value 00933 * This parameter can be one of the following values: 00934 * - TIM2_ICPSC_DIV1: no prescaler 00935 * - TIM2_ICPSC_DIV2: capture is done once every 2 events 00936 * - TIM2_ICPSC_DIV4: capture is done once every 4 events 00937 * - TIM2_ICPSC_DIV8: capture is done once every 8 events 00938 * @retval None 00939 */ 00940 void TIM2_SetIC2Prescaler(TIM2_ICPSC_TypeDef TIM2_IC2Prescaler) 00941 { 00942 /* Check the parameters */ 00943 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_IC2Prescaler)); 00944 00945 /* Reset the IC1PSC Bits &Set the IC1PSC value */ 00946 TIM2->CCMR2 = (uint8_t)((uint8_t)(TIM2->CCMR2 & (uint8_t)(~TIM2_CCMR_ICxPSC)) 00947 | (uint8_t)TIM2_IC2Prescaler); 00948 } 00949 00950 /** 00951 * @brief Sets the TIM2 Input Capture 3 prescaler. 00952 * @param TIM2_IC3Prescaler specifies the Input Capture prescaler new value 00953 * This parameter can be one of the following values: 00954 * - TIM2_ICPSC_DIV1: no prescaler 00955 * - TIM2_ICPSC_DIV2: capture is done once every 2 events 00956 * - TIM2_ICPSC_DIV4: capture is done once every 4 events 00957 * - TIM2_ICPSC_DIV8: capture is done once every 8 events 00958 * @retval None 00959 */ 00960 void TIM2_SetIC3Prescaler(TIM2_ICPSC_TypeDef TIM2_IC3Prescaler) 00961 { 00962 00963 /* Check the parameters */ 00964 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_IC3Prescaler)); 00965 /* Reset the IC1PSC Bits &Set the IC1PSC value */ 00966 TIM2->CCMR3 = (uint8_t)((uint8_t)(TIM2->CCMR3 & (uint8_t)(~TIM2_CCMR_ICxPSC)) 00967 | (uint8_t)TIM2_IC3Prescaler); 00968 } 00969 00970 /** 00971 * @brief Gets the TIM2 Input Capture 1 value. 00972 * @param None 00973 * @retval Capture Compare 1 Register value. 00974 */ 00975 uint16_t TIM2_GetCapture1(void) 00976 { 00977 /* Get the Capture 1 Register value */ 00978 uint16_t tmpccr1 = 0; 00979 uint8_t tmpccr1l=0, tmpccr1h=0; 00980 00981 tmpccr1h = TIM2->CCR1H; 00982 tmpccr1l = TIM2->CCR1L; 00983 00984 tmpccr1 = (uint16_t)(tmpccr1l); 00985 tmpccr1 |= (uint16_t)((uint16_t)tmpccr1h << 8); 00986 /* Get the Capture 1 Register value */ 00987 return (uint16_t)tmpccr1; 00988 } 00989 00990 /** 00991 * @brief Gets the TIM2 Input Capture 2 value. 00992 * @param None 00993 * @retval Capture Compare 2 Register value. 00994 */ 00995 uint16_t TIM2_GetCapture2(void) 00996 { 00997 /* Get the Capture 2 Register value */ 00998 uint16_t tmpccr2 = 0; 00999 uint8_t tmpccr2l=0, tmpccr2h=0; 01000 01001 tmpccr2h = TIM2->CCR2H; 01002 tmpccr2l = TIM2->CCR2L; 01003 01004 tmpccr2 = (uint16_t)(tmpccr2l); 01005 tmpccr2 |= (uint16_t)((uint16_t)tmpccr2h << 8); 01006 /* Get the Capture 2 Register value */ 01007 return (uint16_t)tmpccr2; 01008 } 01009 01010 /** 01011 * @brief Gets the TIM2 Input Capture 3 value. 01012 * @param None 01013 * @retval Capture Compare 3 Register value. 01014 */ 01015 uint16_t TIM2_GetCapture3(void) 01016 { 01017 /* Get the Capture 3 Register value */ 01018 uint16_t tmpccr3 = 0; 01019 uint8_t tmpccr3l=0, tmpccr3h=0; 01020 01021 tmpccr3h = TIM2->CCR3H; 01022 tmpccr3l = TIM2->CCR3L; 01023 01024 tmpccr3 = (uint16_t)(tmpccr3l); 01025 tmpccr3 |= (uint16_t)((uint16_t)tmpccr3h << 8); 01026 /* Get the Capture 3 Register value */ 01027 return (uint16_t)tmpccr3; 01028 } 01029 01030 /** 01031 * @brief Gets the TIM2 Counter value. 01032 * @param None 01033 * @retval Counter Register value. 01034 */ 01035 uint16_t TIM2_GetCounter(void) 01036 { 01037 uint16_t tmpcntr = 0; 01038 01039 tmpcntr = ((uint16_t)TIM2->CNTRH << 8); 01040 /* Get the Counter Register value */ 01041 return (uint16_t)( tmpcntr| (uint16_t)(TIM2->CNTRL)); 01042 } 01043 01044 /** 01045 * @brief Gets the TIM2 Prescaler value. 01046 * @param None 01047 * @retval Prescaler Register configuration value @ref TIM2_Prescaler_TypeDef. 01048 */ 01049 TIM2_Prescaler_TypeDef TIM2_GetPrescaler(void) 01050 { 01051 /* Get the Prescaler Register value */ 01052 return (TIM2_Prescaler_TypeDef)(TIM2->PSCR); 01053 } 01054 01055 /** 01056 * @brief Checks whether the specified TIM2 flag is set or not. 01057 * @param TIM2_FLAG specifies the flag to check. 01058 * This parameter can be one of the following values: 01059 * - TIM2_FLAG_UPDATE: TIM2 update Flag 01060 * - TIM2_FLAG_CC1: TIM2 Capture Compare 1 Flag 01061 * - TIM2_FLAG_CC2: TIM2 Capture Compare 2 Flag 01062 * - TIM2_FLAG_CC3: TIM2 Capture Compare 3 Flag 01063 * - TIM2_FLAG_CC1OF: TIM2 Capture Compare 1 over capture Flag 01064 * - TIM2_FLAG_CC2OF: TIM2 Capture Compare 2 over capture Flag 01065 * - TIM2_FLAG_CC3OF: TIM2 Capture Compare 3 over capture Flag 01066 * @retval FlagStatus The new state of TIM2_FLAG (SET or RESET). 01067 */ 01068 FlagStatus TIM2_GetFlagStatus(TIM2_FLAG_TypeDef TIM2_FLAG) 01069 { 01070 FlagStatus bitstatus = RESET; 01071 uint8_t tim2_flag_l = 0, tim2_flag_h = 0; 01072 01073 /* Check the parameters */ 01074 assert_param(IS_TIM2_GET_FLAG_OK(TIM2_FLAG)); 01075 01076 tim2_flag_l = (uint8_t)(TIM2->SR1 & (uint8_t)TIM2_FLAG); 01077 tim2_flag_h = (uint8_t)((uint16_t)TIM2_FLAG >> 8); 01078 01079 if ((tim2_flag_l | (uint8_t)(TIM2->SR2 & tim2_flag_h)) != (uint8_t)RESET ) 01080 { 01081 bitstatus = SET; 01082 } 01083 else 01084 { 01085 bitstatus = RESET; 01086 } 01087 return (FlagStatus)bitstatus; 01088 } 01089 01090 /** 01091 * @brief Clears the TIM2�s pending flags. 01092 * @param TIM2_FLAG specifies the flag to clear. 01093 * This parameter can be one of the following values: 01094 * - TIM2_FLAG_UPDATE: TIM2 update Flag 01095 * - TIM2_FLAG_CC1: TIM2 Capture Compare 1 Flag 01096 * - TIM2_FLAG_CC2: TIM2 Capture Compare 2 Flag 01097 * - TIM2_FLAG_CC3: TIM2 Capture Compare 3 Flag 01098 * - TIM2_FLAG_CC1OF: TIM2 Capture Compare 1 over capture Flag 01099 * - TIM2_FLAG_CC2OF: TIM2 Capture Compare 2 over capture Flag 01100 * - TIM2_FLAG_CC3OF: TIM2 Capture Compare 3 over capture Flag 01101 * @retval None. 01102 */ 01103 void TIM2_ClearFlag(TIM2_FLAG_TypeDef TIM2_FLAG) 01104 { 01105 /* Check the parameters */ 01106 assert_param(IS_TIM2_CLEAR_FLAG_OK(TIM2_FLAG)); 01107 01108 /* Clear the flags (rc_w0) clear this bit by writing 0. Writing �1� has no effect*/ 01109 TIM2->SR1 = (uint8_t)(~((uint8_t)(TIM2_FLAG))); 01110 TIM2->SR2 = (uint8_t)(~((uint8_t)((uint8_t)TIM2_FLAG >> 8))); 01111 } 01112 01113 /** 01114 * @brief Checks whether the TIM2 interrupt has occurred or not. 01115 * @param TIM2_IT specifies the TIM2 interrupt source to check. 01116 * This parameter can be one of the following values: 01117 * - TIM2_IT_UPDATE: TIM2 update Interrupt source 01118 * - TIM2_IT_CC1: TIM2 Capture Compare 1 Interrupt source 01119 * - TIM2_IT_CC2: TIM2 Capture Compare 2 Interrupt source 01120 * - TIM2_IT_CC3: TIM2 Capture Compare 3 Interrupt source 01121 * @retval ITStatus The new state of the TIM2_IT(SET or RESET). 01122 */ 01123 ITStatus TIM2_GetITStatus(TIM2_IT_TypeDef TIM2_IT) 01124 { 01125 ITStatus bitstatus = RESET; 01126 uint8_t TIM2_itStatus = 0, TIM2_itEnable = 0; 01127 01128 /* Check the parameters */ 01129 assert_param(IS_TIM2_GET_IT_OK(TIM2_IT)); 01130 01131 TIM2_itStatus = (uint8_t)(TIM2->SR1 & TIM2_IT); 01132 01133 TIM2_itEnable = (uint8_t)(TIM2->IER & TIM2_IT); 01134 01135 if ((TIM2_itStatus != (uint8_t)RESET ) && (TIM2_itEnable != (uint8_t)RESET )) 01136 { 01137 bitstatus = SET; 01138 } 01139 else 01140 { 01141 bitstatus = RESET; 01142 } 01143 return (ITStatus)(bitstatus); 01144 } 01145 01146 /** 01147 * @brief Clears the TIM2's interrupt pending bits. 01148 * @param TIM2_IT specifies the pending bit to clear. 01149 * This parameter can be one of the following values: 01150 * - TIM2_IT_UPDATE: TIM2 update Interrupt source 01151 * - TIM2_IT_CC1: TIM2 Capture Compare 1 Interrupt source 01152 * - TIM2_IT_CC2: TIM2 Capture Compare 2 Interrupt source 01153 * - TIM2_IT_CC3: TIM2 Capture Compare 3 Interrupt source 01154 * @retval None. 01155 */ 01156 void TIM2_ClearITPendingBit(TIM2_IT_TypeDef TIM2_IT) 01157 { 01158 /* Check the parameters */ 01159 assert_param(IS_TIM2_IT_OK(TIM2_IT)); 01160 01161 /* Clear the IT pending Bit */ 01162 TIM2->SR1 = (uint8_t)(~TIM2_IT); 01163 } 01164 01165 /** 01166 * @brief Configure the TI1 as Input. 01167 * @param TIM2_ICPolarity The Input Polarity. 01168 * This parameter can be one of the following values: 01169 * - TIM2_ICPOLARITY_FALLING 01170 * - TIM2_ICPOLARITY_RISING 01171 * @param TIM2_ICSelection specifies the input to be used. 01172 * This parameter can be one of the following values: 01173 * - TIM2_ICSELECTION_DIRECTTI: TIM2 Input 1 is selected to 01174 * be connected to IC1. 01175 * - TIM2_ICSELECTION_INDIRECTTI: TIM2 Input 1 is selected to 01176 * be connected to IC2. 01177 * @param TIM2_ICFilter Specifies the Input Capture Filter. 01178 * This parameter must be a value between 0x00 and 0x0F. 01179 * @retval None 01180 */ 01181 static void TI1_Config(uint8_t TIM2_ICPolarity, 01182 uint8_t TIM2_ICSelection, 01183 uint8_t TIM2_ICFilter) 01184 { 01185 /* Disable the Channel 1: Reset the CCE Bit */ 01186 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC1E); 01187 01188 /* Select the Input and set the filter */ 01189 TIM2->CCMR1 = (uint8_t)((uint8_t)(TIM2->CCMR1 & (uint8_t)(~(uint8_t)( TIM2_CCMR_CCxS | TIM2_CCMR_ICxF ))) 01190 | (uint8_t)(((TIM2_ICSelection)) | ((uint8_t)( TIM2_ICFilter << 4)))); 01191 01192 /* Select the Polarity */ 01193 if (TIM2_ICPolarity != TIM2_ICPOLARITY_RISING) 01194 { 01195 TIM2->CCER1 |= TIM2_CCER1_CC1P; 01196 } 01197 else 01198 { 01199 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC1P); 01200 } 01201 /* Set the CCE Bit */ 01202 TIM2->CCER1 |= TIM2_CCER1_CC1E; 01203 } 01204 01205 /** 01206 * @brief Configure the TI2 as Input. 01207 * @param TIM2_ICPolarity The Input Polarity. 01208 * This parameter can be one of the following values: 01209 * - TIM2_ICPOLARITY_FALLING 01210 * - TIM2_ICPOLARITY_RISING 01211 * @param TIM2_ICSelection specifies the input to be used. 01212 * This parameter can be one of the following values: 01213 * - TIM2_ICSELECTION_DIRECTTI: TIM2 Input 2 is selected to 01214 * be connected to IC2. 01215 * - TIM2_ICSELECTION_INDIRECTTI: TIM2 Input 2 is selected to 01216 * be connected to IC1. 01217 * @param TIM2_ICFilter Specifies the Input Capture Filter. 01218 * This parameter must be a value between 0x00 and 0x0F. 01219 * @retval None 01220 */ 01221 static void TI2_Config(uint8_t TIM2_ICPolarity, 01222 uint8_t TIM2_ICSelection, 01223 uint8_t TIM2_ICFilter) 01224 { 01225 /* Disable the Channel 2: Reset the CCE Bit */ 01226 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC2E); 01227 01228 /* Select the Input and set the filter */ 01229 TIM2->CCMR2 = (uint8_t)((uint8_t)(TIM2->CCMR2 & (uint8_t)(~(uint8_t)( TIM2_CCMR_CCxS | TIM2_CCMR_ICxF ))) 01230 | (uint8_t)(( (TIM2_ICSelection)) | ((uint8_t)( TIM2_ICFilter << 4)))); 01231 01232 01233 /* Select the Polarity */ 01234 if (TIM2_ICPolarity != TIM2_ICPOLARITY_RISING) 01235 { 01236 TIM2->CCER1 |= TIM2_CCER1_CC2P; 01237 } 01238 else 01239 { 01240 TIM2->CCER1 &= (uint8_t)(~TIM2_CCER1_CC2P); 01241 } 01242 01243 /* Set the CCE Bit */ 01244 TIM2->CCER1 |= TIM2_CCER1_CC2E; 01245 } 01246 01247 /** 01248 * @brief Configure the TI3 as Input. 01249 * @param TIM2_ICPolarity The Input Polarity. 01250 * This parameter can be one of the following values: 01251 * - TIM2_ICPOLARITY_FALLING 01252 * - TIM2_ICPOLARITY_RISING 01253 * @param TIM2_ICSelection specifies the input to be used. 01254 * This parameter can be one of the following values: 01255 * - TIM2_ICSELECTION_DIRECTTI: TIM2 Input 3 is selected to 01256 * be connected to IC3. 01257 * @param TIM2_ICFilter Specifies the Input Capture Filter. 01258 * This parameter must be a value between 0x00 and 0x0F. 01259 * @retval None 01260 */ 01261 static void TI3_Config(uint8_t TIM2_ICPolarity, uint8_t TIM2_ICSelection, 01262 uint8_t TIM2_ICFilter) 01263 { 01264 /* Disable the Channel 3: Reset the CCE Bit */ 01265 TIM2->CCER2 &= (uint8_t)(~TIM2_CCER2_CC3E); 01266 01267 /* Select the Input and set the filter */ 01268 TIM2->CCMR3 = (uint8_t)((uint8_t)(TIM2->CCMR3 & (uint8_t)(~( TIM2_CCMR_CCxS | TIM2_CCMR_ICxF))) 01269 | (uint8_t)(( (TIM2_ICSelection)) | ((uint8_t)( TIM2_ICFilter << 4)))); 01270 01271 01272 /* Select the Polarity */ 01273 if (TIM2_ICPolarity != TIM2_ICPOLARITY_RISING) 01274 { 01275 TIM2->CCER2 |= TIM2_CCER2_CC3P; 01276 } 01277 else 01278 { 01279 TIM2->CCER2 &= (uint8_t)(~TIM2_CCER2_CC3P); 01280 } 01281 /* Set the CCE Bit */ 01282 TIM2->CCER2 |= TIM2_CCER2_CC3E; 01283 } 01284 01285 /** 01286 * @} 01287 */ 01288 01289 /** 01290 * @} 01291 */ 01292 01293 01294 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/