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STM8S/A Standard Peripherals Drivers
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stm8s_adc1.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8s_adc1.c 00004 * @author MCD Application Team 00005 * @version V2.2.0 00006 * @date 30-September-2014 00007 * @brief This file contains all the functions/macros for the ADC1 peripheral. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm8s_adc1.h" 00030 00031 /** @addtogroup STM8S_StdPeriph_Driver 00032 * @{ 00033 */ 00034 /* Private typedef -----------------------------------------------------------*/ 00035 /* Private define ------------------------------------------------------------*/ 00036 /* Private macro -------------------------------------------------------------*/ 00037 /* Private variables ---------------------------------------------------------*/ 00038 /* Private function prototypes -----------------------------------------------*/ 00039 /* Private functions ---------------------------------------------------------*/ 00040 /* Public functions ----------------------------------------------------------*/ 00041 00042 /** 00043 * @addtogroup ADC1_Public_Functions 00044 * @{ 00045 */ 00046 00047 /** 00048 * @brief Deinitializes the ADC1 peripheral registers to their default reset values. 00049 * @param None 00050 * @retval None 00051 */ 00052 void ADC1_DeInit(void) 00053 { 00054 ADC1->CSR = ADC1_CSR_RESET_VALUE; 00055 ADC1->CR1 = ADC1_CR1_RESET_VALUE; 00056 ADC1->CR2 = ADC1_CR2_RESET_VALUE; 00057 ADC1->CR3 = ADC1_CR3_RESET_VALUE; 00058 ADC1->TDRH = ADC1_TDRH_RESET_VALUE; 00059 ADC1->TDRL = ADC1_TDRL_RESET_VALUE; 00060 ADC1->HTRH = ADC1_HTRH_RESET_VALUE; 00061 ADC1->HTRL = ADC1_HTRL_RESET_VALUE; 00062 ADC1->LTRH = ADC1_LTRH_RESET_VALUE; 00063 ADC1->LTRL = ADC1_LTRL_RESET_VALUE; 00064 ADC1->AWCRH = ADC1_AWCRH_RESET_VALUE; 00065 ADC1->AWCRL = ADC1_AWCRL_RESET_VALUE; 00066 } 00067 00068 /** 00069 * @brief Initializes the ADC1 peripheral according to the specified parameters 00070 * @param ADC1_ConversionMode: specifies the conversion mode 00071 * can be one of the values of @ref ADC1_ConvMode_TypeDef. 00072 * @param ADC1_Channel: specifies the channel to convert 00073 * can be one of the values of @ref ADC1_Channel_TypeDef. 00074 * @param ADC1_PrescalerSelection: specifies the ADC1 prescaler 00075 * can be one of the values of @ref ADC1_PresSel_TypeDef. 00076 * @param ADC1_ExtTrigger: specifies the external trigger 00077 * can be one of the values of @ref ADC1_ExtTrig_TypeDef. 00078 * @param ADC1_ExtTriggerState: specifies the external trigger new state 00079 * can be one of the values of @ref FunctionalState. 00080 * @param ADC1_Align: specifies the converted data alignment 00081 * can be one of the values of @ref ADC1_Align_TypeDef. 00082 * @param ADC1_SchmittTriggerChannel: specifies the schmitt trigger channel 00083 * can be one of the values of @ref ADC1_SchmittTrigg_TypeDef. 00084 * @param ADC1_SchmittTriggerState: specifies the schmitt trigger state 00085 * can be one of the values of @ref FunctionalState. 00086 * @retval None 00087 */ 00088 void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, ADC1_PresSel_TypeDef ADC1_PrescalerSelection, ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align, ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState) 00089 { 00090 /* Check the parameters */ 00091 assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode)); 00092 assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel)); 00093 assert_param(IS_ADC1_PRESSEL_OK(ADC1_PrescalerSelection)); 00094 assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger)); 00095 assert_param(IS_FUNCTIONALSTATE_OK(((ADC1_ExtTriggerState)))); 00096 assert_param(IS_ADC1_ALIGN_OK(ADC1_Align)); 00097 assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel)); 00098 assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState)); 00099 00100 /*-----------------CR1 & CSR configuration --------------------*/ 00101 /* Configure the conversion mode and the channel to convert 00102 respectively according to ADC1_ConversionMode & ADC1_Channel values & ADC1_Align values */ 00103 ADC1_ConversionConfig(ADC1_ConversionMode, ADC1_Channel, ADC1_Align); 00104 /* Select the prescaler division factor according to ADC1_PrescalerSelection values */ 00105 ADC1_PrescalerConfig(ADC1_PrescalerSelection); 00106 00107 /*-----------------CR2 configuration --------------------*/ 00108 /* Configure the external trigger state and event respectively 00109 according to NewState, ADC1_ExtTrigger */ 00110 ADC1_ExternalTriggerConfig(ADC1_ExtTrigger, ADC1_ExtTriggerState); 00111 00112 /*------------------TDR configuration ---------------------------*/ 00113 /* Configure the schmitt trigger channel and state respectively 00114 according to ADC1_SchmittTriggerChannel & ADC1_SchmittTriggerNewState values */ 00115 ADC1_SchmittTriggerConfig(ADC1_SchmittTriggerChannel, ADC1_SchmittTriggerState); 00116 00117 /* Enable the ADC1 peripheral */ 00118 ADC1->CR1 |= ADC1_CR1_ADON; 00119 } 00120 00121 /** 00122 * @brief Enables or Disables the ADC1 peripheral. 00123 * @param NewState: specifies the peripheral enabled or disabled state. 00124 * @retval None 00125 */ 00126 void ADC1_Cmd(FunctionalState NewState) 00127 { 00128 /* Check the parameters */ 00129 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00130 00131 if (NewState != DISABLE) 00132 { 00133 ADC1->CR1 |= ADC1_CR1_ADON; 00134 } 00135 else /* NewState == DISABLE */ 00136 { 00137 ADC1->CR1 &= (uint8_t)(~ADC1_CR1_ADON); 00138 } 00139 } 00140 00141 /** 00142 * @brief Enables or Disables the ADC1 scan mode. 00143 * @param NewState: specifies the selected mode enabled or disabled state. 00144 * @retval None 00145 */ 00146 void ADC1_ScanModeCmd(FunctionalState NewState) 00147 { 00148 /* Check the parameters */ 00149 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00150 00151 if (NewState != DISABLE) 00152 { 00153 ADC1->CR2 |= ADC1_CR2_SCAN; 00154 } 00155 else /* NewState == DISABLE */ 00156 { 00157 ADC1->CR2 &= (uint8_t)(~ADC1_CR2_SCAN); 00158 } 00159 } 00160 00161 /** 00162 * @brief Enables or Disables the ADC1 data store into the Data Buffer registers rather than in the Data Register 00163 * @param NewState: specifies the selected mode enabled or disabled state. 00164 * @retval None 00165 */ 00166 void ADC1_DataBufferCmd(FunctionalState NewState) 00167 { 00168 /* Check the parameters */ 00169 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00170 00171 if (NewState != DISABLE) 00172 { 00173 ADC1->CR3 |= ADC1_CR3_DBUF; 00174 } 00175 else /* NewState == DISABLE */ 00176 { 00177 ADC1->CR3 &= (uint8_t)(~ADC1_CR3_DBUF); 00178 } 00179 } 00180 00181 /** 00182 * @brief Enables or disables the ADC1 interrupt. 00183 * @param ADC1_IT specifies the name of the interrupt to enable or disable. 00184 * This parameter can be one of the following values: 00185 * - ADC1_IT_AWDITEN : Analog WDG interrupt enable 00186 * - ADC1_IT_EOCITEN : EOC iterrupt enable 00187 * @param NewState specifies the state of the interrupt to apply. 00188 * @retval None 00189 */ 00190 void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState) 00191 { 00192 /* Check the parameters */ 00193 assert_param(IS_ADC1_IT_OK(ADC1_IT)); 00194 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00195 00196 if (NewState != DISABLE) 00197 { 00198 /* Enable the ADC1 interrupts */ 00199 ADC1->CSR |= (uint8_t)ADC1_IT; 00200 } 00201 else /* NewState == DISABLE */ 00202 { 00203 /* Disable the ADC1 interrupts */ 00204 ADC1->CSR &= (uint8_t)((uint16_t)~(uint16_t)ADC1_IT); 00205 } 00206 } 00207 00208 /** 00209 * @brief Configure the ADC1 prescaler division factor. 00210 * @param ADC1_Prescaler: the selected precaler. 00211 * It can be one of the values of @ref ADC1_PresSel_TypeDef. 00212 * @retval None 00213 */ 00214 void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler) 00215 { 00216 /* Check the parameter */ 00217 assert_param(IS_ADC1_PRESSEL_OK(ADC1_Prescaler)); 00218 00219 /* Clear the SPSEL bits */ 00220 ADC1->CR1 &= (uint8_t)(~ADC1_CR1_SPSEL); 00221 /* Select the prescaler division factor according to ADC1_PrescalerSelection values */ 00222 ADC1->CR1 |= (uint8_t)(ADC1_Prescaler); 00223 } 00224 00225 /** 00226 * @brief Enables or disables the ADC1 Schmitt Trigger on a selected channel. 00227 * @param ADC1_SchmittTriggerChannel specifies the desired Channel. 00228 * It can be set of the values of @ref ADC1_SchmittTrigg_TypeDef. 00229 * @param NewState specifies Channel new status. 00230 * can have one of the values of @ref FunctionalState. 00231 * @retval None 00232 */ 00233 void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState NewState) 00234 { 00235 /* Check the parameters */ 00236 assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel)); 00237 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00238 00239 if (ADC1_SchmittTriggerChannel == ADC1_SCHMITTTRIG_ALL) 00240 { 00241 if (NewState != DISABLE) 00242 { 00243 ADC1->TDRL &= (uint8_t)0x0; 00244 ADC1->TDRH &= (uint8_t)0x0; 00245 } 00246 else /* NewState == DISABLE */ 00247 { 00248 ADC1->TDRL |= (uint8_t)0xFF; 00249 ADC1->TDRH |= (uint8_t)0xFF; 00250 } 00251 } 00252 else if (ADC1_SchmittTriggerChannel < ADC1_SCHMITTTRIG_CHANNEL8) 00253 { 00254 if (NewState != DISABLE) 00255 { 00256 ADC1->TDRL &= (uint8_t)(~(uint8_t)((uint8_t)0x01 << (uint8_t)ADC1_SchmittTriggerChannel)); 00257 } 00258 else /* NewState == DISABLE */ 00259 { 00260 ADC1->TDRL |= (uint8_t)((uint8_t)0x01 << (uint8_t)ADC1_SchmittTriggerChannel); 00261 } 00262 } 00263 else /* ADC1_SchmittTriggerChannel >= ADC1_SCHMITTTRIG_CHANNEL8 */ 00264 { 00265 if (NewState != DISABLE) 00266 { 00267 ADC1->TDRH &= (uint8_t)(~(uint8_t)((uint8_t)0x01 << ((uint8_t)ADC1_SchmittTriggerChannel - (uint8_t)8))); 00268 } 00269 else /* NewState == DISABLE */ 00270 { 00271 ADC1->TDRH |= (uint8_t)((uint8_t)0x01 << ((uint8_t)ADC1_SchmittTriggerChannel - (uint8_t)8)); 00272 } 00273 } 00274 } 00275 00276 /** 00277 * @brief Configure the ADC1 conversion on selected channel. 00278 * @param ADC1_ConversionMode Specifies the conversion type. 00279 * It can be set of the values of @ref ADC1_ConvMode_TypeDef 00280 * @param ADC1_Channel specifies the ADC1 Channel. 00281 * It can be set of the values of @ref ADC1_Channel_TypeDef 00282 * @param ADC1_Align specifies the conerted data alignment. 00283 * It can be set of the values of @ref ADC1_Align_TypeDef 00284 * @retval None 00285 */ 00286 void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, ADC1_Align_TypeDef ADC1_Align) 00287 { 00288 /* Check the parameters */ 00289 assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode)); 00290 assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel)); 00291 assert_param(IS_ADC1_ALIGN_OK(ADC1_Align)); 00292 00293 /* Clear the align bit */ 00294 ADC1->CR2 &= (uint8_t)(~ADC1_CR2_ALIGN); 00295 /* Configure the data alignment */ 00296 ADC1->CR2 |= (uint8_t)(ADC1_Align); 00297 00298 if (ADC1_ConversionMode == ADC1_CONVERSIONMODE_CONTINUOUS) 00299 { 00300 /* Set the continuous coversion mode */ 00301 ADC1->CR1 |= ADC1_CR1_CONT; 00302 } 00303 else /* ADC1_ConversionMode == ADC1_CONVERSIONMODE_SINGLE */ 00304 { 00305 /* Set the single conversion mode */ 00306 ADC1->CR1 &= (uint8_t)(~ADC1_CR1_CONT); 00307 } 00308 00309 /* Clear the ADC1 channels */ 00310 ADC1->CSR &= (uint8_t)(~ADC1_CSR_CH); 00311 /* Select the ADC1 channel */ 00312 ADC1->CSR |= (uint8_t)(ADC1_Channel); 00313 } 00314 00315 /** 00316 * @brief Configure the ADC1 conversion on external trigger event. 00317 * @par Full description: 00318 * The selected external trigger evant can be enabled or disabled. 00319 * @param ADC1_ExtTrigger to select the External trigger event. 00320 * can have one of the values of @ref ADC1_ExtTrig_TypeDef. 00321 * @param NewState to enable/disable the selected external trigger 00322 * can have one of the values of @ref FunctionalState. 00323 * @retval None 00324 */ 00325 void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState) 00326 { 00327 /* Check the parameters */ 00328 assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger)); 00329 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00330 00331 /* Clear the external trigger selection bits */ 00332 ADC1->CR2 &= (uint8_t)(~ADC1_CR2_EXTSEL); 00333 00334 if (NewState != DISABLE) 00335 { 00336 /* Enable the selected external Trigger */ 00337 ADC1->CR2 |= (uint8_t)(ADC1_CR2_EXTTRIG); 00338 } 00339 else /* NewState == DISABLE */ 00340 { 00341 /* Disable the selected external trigger */ 00342 ADC1->CR2 &= (uint8_t)(~ADC1_CR2_EXTTRIG); 00343 } 00344 00345 /* Set the selected external trigger */ 00346 ADC1->CR2 |= (uint8_t)(ADC1_ExtTrigger); 00347 } 00348 00349 /** 00350 * @brief Start ADC1 conversion 00351 * @par Full description: 00352 * This function triggers the start of conversion, after ADC1 configuration. 00353 * @param None 00354 * @retval None 00355 * @par Required preconditions: 00356 * Enable the ADC1 peripheral before calling this function 00357 */ 00358 void ADC1_StartConversion(void) 00359 { 00360 ADC1->CR1 |= ADC1_CR1_ADON; 00361 } 00362 00363 /** 00364 * @brief Get one sample of measured signal. 00365 * @param None 00366 * @retval ConversionValue: value of the measured signal. 00367 * @par Required preconditions: 00368 * ADC1 conversion finished. 00369 */ 00370 uint16_t ADC1_GetConversionValue(void) 00371 { 00372 uint16_t temph = 0; 00373 uint8_t templ = 0; 00374 00375 if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */ 00376 { 00377 /* Read LSB first */ 00378 templ = ADC1->DRL; 00379 /* Then read MSB */ 00380 temph = ADC1->DRH; 00381 00382 temph = (uint16_t)(templ | (uint16_t)(temph << (uint8_t)8)); 00383 } 00384 else /* Left alignment */ 00385 { 00386 /* Read MSB firts*/ 00387 temph = ADC1->DRH; 00388 /* Then read LSB */ 00389 templ = ADC1->DRL; 00390 00391 temph = (uint16_t)((uint16_t)((uint16_t)templ << 6) | (uint16_t)((uint16_t)temph << 8)); 00392 } 00393 00394 return ((uint16_t)temph); 00395 } 00396 00397 /** 00398 * @brief Enables or disables the analog watchdog for the given channel. 00399 * @param Channel specifies the desired Channel. 00400 * It can be set of the values of @ref ADC1_Channel_TypeDef. 00401 * @param NewState specifies the analog watchdog new state. 00402 * can have one of the values of @ref FunctionalState. 00403 * @retval None 00404 */ 00405 void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState) 00406 { 00407 /* Check the parameters */ 00408 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00409 assert_param(IS_ADC1_CHANNEL_OK(Channel)); 00410 00411 if (Channel < (uint8_t)8) 00412 { 00413 if (NewState != DISABLE) 00414 { 00415 ADC1->AWCRL |= (uint8_t)((uint8_t)1 << Channel); 00416 } 00417 else /* NewState == DISABLE */ 00418 { 00419 ADC1->AWCRL &= (uint8_t)~(uint8_t)((uint8_t)1 << Channel); 00420 } 00421 } 00422 else 00423 { 00424 if (NewState != DISABLE) 00425 { 00426 ADC1->AWCRH |= (uint8_t)((uint8_t)1 << (Channel - (uint8_t)8)); 00427 } 00428 else /* NewState == DISABLE */ 00429 { 00430 ADC1->AWCRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (uint8_t)(Channel - (uint8_t)8)); 00431 } 00432 } 00433 } 00434 00435 /** 00436 * @brief Sets the high threshold of the analog watchdog. 00437 * @param Threshold specifies the high threshold value. 00438 * this value depends on the reference voltage range. 00439 * @retval None 00440 */ 00441 void ADC1_SetHighThreshold(uint16_t Threshold) 00442 { 00443 ADC1->HTRH = (uint8_t)(Threshold >> (uint8_t)2); 00444 ADC1->HTRL = (uint8_t)Threshold; 00445 } 00446 00447 /** 00448 * @brief Sets the low threshold of the analog watchdog. 00449 * @param Threshold specifies the low threshold value. 00450 * this value depends on the reference voltage range. 00451 * @retval None 00452 */ 00453 void ADC1_SetLowThreshold(uint16_t Threshold) 00454 { 00455 ADC1->LTRL = (uint8_t)Threshold; 00456 ADC1->LTRH = (uint8_t)(Threshold >> (uint8_t)2); 00457 } 00458 00459 /** 00460 * @brief Get one sample of measured signal. 00461 * @param Buffer specifies the buffer to read. 00462 * @retval BufferValue: value read from the given buffer. 00463 * @par Required preconditions: 00464 * ADC1 conversion finished. 00465 */ 00466 uint16_t ADC1_GetBufferValue(uint8_t Buffer) 00467 { 00468 uint16_t temph = 0; 00469 uint8_t templ = 0; 00470 00471 /* Check the parameters */ 00472 assert_param(IS_ADC1_BUFFER_OK(Buffer)); 00473 00474 if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */ 00475 { 00476 /* Read LSB first */ 00477 templ = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1) + 1); 00478 /* Then read MSB */ 00479 temph = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1)); 00480 00481 temph = (uint16_t)(templ | (uint16_t)(temph << (uint8_t)8)); 00482 } 00483 else /* Left alignment */ 00484 { 00485 /* Read MSB firts*/ 00486 temph = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1)); 00487 /* Then read LSB */ 00488 templ = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1) + 1); 00489 00490 temph = (uint16_t)((uint16_t)((uint16_t)templ << 6) | (uint16_t)(temph << 8)); 00491 } 00492 00493 return ((uint16_t)temph); 00494 } 00495 00496 /** 00497 * @brief Checks the specified analog watchdog channel status. 00498 * @param Channel: specify the channel of which to check the analog watchdog 00499 * can be one of the values of @ref ADC1_Channel_TypeDef. 00500 * @retval FlagStatus Status of the analog watchdog. 00501 */ 00502 FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel) 00503 { 00504 uint8_t status = 0; 00505 00506 /* Check the parameters */ 00507 assert_param(IS_ADC1_CHANNEL_OK(Channel)); 00508 00509 if (Channel < (uint8_t)8) 00510 { 00511 status = (uint8_t)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << Channel)); 00512 } 00513 else /* Channel = 8 | 9 */ 00514 { 00515 status = (uint8_t)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (Channel - (uint8_t)8))); 00516 } 00517 00518 return ((FlagStatus)status); 00519 } 00520 00521 /** 00522 * @brief Checks the specified ADC1 flag status. 00523 * @param Flag: ADC1 flag. 00524 * can be one of the values of @ref ADC1_Flag_TypeDef. 00525 * @retval FlagStatus Status of the ADC1 flag. 00526 */ 00527 FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag) 00528 { 00529 uint8_t flagstatus = 0; 00530 uint8_t temp = 0; 00531 00532 /* Check the parameters */ 00533 assert_param(IS_ADC1_FLAG_OK(Flag)); 00534 00535 if ((Flag & 0x0F) == 0x01) 00536 { 00537 /* Get OVR flag status */ 00538 flagstatus = (uint8_t)(ADC1->CR3 & ADC1_CR3_OVR); 00539 } 00540 else if ((Flag & 0xF0) == 0x10) 00541 { 00542 /* Get analog watchdog channel status */ 00543 temp = (uint8_t)(Flag & (uint8_t)0x0F); 00544 if (temp < 8) 00545 { 00546 flagstatus = (uint8_t)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << temp)); 00547 } 00548 else 00549 { 00550 flagstatus = (uint8_t)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (temp - 8))); 00551 } 00552 } 00553 else /* Get EOC | AWD flag status */ 00554 { 00555 flagstatus = (uint8_t)(ADC1->CSR & Flag); 00556 } 00557 return ((FlagStatus)flagstatus); 00558 00559 } 00560 00561 /** 00562 * @brief Clear the specified ADC1 Flag. 00563 * @param Flag: ADC1 flag. 00564 * can be one of the values of @ref ADC1_Flag_TypeDef. 00565 * @retval None 00566 */ 00567 void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag) 00568 { 00569 uint8_t temp = 0; 00570 00571 /* Check the parameters */ 00572 assert_param(IS_ADC1_FLAG_OK(Flag)); 00573 00574 if ((Flag & 0x0F) == 0x01) 00575 { 00576 /* Clear OVR flag status */ 00577 ADC1->CR3 &= (uint8_t)(~ADC1_CR3_OVR); 00578 } 00579 else if ((Flag & 0xF0) == 0x10) 00580 { 00581 /* Clear analog watchdog channel status */ 00582 temp = (uint8_t)(Flag & (uint8_t)0x0F); 00583 if (temp < 8) 00584 { 00585 ADC1->AWSRL &= (uint8_t)~(uint8_t)((uint8_t)1 << temp); 00586 } 00587 else 00588 { 00589 ADC1->AWSRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (temp - 8)); 00590 } 00591 } 00592 else /* Clear EOC | AWD flag status */ 00593 { 00594 ADC1->CSR &= (uint8_t) (~Flag); 00595 } 00596 } 00597 00598 /** 00599 * @brief Returns the specified pending bit status 00600 * @param ITPendingBit : the IT pending bit to check. 00601 * This parameter can be one of the following values: 00602 * - ADC1_IT_AWD : Analog WDG IT status 00603 * - ADC1_IT_AWS0 : Analog channel 0 IT status 00604 * - ADC1_IT_AWS1 : Analog channel 1 IT status 00605 * - ADC1_IT_AWS2 : Analog channel 2 IT status 00606 * - ADC1_IT_AWS3 : Analog channel 3 IT status 00607 * - ADC1_IT_AWS4 : Analog channel 4 IT status 00608 * - ADC1_IT_AWS5 : Analog channel 5 IT status 00609 * - ADC1_IT_AWS6 : Analog channel 6 IT status 00610 * - ADC1_IT_AWS7 : Analog channel 7 IT status 00611 * - ADC1_IT_AWS8 : Analog channel 8 IT status 00612 * - ADC1_IT_AWS9 : Analog channel 9 IT status 00613 * - ADC1_IT_EOC : EOC pending bit 00614 * @retval ITStatus: status of the specified pending bit. 00615 */ 00616 ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit) 00617 { 00618 ITStatus itstatus = RESET; 00619 uint8_t temp = 0; 00620 00621 /* Check the parameters */ 00622 assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit)); 00623 00624 if (((uint16_t)ITPendingBit & 0xF0) == 0x10) 00625 { 00626 /* Get analog watchdog channel status */ 00627 temp = (uint8_t)((uint16_t)ITPendingBit & 0x0F); 00628 if (temp < 8) 00629 { 00630 itstatus = (ITStatus)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << temp)); 00631 } 00632 else 00633 { 00634 itstatus = (ITStatus)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (temp - 8))); 00635 } 00636 } 00637 else /* Get EOC | AWD flag status */ 00638 { 00639 itstatus = (ITStatus)(ADC1->CSR & (uint8_t)ITPendingBit); 00640 } 00641 return ((ITStatus)itstatus); 00642 } 00643 00644 /** 00645 * @brief Clear the ADC1 End of Conversion pending bit. 00646 * @param ITPendingBit : the IT pending bit to clear. 00647 * This parameter can be one of the following values: 00648 * - ADC1_IT_AWD : Analog WDG IT status 00649 * - ADC1_IT_AWS0 : Analog channel 0 IT status 00650 * - ADC1_IT_AWS1 : Analog channel 1 IT status 00651 * - ADC1_IT_AWS2 : Analog channel 2 IT status 00652 * - ADC1_IT_AWS3 : Analog channel 3 IT status 00653 * - ADC1_IT_AWS4 : Analog channel 4 IT status 00654 * - ADC1_IT_AWS5 : Analog channel 5 IT status 00655 * - ADC1_IT_AWS6 : Analog channel 6 IT status 00656 * - ADC1_IT_AWS7 : Analog channel 7 IT status 00657 * - ADC1_IT_AWS8 : Analog channel 8 IT status 00658 * - ADC1_IT_AWS9 : Analog channel 9 IT status 00659 * - ADC1_IT_EOC : EOC pending bit 00660 * @retval None 00661 */ 00662 void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit) 00663 { 00664 uint8_t temp = 0; 00665 00666 /* Check the parameters */ 00667 assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit)); 00668 00669 if (((uint16_t)ITPendingBit & 0xF0) == 0x10) 00670 { 00671 /* Clear analog watchdog channel status */ 00672 temp = (uint8_t)((uint16_t)ITPendingBit & 0x0F); 00673 if (temp < 8) 00674 { 00675 ADC1->AWSRL &= (uint8_t)~(uint8_t)((uint8_t)1 << temp); 00676 } 00677 else 00678 { 00679 ADC1->AWSRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (temp - 8)); 00680 } 00681 } 00682 else /* Clear EOC | AWD flag status */ 00683 { 00684 ADC1->CSR &= (uint8_t)((uint16_t)~(uint16_t)ITPendingBit); 00685 } 00686 } 00687 00688 /** 00689 * @} 00690 */ 00691 00692 /** 00693 * @} 00694 */ 00695 00696 00697 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/