STM32L4R9I-Discovery BSP User Manual: stm32l4r9i_discovery_psram.h Source File

STM32L4R9I-Discovery BSP

stm32l4r9i_discovery_psram.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4r9i_discovery_psram.h
00004   * @author  MCD Application Team
00005   * @brief   This file contains the common defines and functions prototypes for
00006   *          the stm32l4r9i_discovery_psram.c driver.
00007   ******************************************************************************
00008   * @attention
00009   *
00010   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00011   *
00012   * Redistribution and use in source and binary forms, with or without modification,
00013   * are permitted provided that the following conditions are met:
00014   *   1. Redistributions of source code must retain the above copyright notice,
00015   *      this list of conditions and the following disclaimer.
00016   *   2. Redistributions in binary form must reproduce the above copyright notice,
00017   *      this list of conditions and the following disclaimer in the documentation
00018   *      and/or other materials provided with the distribution.
00019   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00020   *      may be used to endorse or promote products derived from this software
00021   *      without specific prior written permission.
00022   *
00023   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00024   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00025   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00026   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00027   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00028   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00029   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00030   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00031   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00032   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00033   *
00034   ******************************************************************************
00035   */
00036 
00037 /* Define to prevent recursive inclusion -------------------------------------*/
00038 #ifndef __STM32L4R9I_DISCOVERY_PSRAM_H
00039 #define __STM32L4R9I_DISCOVERY_PSRAM_H
00040 
00041 #ifdef __cplusplus
00042  extern "C" {
00043 #endif
00044 
00045 /* Includes ------------------------------------------------------------------*/
00046 #include "stm32l4xx_hal.h"
00047 
00048 /** @addtogroup BSP
00049   * @{
00050   */
00051 
00052 /** @addtogroup STM32L4R9I_DISCOVERY
00053   * @{
00054   */
00055 
00056 /** @addtogroup STM32L4R9I_DISCOVERY_PSRAM
00057   * @{
00058   */
00059 
00060 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Exported_Types Exported Constants
00061   * @{
00062   */
00063 
00064 /**
00065   * @brief  PSRAM status structure definition
00066   */
00067 #define   PSRAM_OK         ((uint8_t)0x00)
00068 #define   PSRAM_ERROR      ((uint8_t)0x01)
00069 
00070 #define PSRAM_DEVICE_ADDR  ((uint32_t)0x60000000)
00071 #define PSRAM_DEVICE_SIZE  ((uint32_t)0x400000)  /* PSRAM device size in Bytes */
00072 
00073 /* #define SRAM_MEMORY_WIDTH    FMC_NORSRAM_MEM_BUS_WIDTH_8*/
00074 #define PSRAM_MEMORY_WIDTH    FMC_NORSRAM_MEM_BUS_WIDTH_16
00075 
00076 #define PSRAM_BURSTACCESS     FMC_BURST_ACCESS_MODE_DISABLE
00077 /* #define PSRAM_BURSTACCESS     FMC_BURST_ACCESS_MODE_ENABLE*/
00078 
00079 #define PSRAM_WRITEBURST      FMC_WRITE_BURST_DISABLE
00080 /* #define PSRAM_WRITEBURST     FMC_WRITE_BURST_ENABLE */
00081 
00082 #define CONTINUOUSCLOCK_FEATURE    FMC_CONTINUOUS_CLOCK_SYNC_ONLY
00083 /* #define CONTINUOUSCLOCK_FEATURE     FMC_CONTINUOUS_CLOCK_SYNC_ASYNC */
00084 
00085 /* DMA definitions for SRAM DMA transfer */
00086 #define __PSRAM_DMAx_CLK_ENABLE            __HAL_RCC_DMA2_CLK_ENABLE
00087 #define __PSRAM_DMAx_CLK_DISABLE           __HAL_RCC_DMA2_CLK_DISABLE
00088 #define PSRAM_DMAx_INSTANCE                DMA2_Channel3
00089 #define PSRAM_DMAx_IRQn                    DMA2_Channel3_IRQn
00090 #define BSP_PSRAM_DMA_IRQHandler           DMA2_Channel3_IRQHandler
00091 
00092 
00093 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Exported_Variables Exported Variables
00094   * @{
00095   */
00096 extern SRAM_HandleTypeDef psramHandle;
00097 
00098 /**
00099   * @}
00100   */
00101 
00102 /** @defgroup STM32L4R9I_DISCOVERY_PSRAM_Exported_Functions Exported Functions
00103   * @{
00104   */
00105 uint8_t BSP_PSRAM_Init(void);
00106 uint8_t BSP_PSRAM_DeInit(void);
00107 uint8_t BSP_PSRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00108 uint8_t BSP_PSRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00109 uint8_t BSP_PSRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00110 uint8_t BSP_PSRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00111 
00112 /* These __weak functions can be surcharged by application code in case the current settings
00113    (eg. interrupt priority) need to be changed for specific application needs */
00114 void BSP_PSRAM_MspInit(SRAM_HandleTypeDef *hsram, void *Params);
00115 void BSP_PSRAM_MspDeInit(SRAM_HandleTypeDef *hsram, void *Params);
00116 
00117 /**
00118   * @}
00119   */
00120 
00121 /**
00122   * @}
00123   */
00124 
00125 /**
00126   * @}
00127   */
00128 
00129 /**
00130   * @}
00131   */
00132 
00133 /**
00134   * @}
00135   */
00136 
00137 #ifdef __cplusplus
00138 }
00139 #endif
00140 
00141 #endif /* __STM32L4R9I_DISCOVERY_PSRAM_H */
00142 
00143 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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