_BSP_User_Manual: stm3210e_eval_sram.h Source File

00001 /**
00002   ******************************************************************************
00003   * @file    stm3210e_eval_sram.h
00004   * @author  MCD Application Team
00005   * @version $VERSION$
00006   * @date    $DATE$
00007   * @brief   This file contains the common defines and functions prototypes for
00008   *          the stm3210e_eval_sram.c driver.
00009   ******************************************************************************
00010   * @attention
00011   *
00012   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
00013   *
00014   * Redistribution and use in source and binary forms, with or without modification,
00015   * are permitted provided that the following conditions are met:
00016   *   1. Redistributions of source code must retain the above copyright notice,
00017   *      this list of conditions and the following disclaimer.
00018   *   2. Redistributions in binary form must reproduce the above copyright notice,
00019   *      this list of conditions and the following disclaimer in the documentation
00020   *      and/or other materials provided with the distribution.
00021   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00022   *      may be used to endorse or promote products derived from this software
00023   *      without specific prior written permission.
00024   *
00025   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00026   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00027   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00028   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00029   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00030   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00031   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00032   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00033   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00034   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00035   *
00036   ******************************************************************************
00037   */ 
00038 
00039 /* Define to prevent recursive inclusion -------------------------------------*/
00040 #ifndef __STM3210E_EVAL_SRAM_H
00041 #define __STM3210e_EVAL_SRAM_H
00042 
00043 #ifdef __cplusplus
00044  extern "C" {
00045 #endif 
00046 
00047 /* Includes ------------------------------------------------------------------*/
00048 #include "stm32f1xx_hal.h"
00049 
00050 /** @addtogroup BSP
00051   * @{
00052   */ 
00053 
00054 /** @addtogroup STM3210E_EVAL
00055   * @{
00056   */
00057     
00058 /** @addtogroup STM3210E_EVAL_SRAM
00059   * @{
00060   */    
00061 
00062 /* Exported types ------------------------------------------------------------*/
00063 
00064 /** @defgroup STM3210E_EVAL_SRAM_Exported_Types Exported_Types
00065   * @{
00066   */
00067   
00068 /**
00069   * @}
00070   */ 
00071   
00072 
00073 /* Exported constants --------------------------------------------------------*/ 
00074 /** @defgroup STM3210E_EVAL_SRAM_Exported_Constants Exported_Constants
00075   * @{
00076   */
00077   
00078 /** 
00079   * @brief  SRAM status structure definition  
00080   */     
00081 #define   SRAM_OK         0x00
00082 #define   SRAM_ERROR      0x01
00083 
00084 #define SRAM_DEVICE_ADDR  ((uint32_t)0x68000000)
00085 #define SRAM_DEVICE_SIZE  ((uint32_t)0x200000)  /* SRAM device size in MBytes */  
00086   
00087 /* #define SRAM_MEMORY_WIDTH    FSMC_NORSRAM_MEM_BUS_WIDTH_8  */
00088 #define SRAM_MEMORY_WIDTH    FSMC_NORSRAM_MEM_BUS_WIDTH_16
00089 
00090 #define SRAM_BURSTACCESS    FSMC_BURST_ACCESS_MODE_DISABLE  
00091 /* #define SRAM_BURSTACCESS    FSMC_BURST_ACCESS_MODE_ENABLE*/
00092   
00093 #define SRAM_WRITEBURST    FSMC_WRITE_BURST_DISABLE  
00094 /* #define SRAM_WRITEBURST   FSMC_WRITE_BURST_ENABLE */
00095  
00096 /* DMA definitions for SRAM DMA transfer */
00097 #define __SRAM_DMAx_CLK_ENABLE            __HAL_RCC_DMA2_CLK_ENABLE
00098 #define SRAM_DMAx_STREAM                  DMA2_Channel1  
00099 #define SRAM_DMAx_IRQn                    DMA2_Channel1_IRQn
00100 #define SRAM_DMAx_IRQHandler              DMA2_Channel1_IRQHandler  
00101   
00102 /**
00103   * @}
00104   */ 
00105   
00106 /* Exported macro ------------------------------------------------------------*/
00107   
00108 /** @defgroup STM3210E_EVAL_SRAM_Exported_Macro Exported_Macro
00109   * @{
00110   */  
00111 
00112 /**
00113   * @}
00114   */ 
00115   
00116 /* Exported functions --------------------------------------------------------*/
00117 
00118 /** @addtogroup STM3210E_EVAL_SRAM_Exported_Functions
00119   * @{
00120   */    
00121 uint8_t BSP_SRAM_Init(void);
00122 uint8_t BSP_SRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00123 uint8_t BSP_SRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00124 uint8_t BSP_SRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00125 uint8_t BSP_SRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00126 void    BSP_SRAM_DMA_IRQHandler(void);
00127 
00128 /**
00129   * @}
00130   */ 
00131 
00132 /**
00133   * @}
00134   */ 
00135 
00136 /**
00137   * @}
00138   */ 
00139 
00140 /**
00141   * @}
00142   */ 
00143 
00144 #ifdef __cplusplus
00145 }
00146 #endif
00147 
00148 #endif /* __STM3210E_EVAL_SRAM_H */
00149 
00150 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00151